USBN9603SLB ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA Supportfeatures. It is compatible with USBspecification versions 1.0 and 1.1, and is an advanced ver- ●Imp ..
USBN9603SLBX ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportBlock Diagram A0/ALE D7-0/AD7-0 INTR MODE1-0CS RD WRRESETVCCMicrocontroller InterfaceGND24 MHz XINO ..
USBN9603SLBX ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportPIN DESCRIPTIONS .71.2.1 Power Supply .... 71.2.2 Oscillator, Clock and Reset . 71.2.3 USB Port ..8 ..
USBN9604-28M ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportFeatures●Full-speed USB node device●Integrated USB transceiver●Supports 24 MHz oscillator circuit w ..
USBN9604-28MX ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportUSBN9603/USBN9604 Universal Serial Bus Full Speed Node Controller with Enhanced DMA Support- May 19 ..
USBN9604-28MX NOPB ,USBN9604 28-SOIC Features*Full-speed USB node device*Integrated USB transceiver*Supports 24 MHz oscillator circuit w ..
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USBN9603-28M-USBN9603-28MX-USBN9603SLB-USBN9603SLBX
Universal Serial Bus Full Speed Node Controller with Enhanced DMA Support
May 1998USBN9603/USBN9604 Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportJune 2003
Revision 1.3
USBN9603/USBN9604 Universal Serial Bus
Full Speed Node Controller with Enhanced DMA Support
General DescriptionThe USBN9603/4 are integrated, USB Node controllers.
Other than the reset mechanismforthe clock generation cir-
cuit, these two devices are identical.All referencesto “the
device”in this document referto both devices, unless other-
wise noted.
The device provides enhanced DMA support with many au-
tomatic data handling features.Itis compatible with USB
specification versions 1.0 and 1.1, andisan advanced ver-
sion of the USBN9602.
The device integrates the required USB transceiver witha
3.3V regulator,a Serial Interface Engine (SIE), USB end-
point (EP) FIFOs,a versatile 8-bit parallel interface,a clock
generator anda MICROWIRE/PLUS™ interface. Seven
endpoint pipes are supported: onefor the mandatory con-
trol endpoint andsixto support interrupt, bulk and isochro-
nous endpoints. Each endpoint pipe hasa dedicated FIFO, bytesfor the control endpoint and64 bytesfor the other
endpoints. The 8-bit parallel interface supports multiplexed
and non-multiplexed style CPU address/data buses.A pro-
grammable interrupt output scheme allows device configu-
ration for different interrupt signaling requirements.
Outstanding Features Low EMI, low standby current,24 MHz oscillator Advanced DMA mechanism Fully static HALT mode with asynchronous wake-up
for bus powered operation 5Vor 3.3V operation Improved input range 3.3V signal voltage regulator All unidirectional FIFOs are64 bytes Power-up reset and startup delay counter simplify sys-
tem design Simple programming model controlledby external controller Availablein two packages
USBN9603/4SLB: small footprintfor new designs
and portable applications
USBN9603/4-28M: standard package, pin-to-pin
compatible with USBN9602-28M
Block DiagramPhysical Layer Interface (PHY)
Media Access Controller (MAC)
Transceiver
24 MHz
Oscillator
Clock
Generator
XIN
XOUT
CLKOUT
Microcontroller Interface
INTR
V3.3
A0/ALE D7-0/AD7-0
Endpoint/Control FIFOs
VReg AGND
RESET
VCC
GND
MODE1-0
Serial Interface Engine (SIE)
USB EventDetect
Clock
Recovery RD WR
