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USBN9602-28M |USBN960228MNSN/a502avai(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]
USBN9602-28M |USBN960228MNSCN/a4800avai(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]
USBN9602-28MX |USBN960228MXNSC ?N/a842avai(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]


USBN9602-28M ,(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]General DescriptionThe USBN9602 is an integrated USB Node controller com-trol endpoint EP0 and six ..
USBN9602-28M ,(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11.20 Function Add ..
USBN9602-28MX ,(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 11.12 Receiv ..
USBN9603 ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA Supportfeatures. It is compatible with USB*specification versions 1.0 and 1.1, and is an advanced ver-Impr ..
USBN9603-28M ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportFeaturesThe USBN9603/4 are integrated, USB Node controllers. ●Low EMI, low standby current, 24 MHz ..
USBN9603-28MX ,Universal Serial Bus Full Speed Node Controller with Enhanced DMA SupportFeatures●Full-speed USB node device●Integrated USB transceiver●Supports 24 MHz oscillator circuit w ..
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USBN9602-28M-USBN9602-28MX
(Universal Serial Bus) Full Speed Function Controller with DMA Support [Life-time buy]
November 1998
USBN9602 (Universal Serial Bus)
Full Speed Function Controller With DMA Support
1.0 General Description

The USBN9602 is an integrated USB Node controller com-
patible with the USB Specification Versions 1.0 and 1.1.
Integrated onto a single IC are the required USB trans-
ceiver with a 3.3V Regulator, Media Access Controller,
USB endpoint (EP) FIFOs, a versatile 8-bit parallel inter-
face, MICROWIRE/PLUS™ Interface and a clock genera-
tor. A total of seven FIFO buffers support the different USB
messages: one bidirectional FIFO for the mandatory con-
Block Diagram

Physical Layer Interface (PHY)
Media Access Controller (MAC)
Transceiver
48 MHz
Oscillator
Clock
Generator
XIN
XOUT
CLKOUT
Microcontroller Interface D- Upstream Port
INTR
V3.3 RD WR A0/ALE D[7:0]/AD[7:0]
Endpoint/Control FIFOs

VReg AGND
RESET
Vcc
GND
MODE[1:0]
StatusControl
SIE

USB Event
Detect
Clock
Recovery
trol endpoint EP0 and six FIFOs for an additional six unidi-
rectional Endpoint Pipes to support USB interrupt, bulk and
isochronous data transfers. The 8-bit parallel interface sup-
ports multiplexed and non-multiplexed style CPU
address/data buses. A programmable interrupt output
scheme allows device configuration for different interrupt
signaling requirements.
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