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U5545NL-U5546NL-U5547NL
Monolithic N-Channel JFET Duals
SST/U5545NL Series
Vishay SiliconixNew Product
Monolithic N-Channel JFET DualsFEATURES BENEFITS APPLICATIONS Anti Latchup Capability Monolithic Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: 3 pA Low Noise High CMRR: 100 dB External Substrate Bias—Avoids Latchup Tight Differential Match vs. Current Improved Op Amp Speed, Settling TimeAccuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signal Wideband Differential Amps High-Speed, Temp-Compensated,Single-Ended Input Amps High-Speed Comparators Impedance Converters
DESCRIPTION
The SST/U5545NL Series are monolithic dual n-channelJFETs designed to provide high input impedance (IG < 50 pA)
for general purpose differential amplifiers. The U5545NLfeatures minimum system error and calibration (5-mV offsetmaximum).
Pins 4 and 8 on the SST series and pin 4 on the U series partnumbers enable the substrate to be connected to a positive,external bias (VDD) to avoid latchup.
The SST5546NL/47NL in the SO-8 package provide ease ofmanufacturing. The symmetrical pinout prevents improper
orientation. These part number are available withtape-and-reel options for compatibility with automaticassembly methods.
The hermetically sealed TO-78 package is available with fullmilitary processing.
TO-78Top ViewU5545NLU5546NLU5547NL SUBSTRATE G2 D2
SUBSTRATE S2
Narrow Body SOICTop View
Marking Codes:
SST5546NL - (5546NL)SST5547NL - (5547NL)
CASE, SUBSTRATE
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage -50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (1/16” from case for 10 sec.) 300�C. . . . . . . . . . . . . . . . . . .
Power Dissipation : Per Sidea 250 mW. . . . . . . . . . . . . . . . . . . . . . . .
Totalb 500 mW. . . . . . . . . . . . . . . . . . . . . . . . . . .
