U441 ,N-Channel JFET Monolithic DualU440/441Vishay SiliconixMatched N-Channel JFET Pairs Part Number V (V) V Min (V) g Min ..
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U440-U441
N-Channel JFET Monolithic Dual
U440/441
Vishay Siliconix
Matched N-Channel JFET Pairs�������� �������� ������������ Two-Chip Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: 1 pA Low Noise High CMRR: 85 dB. Minimum Parasitics Ensuring Maximum
High-Frequency Performance Improved Op Amp Speed, Settling Time Accuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signal Wideband Differential Amps High-Speed, Temp-Compensated,
Single-Ended Input Amps High-Speed Comparators Impedance Converters
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The U440/441 are matched pairs of JFETs mounted in a single
TO-71 package. This two-chip design reduces parasitics and
gives better performance at very high frequencies while
ensuring extremely tight matching. These devices are an
excellent choice for use as wideband differential amplifiers in
demanding test and measurement applications.
The hermetically-sealed TO-71 package is available with full
military screening per MIL-S-19500 (see Military Information).
For similar products in SO-8 packaging see the
SST440/SST441 data sheet. For low-noise options, see the
SST/U401 series data sheet. For low-leakage alternatives,
see the U421/423 data sheet.
TO-71Top View
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Gate-Drain, Gate-Source Voltage –25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate-Gate Voltage �50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature –55 to 150�C. . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation : Per Sidea 250 mW. . . . . . . . . . . . . . . . . . . . . . . .
Totalb 500 mW. . . . . . . . . . . . . . . . . . . . . . . . . . .
