TSB83AA22AZAJ ,Integrated IEEE-1394.B OHCI Link and S800 Phy 168-NFBGA 0 to 70SLLA255–APRIL 2006As required by the 1394 Open Host Controller Interface Specification (OHCI) and I ..
TSB83AA22C ,IEEE Std 1394b-2002 PHY and OHCI Link Device 168-NFBGA 0 to 70SLLS802–FEBRUARY 20076.1.21 Maximum Latency Register ... 626.1.22 OHCI Control Register 626.1.23 Ca ..
TSB83AA22C ,IEEE Std 1394b-2002 PHY and OHCI Link Device 168-NFBGA 0 to 70TSB83AA22C IEEE Std 1394b-2002PHY and OHCI Link DeviceData ManualLiterature Number: SLLS802February ..
TSB83AA22CZAJ ,IEEE Std 1394b-2002 PHY and OHCI Link Device 168-NFBGA 0 to 70Thermal Characteristics 272.8 Switching Characteristics for PHY Portion...... 282.9 Switching Char ..
TSB83AA23ZAY ,Integrated IEEE-1394.B OHCI Link and 3 Port S800 Phy 167-NFBGA 0 to 70TSB83AA23 IEEE Std 1394b-2002PHY and OHCI Link DeviceData ManualLiterature Number: SLLU099BAUGUST 2 ..
TSC101AILT ,High side current sense amplifierfeatures a 2.8 to 30 V input common-mode range that is independent of the supply voltage. The main ..
UC1517J/883B , Stepper Motor Drive Circuit
UC1517J/883B , Stepper Motor Drive Circuit
UC1524 ,Advanced Regulating Pulse Width Modulators
UC1524AJ ,Advanced Regulating Pulse Width ModulatorsFEATURESFully Interchangeable withStandard UC1524 FamilyPrecision Reference InternallyTrimmed to i1 ..
UC1524J/883B ,Advanced Regulating Pulse Width Modulators
UC1524J/883B ,Advanced Regulating Pulse Width Modulators
TSB83AA22AZAJ
Integrated IEEE-1394.B OHCI Link and S800 Phy 168-NFBGA 0 to 70
www.ti.com
FEATURES
TSB83AA22A
SLLA255–APRIL 2006
TSB83AA22A IEEE Std 1394b-2002 Phy and OHCI Link Device Low-Jitter, External Crystal Oscillator
Provides Transmit and Receive Dataat•
Fully Supports Provisionsof IEEE Std
100/200/400/800 Mbps and Link-Layer1394b-2002 Revision 1.33+at 1-Gigabit
Controller Clockat 49.152 MHz and 98.304Signaling Rates
MHz•
Fully Supports Provisionsof IEEE Std •
Separate Bias (TPBIAS) for Each Port1394a-2000 and IEEE Std 1394-1995
Standards for High-Performance Serial Bus •
Software Device Reset (SWR) Fully Interoperable With Firewire™, i.LINK™, •
Fail-Safe Circuitry Senses Sudden Lossof
and SB1394 Implementationsof IEEE Std Powerto the Device and Disables the Ports
1394 Ensure That the TSB83AA22A Does Not Load
the TPBIASof Any Connected Device and•
Provides Two Fully Backward-Compatible,
Blocks any Leakage From the Port BacktoIEEE Std 1394a-2000 Fully Compliant)
Power Plane.Bilingual IEEE Std 1394b-2002 Cable Portsatto 800 Megabits per Second (Mbps) •
The TSB83AA22A Has an IEEE Std
1394a-2000-Compliant Common-Mode Noise•
Full IEEE Std 1394a-2000 Support Includes: Filter on Incoming Bias Detect Circuitto Filter– Connection Debounce Out Cross-Talk Noise.– Arbitrated Short Reset •
The TSB83AA22AIs Port Programmableto– Multispeed Concatenation Force IEEE Std 1394a-2000 Modeto Allow– Arbitration Acceleration Useof IEEE Std 1394a-2000 Connectors Fly-By Concatenation (IEEE Std 1394b-2002 Signaling Must Not Be
Put Across IEEE Std 1394a-2000 Connectors– Port Disable/Suspend/Resume Cables).•
Extended Resume Signaling for Compatibility •
3.3-V and 5-V PCI Signaling EnvironmentsWith Legacy DV Devices Serial-Bus Data Ratesof 100 Mbps, 200•
Power-Down Featuresto Conserve Energyin Mbps, 400 Mbps, and 800 MbpsBattery-Powered Applications Physical Write Postingof upto Three•
Low-Power Sleep Mode
Outstanding Transactions•
Fully Compliant With Open Host Controller •
Serial ROMor Boot ROM Interface SupportsInterface (OHCI) Requirements 2-wire Serial EEPROM Devices•
Cable Power Presence Monitoring •
33-MHz/32-Bit PCI Interface•
Cable Ports Monitor Line Conditions for •
Multifunction Terminal (MFUNC Terminal 1):Active Connectionto Remote Node PCI_CLKRUN Protocol per the PCI Mobile•
Register Bits Give Software Controlof Design GuideContender Bit, Power-Class Bits, Link Active
Control Bit, and IEEE Std 1394a-2000 – General-Purpose I/O
Features – CYCLEIN/CYCLEOUT for External Cycle With Other 1394 Physical Timer Control for Customized (Phy) Using 1.8-V, 3.3-V, and 5-V Synchronization
