TSB81BA3EPFP ,IEEE P1394b Three-Port Cable Transceiver Arbiter 80-HTQFP 0 to 70Features (PHYs) Using 1.8-V, 3.3-V, and 5-V Supplies• Low Jitter, External Crystal Oscillator Provi ..
TSB81BA3PFP ,IEEE P1394b s800 Three-Port Cable Transceiver/ArbiterTSB81BA3D, TSB81BA3DIIEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITERSLLS559E − DECEMBER 2002 − REVI ..
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TSB83AA22C ,IEEE Std 1394b-2002 PHY and OHCI Link Device 168-NFBGA 0 to 70TSB83AA22C IEEE Std 1394b-2002PHY and OHCI Link DeviceData ManualLiterature Number: SLLS802February ..
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TSB81BA3E-TSB81BA3EPFP
IEEE P1394b Three-Port Cable Transceiver Arbiter
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TSB81BA3ESLLS783C –MAY 2009–REVISED MARCH 2016
TSB81BA3E IEEE 1394b Three-Port Cable Transceiver/Arbiter Features Fully Supports Provisionsof IEEE P1394b
Revision 1.33+at 1-Gigabit Signaling Rates Fully Supports Provisionsof IEEE 1394a-2000
and 1394-1995 Standardfor High Performance
Serial Bus Fully Interoperable With Firewire, i.LINK, and
SB1394™, Implementationof IEEE Std 1394 Provides Three Fully Backward Compatible,
(1394a-2000 Fully Compliant) Bilingual P1394b
Cable Portsatupto 800 Megabits per Second
(Mbits/s) Provides Three 1394a-2000 Fully Compliant
Cable Portsat 100/200/400 Mbits/s Full 1394a-2000 Support Includes: Connection Debounce Arbitrated Short Reset Multispeed Concatenation Arbitration Acceleration Fly-By Concatenation Port Disable/Suspend/Resume Extended Resume Signaling for Compatibility
With Legacy DV Devices Power-Down Featuresto Conserve Energyin
Battery Powered Applications Low-Power Sleep Mode Fully Compliant With Open Host Controller
Interface (HCI) Requirements Cable Power Presence Monitoring Cable Ports Monitor Line Conditions for Active
Connectionto Remote Node Register Bits Give Software Controlof Contender
Bit, Power Class Bits, Link Active Control Bit, and
1394a-2000 Features Link-Layer Controller Pin Mode (2/4/8 Parallelor 1394b Mode Supports Using
(PHYs) Using 1.8-V, 3.3-V, and 5-V Supplies Low Jitter, External Crystal Oscillator Provides
Transmit and Receive Dataat 100/200/400/800
Mbits/s, and Link-Layer Controller Clockat 49.152
MHz and 98.304 MHz Separate Bias (TPBIAS)for Each Port Low Cost, High Performance 80-Pin TQFP (PFP)
Thermally Enhanced Package and 168-Pin ZAJ
(BGA) Package Software Device Reset (SWR) Fail-Safe Circuitry Senses Sudden Lossof Power the Device and Disables the Portsto Ensure
That the TSB81BA3E Does Not Load the TPBIAS Any Connected Device and Blocks any
Leakage From the Port Backto Power Plane The TSB81BA3E Hasa 1394a-2000 Compliant
Common-Mode Noise Filteron the Incoming Bias
Detect Circuitto Filter Out Cross-Talk Noise The TSB81BA3EIs Port Programmableto Force
1394a Modeto Allow Useof 1394a Connectors
(1394b Signaling Must Not Be Put Across 1394a
Connectorsor Cables) Internal Voltage Regulator Option
DescriptionThe TSB81BA3E provides the digital and analog
transceiver functions neededto implementa three-
port nodeina cable-based IEEE 1394 network. Each
cable port incorporates two differential line
transceivers. The transceivers include circuitry to
monitor the line conditionsas needed for determining
connection status, for initialization and arbitration, and
for packet reception and transmission. The
TSB81BA3Eis designedto interface witha link-layer
controller (LLC), such as the TSB82AA2,
TSB12LV21, TSB12LV26, TSB12LV32, TSB42AA4,
TSB42AB4, TSB12LV01B,or TSB12LV01C.It also
may be connected cable port to cable portto an
integrated 1394 Link+ PHY layer such as the
TSB43AB2.
Device Information(1)