TSB41AB2PAPRG4 ,IEEE 1394a Two-Port Cable Transceiver/Arbiter 64-HTQFP Features Single 3.3-V Supply Operation IEEE 1394a-2000 Compliant Common ModeNoise Filter on Incom ..
TSB41AB3 ,IEEE 1394a Three-Port Cable Transceiver/ArbiterFeatures to Conserve EnergyTSB41LV03APFP and TSB41LV03PFPin Battery Powered Applications Include: ..
TSB41AB3IPFP , IEEE 1394A-2000 THREE-PORT CABLE TRANSCEIVER / ARBITER
TSB41AB3PFP ,IEEE 1394a Three-Port Cable Transceiver/ArbiterFeatures to Conserve EnergyTSB41LV03APFP and TSB41LV03PFPin Battery Powered Applications Include: ..
TSB41AB3PFPG4 ,IEEE 1394a Three-Port Cable Transceiver/Arbiter 80-HTQFP 0 to 70 SLLS418I − JUNE 2000 − REVISED DECEMBER 2 ..
TSB41LV03A ,IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITERSLLA225–JUNE 2006When the TSB41LV03A is used with one or more of the ports not brought out to a con ..
UBA2070T/N1 ,UBA2070; 600 V CCFL ballast driver IC
UBA2071T , Half bridge control IC for CCFL backlighting
UBA2213BT ,Non-dimmable driver IC for CFL with boost
UBA2213CT ,Non-dimmable driver IC for CFL with boost
UC-0.5 , P-Clips
UC1517J/883B , Stepper Motor Drive Circuit
TSB41AB2-TSB41AB2PAP-TSB41AB2PAPG4-TSB41AB2PAPR-TSB41AB2PAPRG4
IEEE 1394a Two-Port Cable Transceiver/Arbiter
Fully Compliant With OpenHCIRequirements Provides Two IEEE 1394a-2000 Fully
Compliant Cable Ports at 100/200/400
Megabits Per Second (Mbits/s) Full IEEE 1394a-2000 Support Includes:
Connection Debounce, Arbitrated Short
Reset, Multispeed Concatenation,
Arbitration Acceleration, Fly-By
Concatenation, Port
Disable/Suspend/Resume Register Bits Give Software Control of
Contender Bit, Power Class Bits, Link
Active Control Bit and IEEE 1394a-2000
Features IEEE 1394a-2000 Compliant Common Mode
Noise Filter on Incoming TPBIAS Extended Resume Signaling for
Compatibility With Legacy DV Devices, and
Terminal- and Register-Compatibility With
TSB41LV02A, Allow Direct Isochronous
Transmit to Legacy DV Devices With Any
Link Layer Even When Root Power-Down Features to Conserve Energy
in Battery Powered Applications Include:
Automatic Device Power Down During
Suspend, Device Power-Down Terminal,
Link Interface Disable via LPS, and Inactive
Ports Powered Down
Back to the Device Power Plane Software Device Reset (SWR) Industry Leading Low Power Consumption Ultralow-Power Sleep Mode Cable Power Presence Monitoring Cable Ports Monitor Line Conditions for
Active Connection to Remote Node Data Interface to Link Layer Controller
Through 2/4/8 Parallel Lines at 49.152 MHz Interface to Link Layer Controller Supports
Low-Cost TI Bus-Holder Isolation and
Optional Annex J Electrical Isolation Interoperable With Link Layer Controllers
Using 3.3 V Single 3.3-V Supply Operation Low-Cost 24.576-MHz Crystal Provides
Transmit, Receive Data at 100/200/400
Mbits/s, and Link-Layer Controller Clock at
49.152 MHz Low-Cost High-Performance 64-Pin TQFP
Thermally Enhanced PowerPAD Package
Increases Thermal Performance by up to
210% Meets Intel Mobile Power Guideline 2000 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.
FireWire is a trademark of Apple Computer, Incorporated.
i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation.
Intel is a trademark of Intel Corporation
