TS59C11CP ,1K BIT SERIAL CMOS EEPROM£7] 'iiifiilll1il!l!ltflll! TS59C11
1K BIT SERIAL CMOS EEPROM
I HIGHLY RELIABLE CMOS FLOATING ..
TS5A1066DBVR ,10-Ohm SPST Analog SwitchFEATURESDBV OR DCK PACKAGE• Low ON-State Resistance (10Ω)(TOP VIEW)• Control Inputs Are 5.5-V Toler ..
TS5A1066DCKR ,10-Ohm SPST Analog SwitchElectrical Characteristics for 5-V SupplyV = 4.5 V to 5.5 V, T = –40°C to 85°C (unless otherwise no ..
TS5A12301E ,IEC Level 4 ESD Protected, 0.75-Ohm SPDT Analog Switch with 1.8-V Logic Compatible Input LogicFeatures 2 Applications1• Low ON-State Resistance (0.75Ω) • Cell Phones• Low Charge Injection • PDA ..
TS5A12301EYFPR ,IEC Level 4 ESD Protected, 0.75-Ohm SPDT Analog Switch with 1.8-V Logic Compatible Input Logic 6-DSBGA -40 to 85features make this device suitable for portable• ESD Performance COM Port to GNDaudio applications. ..
TS5A12301EYFPR ,IEC Level 4 ESD Protected, 0.75-Ohm SPDT Analog Switch with 1.8-V Logic Compatible Input Logic 6-DSBGA -40 to 85Electrical Characteristics – 2.5-V Supply 812.3 Trademarks..... 196.8 Typical Characteristics...... ..
UA709 ,HIGH-PERFORMANCE OPERATIONAL AMPLIFIERapplications and for the generation of special
linear and nonlinear transfer functions.
ABSOLUT ..
UA709HC ,HIGH-PERFORMANCE OPERATIONAL AMPLIFIERfeatures low offset, high input impedance,
large input common mode range, high output swing under ..
UA709HM ,HIGH-PERFORMANCE OPERATIONAL AMPLIFIERGENERAL DESCRIPTION - The pA709 is a monolithic High Gain Operational Amplifier con-
structed usin ..
UA709PC ,HIGH-PERFORMANCE OPERATIONAL AMPLIFIERELECTRICAL CHARACTERISTICS: TA " +25''C, 19 V < VS < t15 V unless otherwise specified.
CHARACTER ..
UA709TC ,High-performance operational amplifierapplications and for the generation of special
linear and nonlinear transfer functions.
ABSOLUT ..
UA709TC ,High-performance operational amplifierELECTRICAL CHARACTERISTICS: TA " +25''C, 19 V < VS < t15 V unless otherwise specified.
CHARACTER ..
TS59C11CP
1K BIT SERIAL CMOS EEPROM
SGSciriM0lNSORl
(ieilfl(l20cW5)ELaE(WlWml(l2S TS59CI 1
1K BIT SERIAL CMOS EEPROM
a HIGHLY RELIABLE CMOS FLOATING GATE
TECHNOLOGY.
:1 SINGLE 5-VOLT SUPPLY
n EIGHT PIN PACKAGE.
a 64x 16 OR 128x8 USER SELECTABLE
SERIAL MEMORY
u COMPATIBLE WITH GENERAL p
INSTRUMENT Gl 5911 DlP-8
u SELF TIMED PROGRAMMING CYCLE (Plastic Package)
n WORD AND CHIP ERASABLE (Ordering Information at the end of the datasheet)
a 10,000 ERASEIWRITE CYCLES.
u TEN YEARS DATA RETENTION PIN CONNECTIONS
n POWER-ON DATA PROTECTION
PIN NAMES cs i 1 e ]t+5\_/)vcc
cs CHIP SELECT --
CLK I 2 7 ]RDYIBUSV
CLK CLOCKINPUT
DI SERIAL DATA INPUT DI E3 5] ORG
DO SERIAL DATA OUTPUT
DO El. 5 ] GND
ORG ORGANlZATtONlNPUT
RIB" READY/B‘W OUTPUT 5-10653
Vcc +5V POWER SUPPLY
GND GROUND
PIN DESCRIPTION
Name No Description
CS 1 Chip Select
CLK 2 Clock Input
DI 3 Serial Data Input
DO 4 Serial Data Output
GND 5 Ground
ORG 6 Memory Array Organization Selection input. When the ORG pin is connected to +5, the
64 x 16 organization is selected. When it is connected to ground, the 128 x tr organization
is selected. If the ORG pin is left unconnected, then an internal pull up device will select
the 64 x 16 organization.
HDy/WitTir 7 Status Output
Vcc 8 + 5V Power Supply
June 1988 1/8
This Material Copyrighted By Its Respective Manufacturer
This Material
T359011
BLOCK DIAGRAM
Vcc 6110
MEMORY
AR R AY ADORE ty S
0% - fl’ 128x s 'tcr oecooén
or tit; x16
OATA REGISTER 35:25; ----o.DC)
DECODER -
CS -----F LOGIC -.s-RDY Ieusv
- - c oc
CLK GENERA:0R s- 1061.5
INSTRUCTION SET
I i St rt bit 0 d Address Data C
nstruet on a PGO e 128 x 8 64 x 16 123 M a 64 x " orttments
READ 1 1000 As-Ao As-Ao Read Address AN-Ao
PROGRAM 1 x 100 As-Ao As-Ao DTDO D15-Do Program Address AN-Ao
PEN 1 0011 0000000 000000 Program Enable
PDS 1 0000 0000000 000000 Program Disable
ERAL 1 0010 o000000 000000 Erase All Addresses
WRAL 1 0001 0000000 000000 Dr-Do 015-00 Program All Addresses
Dl/DO: It is possible to connect the Data In and
Data Out pins together. However, with this config-
uration it si possible for a "bus conflict" to occur
during the "dummy zero" that precedes the read
operation, if A0 is a logic high level. Under such
a condition the voltage level seen at Data Out is
undefined and will depend upon the relative im-
pedances of Data Out and the signal source driv-
ing A0. The higher the current sourcing capability
ABSOLUTE MAXIMUM RATINGS
of A0, the higher the voltage at the Data Out pin.
POWER-ON DATA PROTECTION CIRCUITRY:
During power-up all modes of operation are inhibit-
ed until Vcc has reached a level of between 2.8
and 3.5 volts. During power-down the source data
protection circuitry acts to inhibit ail modes when
VCC has fallen below the voltage range of 2.8 to
3.5 volts.
Symbol Parameter Value Unit
Vcc Supply voltage + 7 V
Voltage on any input pin GND -0.3 to +7 V
Voltage or any output pin VCC +0.3 V
GND - 0.3
TSTG Storage temperature range --65 to + 150 °C
Lead temperature (Soldering: 10 seconds) +300 °C
2/8 Ki 1ilif,,r;,gl,feltil-,!i,yilll,
Copyrighted By Its Respective Manufacturer
