TS3V912-TS3V912I Fast Delivery |IC PHOENIX CO.,LIMITED

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TS3V912-TS3V912I
3V RAIL TO RAIL CMOS DUAL OPERATIONAL AMPLIFIER
TS3V912 RAIL TO RAIL
CMOS DUAL OPERATIONAL AMPLIFIER
October 1997 DEDICATED TO 3.3V OR BATTERY SUPPLY
(specifiedat 3V and 5V). RAIL TO RAIL INPUT AND OUTPUT
VOLTAGERANGES. SINGLE SUPPLY OPERATION FROM 2.7V 16V. EXTREMELY LOW INPUT BIAS CURRENT:
1pA typ. LOW INPUT OFFSET VOLTAGE: 2mV max.. SPECIFIED FOR 600Ω AND 100Ω LOADS. LOW SUPPLYCURRENT: 200μA/Ampli
(VCC= 3V). ESD TOLERANCE: 3KV. LATCH-UP IMMUNITY. MACROMODEL INCLUDEDIN THIS
SPECIFICATION -
Inverting Input1
Output1
Non-inverting Input1CCCC+
Output2
Inverting Input2
Non-inverting Input2
PIN CONNECTIONS (top view)
DESCRIPTION
The TS3V912isa RAIL TO RAIL CMOS dual
operational amplifier designedto operate witha
single 3V supply voltage.
The input voltage range Vicm includes the two
supply rails VCC+ and VCC-.
The output reaches:• VCC- +40mV VCC+ -50mV withRL= 10kΩ VCC- +350mV VCC+ -350mV withRL= 600Ω
This product offersa broad supply voltage operat-
ing range from 2.7Vto 16V anda supply currentof
only 200μA/amp. (VCC= 3V).
Source and sink output current capabilityis typi-
cally 40mA (at VCC= 3V), fixed by an internal
limitation circuit.
SGS-THOMSONis offeringa quad op-amp with
the same features: TS3V914.
ORDER CODES
Part Number Temperature Range Package
TS3V912I/AI/BI -40, +125oC ••
DIP8
(Plastic Package)
SO8
(Plastic Micropackage)
1/11
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage- (note1) 18 V
Vid Differential Input Voltage- (note2) ±18 V Input Voltage- (note3) -0.3to18 V
Iin Currenton Inputs ±50 mA Currenton Outputs ±130 mA
Toper Operating FreeAir Temperature Range
TS3V912I/AI/BI -40to +125C
Tstg Storage Temperature -65to +150 oC
Notes: 1.All voltage values, except differential voltageare with respectto network ground terminal. Differential voltagesare thenon-inverting input terminal withrespect tothe invertinginputterminal. The magnitudeof inputand outputvoltages mustnever exceedVCC+ +0.3V.
OPERATING CONDITIONS
Symbol Parameter Value Unit
VCC Supply Voltage 2.7to16 V
Vicm Common Mode Input Voltage Range VCC- -0.2to VCC+ +0.2 V
Non-inverting
Input Inverting
Input
Internal
Vref
OutputCCCC
SCHEMATIC DIAGRAM (1/2 TS3V912)
TS3V912
2/11
ELECTRICAL CHARACTERISTICS
VCC+ =3V, VCC- =0V, RL,CL connectedto VCC/2, Tamb =25oC (unless otherwise specified)
Symbol Parameter TS3V912I/AI/BI UnitMin. Typ. Max.
Vio Input Offset Voltage (Vic =Vo =VCC/2) TS3V912
TS3V912A
TS3V912B
Tmin.≤ Tamb≤ Tmax. TS3V912
TS3V912A
TS3V912B
DVio Input Offset Voltage Drift 5 μV/oC
Iio Input Offset Current- (note1)
Tmin.≤ Tamb≤ Tmax. 100
Iib Input Bias Current- (note1)
Tmin.≤ Tamb≤ Tmax. 150
ICC Supply Current (per amplifier, AVCL=1,no load)
Tmin.≤ Tamb≤ Tmax.
200 300
CMR Common Mode Rejection Ratio Vic=0to 3V,Vo= 1.5V 70 dB
SVR Supply VoltageRejection Ratio (VCC+= 2.7to 3.3V,VO =VCC/2) 50 80 dB
Avd Large Signal Voltage Gain (RL= 10kΩ,VO= 1.2Vto 1.8V)
Tmin.≤ Tamb≤ Tmax. V/mV
VOH High Level Output Voltage(Vid= 1V) RL= 100kΩ= 10kΩ= 600Ω= 100Ω
Tmin.≤ Tamb≤ Tmax. RL= 10kΩ= 600Ω
VOL Low Level Output Voltage (Vid= -1V) RL= 100kΩ= 10kΩ= 600Ω= 100Ω
Tmin.≤ Tamb≤ Tmax. RL= 10kΩ= 600Ω
600 Output Short Circuit Current (Vid= ±1V) Source (Vo =VCC−)
Sink (Vo =VCC+)
GBP Gain Bandwidth Product
(AVCL= 100,RL= 10kΩ,CL= 100pF,f= 100kHz) 0.8
MHz+ Slew Rate (AVCL =1,RL= 10kΩ,CL= 100pF,Vi= 1.3Vto 1.7V) 0.4 V/μs- Slew Rate (AVCL =1,RL= 10kΩ,CL= 100pF,Vi= 1.3Vto 1.7V) 0.3 V/μs Phase Margin 30 Degrees Equivalent Input Noise Voltage (Rs= 100Ω,f= 1kHz) 30 nVHz
VO1/VO2 Channel Separation(f= 1kHz) 120 dB
Note1: Maximum values including unavoidable inaccuraciesofthe industrial test.
TS3V912
3/11
ELECTRICALCHARACTERISTICS
VCC+ =5V,VCC- =0V, RL,CL connectedto VCC/2, Tamb =25oC (unless otherwise specified)
Symbol Parameter TS3V912I/AI/BI UnitMin. Typ. Max.
Vio Input Offset Voltage (Vic =Vo =VCC/2) TS3V912
TS3V912A
TS3V912B
Tmin.≤ Tamb≤ Tmax. TS3V912
TS3V912A
TS3V912B
DVio Input Offset Voltage Drift 5 μV/oC
Iio Input Offset Current- (note1)
Tmin.≤ Tamb≤ Tmax. 100
Iib Input Bias Current- (note1)
Tmin.≤ Tamb≤ Tmax. 150
ICC Supply Current (per amplifier, AVCL=1,no load)
Tmin.≤ Tamb≤ Tmax.
230 350
CMR Common Mode Rejection Ratio
Vic= 1.5to 3.5V, Vo= 2.5V 60 85
SVR Supply Voltage Rejection Ratio (VCC+=3to 5V,VO =VCC/2) 55 80 dB
Avd Large Signal VoltageGain (RL= 10kΩ,VO= 1.5Vto 3.5V)
Tmin.≤ Tamb≤ Tmax. V/mV
VOH High Level Output Voltage (Vid= 1V) RL= 100kΩ= 10kΩ= 600Ω= 100Ω
Tmin.≤ Tamb≤ Tmax. RL= 10kΩ= 600Ω
VOL Low Level Output Voltage (Vid= -1V) RL= 100kΩ= 10kΩ= 600Ω= 100Ω
Tmin.≤ Tamb≤ Tmax. RL= 10kΩ= 600Ω
750 Output Short Circuit Current (Vid= ±1V) Source (Vo =VCC−)
Sink (Vo =VCC+)
GBP Gain Bandwidth Product
(AVCL= 100,RL= 10kΩ,CL= 100pF,f= 100kHz) 1
MHz+ Slew Rate (AVCL =1,RL= 10kΩ,CL= 100pF,Vi=1Vto 4V) 0.8 V/μs- Slew Rate (AVCL =1,RL= 10kΩ,CL= 100pF,Vi=1Vto 4V) 0.6 V/μs Equivalent Input Noise Voltage (Rs= 100Ω,f= 1kHz) 30 nVHz
VO1/VO2 Channel Separation(f= 1kHz) 120 dB Phase Margin 30 Degrees
Note1 :Maximum values includingunavoidable inaccuraciesofthe industrial test.
TS3V912
4/11
TYPICAL CHARACTERISTICSSUPPLY VOLTAGE,V (V)
04812 1625 C1V/2
amb
VCL
OCC
SUPPLY
CURRENT,
Figure1: Supply Current (each amplifier)
versusSupply Voltage 50 75 100 125
INPUT
BIAS
CURRENT,
(pA)= 10V5V load
ambTEMPERATURE,T (C)
Figure2: Input Bias Current versus Temperature 28 42 56 70
OUTPUT
VOLTAGE,
(V)
amb25C= -100mV = +5VCC= +3VCCOUTPUT CURRENT,I (mA)
Figure4a: Low Level Output Voltage versus
Low Level Output Current
OUTPUT
VOLTAGE,
(V)
amb25C= -100mV 10VCC= 16VCCOUTPUT CURRENT,I (mA) 28 42 56 70
Figure4b: Low Level Output Voltage versus
Low Level Output Current
-70 -56 -42 -28 -14 0
OUTPUT
VOLTAGE,
(V)
amb25C= 100mV V= +5VCC= +3VCCOUTPUT CURRENT,I (mA)
Figure3a: High Level Output Voltage versus
High Level Output Current
OUTPUT
VOLTAGE,
(V)= +16VCC= +10VCCOUTPUT CURRENT,I (mA)
-70 -56 -42 -28 -14 0
amb T=25C= 100mV
Figure3b: High Level Output Voltage versus
High Level Output Current
TS3V912
5/11
GAIN
(dB)
PHASE
(Degrees)
FREQUENCY,f (Hz)
PHASE
GAIN
Phase
Margin
Gain
Bandwidth
Product1010 2310 410 510 710 25 C = 10V= 10k Ω= 100pF =100
amb
VCL
Figure5a: Open Loop Frequency Response
and Phase Shift
GAIN
(dB)
PHASE
(Degrees)
FREQUENCY,f (Hz)
PHASE
GAIN
PhaseMargin
Gain
Bandwidth
Product1010 2310 410 510 710 25 C 10V= 600ΩC= 100pF = 100
amb
VCL
Figure5b: Open Loop Frequency Response
and Phase Shift
SUPPLY VOLTAGE,V (V)CC 8 12 16
GAIN
BANDW.
PROD.,
GBP
(kHz) T=25 C = 10kΩ= 100pF
amb1400
Figure6a: Gain Bandwidth Product versus
Supply Voltage
SUPPLYVOLTAGE,V (V)CC 8 12 16
GAIN
BANDW.
PROD.,
GBP
(kHz) T=25 C = 600Ω= 100pF
amb
Figure6b: Gain bandwidthProduct versus
Supply Voltage
SUPPLY VOLTAGE,V (V)CC 8 12 16
PHASE
MARGIN,
(Degrees) 25 C = 10kΩ= 100pF
amb
Figure7a: Phase Margin versus Supply Voltage
SUPPLY VOLTAGE,V (V)CC 8 12 16
PHASE
MARGIN,
(Degrees) 25 C 600Ω= 100pF
amb
Figure7b: Phase Margin versus Supply Voltage
TS3V912
6/11

Partno	Mfg	Dc	Qty	Available	Descript
TS3V912	TI	N/a	2	avai	3V RAIL TO RAIL CMOS DUAL OPERATIONAL AMPLIFIER
TS3V912I	ST	N/a	996	avai	3V RAIL TO RAIL CMOS DUAL OPERATIONAL AMPLIFIER