TS27M2ACDT ,PRECISION LOW POWER CMOS DUAL OP-AMPSapplications.PThree power consumptions are available allowingTSSOP8to have always the best consumpt ..
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TS27M2ACDT
PRECISION LOW POWER CMOS DUAL OP-AMPS
LOW POWER CONSUMPTION : 150μA/op OUTPUT VOLTAGE CAN SWING TOGROUND EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS STABLE AND LOW OFFSET VOLTAGE THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTIONThese devices are low cost, low power dual oper-
ational amplifiers designed to operate with single
or dual supplies. These operational amplifiers use
the ST silicon gate CMOS process allowing an ex-
cellent consumption-speed ratio. These series are
ideally suited for low consumption applications.
Three power consumptions are available allowing
to have always the best consumption-speed ratio: ICC = 10μA/amp.: TS27L2 (very low power)ICC = 150μA/amp.: TS27M2 (low power)ICC = 1mA/amp.: TS272 (standard)
These CMOS amplifiers offer very high input im-
pedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see fig-
ure 2).
ORDER CODE
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT)
PIN CONNECTIONS (top view)
TS27M2C,I,MPRECISION LOW POWER
CMOS DUAL OPERATIONAL AMPLIFIERS
TS27M2C,I,M
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS All values, except differential voltage are with respect to network ground terminal. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
TS27M2C,I,M
SCHEMATIC DIAGRAM (for 1/2 TS27M2)
TS27M2C,I,M
ELECTRICAL CHARACTERISTICSVCC+ = +10V, VCC- = 0V, Tamb = +25°C (unless otherwise specified) Maximum values including unavoidable inaccuracies of the industrial test.
TS27M2C,I,M
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each amplifier) versus Supply Voltage
Figure 2 : Input Bias Current versus Free Air Temperature
Figure 3a : High Level Output Voltage versus High Level Output Current
Figure 3b : High Level Output Voltage versus High Level Output Current
Figure 4a : Low Level Output Voltage versus Low Level Output Current
Figure 4b : Low Level Output Voltage versus Low Level Output Current
TS27M2C,I,M
Figure 5 : Open Loop Frequency Response and Phase Shift
Figure 6 : Gain Bandwidth Product versus SupplyVoltage
Figure 7 : Phase Margin versus Supply Voltage
Figure 8 : Phase Margin versus Capacitive Load
Figure 9 : Slew Rate versus Supply Voltage
Figure 10 : Input Voltage Noise versus Frequency
