TPIC6B273DWRG4 ,Octal D-type Latch 20-SOIC TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995* Low r ...5 W T ..
TPIC6B273N ,Octal D-type Latchlogic diagram (positive logic)4DRAIN11CLR CLR2D1 1D11CLK C15DRAIN2CLR31DD2C16DRAIN3CLR81DD3C17DRAIN ..
TPIC6B595 ,8-Bit Shift RegisterMaximum Ratings.. 411 Layout.... 166.2 ESD Ratings ...... 411.1 Layout Guidelines.... 166.3 Recomme ..
TPIC6B595DW ,8-Bit Shift RegisterTable of Contents8.2 Functional
TPIC6B595DWG4 ,8-Bit Shift Register 20-SOIC Maximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNIT(2) ..
TPIC6B595DWR ,8-Bit Shift RegisterSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareTPIC6B595SLIS032B–JU ..
TS3V339IN ,3V MICROPOWER QUAD CMOS VOLTAGE COMPARATORTS3V339C,I,M3V MICROPOWER QUAD CMOS VOLTAGE COMPARATORS ■ DEDICATED TO 3.3V OR BATTERY SUPPLY ..
TS3V340 ,Quad SPDT High-Bandwidth Video Switch with Low and Flat On-State Resistance SCDS172A - JULY 2004 − REVIS ..
TS3V340DGVR ,Quad SPDT High-Bandwidth Video Switch with Low and Flat On-State Resistance SCDS172A - JULY 2004 − REVIS ..
TS3V340DGVR ,Quad SPDT High-Bandwidth Video Switch with Low and Flat On-State Resistance SCDS172A - JULY 2004 − REVIS ..
TS3V340PW ,Quad SPDT High-Bandwidth Video Switch with Low and Flat On-State Resistance SCDS172A - JULY 2004 − REVIS ..
TS3V340PWR ,Quad SPDT High-Bandwidth Video Switch with Low and Flat On-State Resistance SCDS172A - JULY 2004 − REVIS ..
TPIC6B273-TPIC6B273DW-TPIC6B273DWR-TPIC6B273DWRG4-TPIC6B273N
Octal D-type Latch
500-mA Typical Current-Limiting Capability Output Clamp Voltage... 50 V Low Power Consumption
descriptionThe TPIC6B273 is a monolithic, high-voltage,
medium-current, power logic octal D-type latch
with DMOS-transistor outputs designed for use in
systems that require relatively high load power.
The device contains a built-in voltage clamp on
the outputs for inductive transient protection.
Power driver applications include relays, sole-
noids, and other medium-current or high-voltage
loads.
The TPIC6B273 contains eight positive-edge-
triggered D-type flip-flops with a direct clear input.
Each flip-flop features an open-drain power
DMOS-transistor output.
When clear (CLR) is high, information at the D
inputs meeting the setup time requirements is
transferred to the DRAIN outputs on the positive-
going edge of the clock (CLK) pulse. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the clock input (CLK)
is at either the high or low level, the D input signal
has no effect at the output. An asynchronous CLR
is provided to turn all eight DMOS-transistor
outputs off. When data is low for a given output,
the DMOS-transistor output is off. When data is
high, the DMOS-transistor output has sink-current
capability.
Outputs are low-side, open-drain DMOS
transistors with output ratings of 50 V and 150-mA
continuous sink-current capability. Each output
provides a 500-mA typical current limit at
TC = 25°C. The current limit decreases as the
junction temperature increases for additional
device protection.
The TPIC6B273 is characterized for operation over the operating case temperature range of –40°C to 125°C.
DRAIN1
DRAIN2
DRAIN3
DRAIN4
GND
DRAIN8
DRAIN7
DRAIN6
DRAIN5
CLK
logic symbol†CLK
DRAIN1
DRAIN2
DRAIN3
DRAIN4
DRAIN5
DRAIN6
DRAIN7
DRAIN8
CLR This symbol is in accordance with ANSI/IEEE Standard 91-1984
and IEC Publication 617-12.
FUNCTION TABLE
(each channel)H = high level, L = low level, X = irrelevant
2D1D28D39D4D5 13D6D7 19D8
