TPIC6B259DWR ,8-Bit Addressable Latch TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH SLIS030 – APRIL 1994 – REVISED JULY 1995* Low r ...5 ..
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TPIC6B259N ,8-Bit Addressable Latchlogic diagram (positive logic)4DRAIN03S0DC1CLR5DRAIN1DC1CLR6DRAIN2DC18S1CLR7DRAIN3DC1CLR1412DRAIN4S ..
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TPIC6B259DWR-TPIC6B259DWRG4-TPIC6B259N
8-Bit Addressable Latch
500-mA Typical Current-Limiting Capability Output Clamp Voltage... 50 V Four Distinct Function Modes Low Power Consumption
descriptionThis power logic 8-bit addressable latch controls
open-drain DMOS-transistor outputs and is
designed for general-purpose storage
applications in digital systems. Specific uses
include working registers, serial-holding registers,
and decoders or demultiplexers. This is a multi-
functional device capable of storing single-line
data in eight addressable latches and 3-to-8
decoder or demultiplexer with active-low DMOS
outputs.
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
as enumerated in the function table. In the
addressable-latch mode, data at the data-in (D)
terminal is written into the addressed latch. The
addressed DMOS-transistor output inverts the
data input with all unaddressed DMOS-transistor
outputs remaining in their previous states. In the
memory mode, all DMOS-transistor outputs
remain in their previous states and are unaffected
by the data or address inputs. To eliminate the
possibility of entering erroneous data in the latch,
enable G should be held high (inactive) while the
address lines are changing. In the 3-to-8 decoding
or demultiplexing mode, the addressed output is
inverted with respect to the D input and all other
outputs are off. In the clear mode, all outputs are off and unaffected by the address and data inputs. When data
is low for a given output, the DMOS-transistor output is off. When data is high, the DMOS-transistor output has
sink-current capability.
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous
sink-current capability. Each output provides a 500-mA typical current limit at TC = 25°C. The current limit
decreases as the junction temperature increases for additional device protection.
The TPIC6B259 is characterized for operation over the operating case temperature range of –40°C to 125°C.
DRAIN0
DRAIN1
DRAIN2
DRAIN3
GND
GND
DRAIN7
DRAIN6
DRAIN5
DRAIN4
GND
FUNCTION TABLE
LATCH SELECTION TABLENC – No internal connection
H = high level, L = low level