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TPIC6A595DW-TPIC6A595NE Fast Delivery,Good Price
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TPIC6A595DWTIN/a3263avai8-Bit Shift Register
TPIC6A595NETIN/a3avai8-Bit Shift Register


TPIC6A595DW ,8-Bit Shift Registerfeatures an independent 3 22G Vchopping current-limiting circuit to prevent 4 21CCPGND PGNDdamage i ..
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TPIC6A595DW-TPIC6A595NE
8-Bit Shift Register
50-V Switching Capability Devices Are Cascadable Low Power Consumption
description

The TPIC6A595 is a monolithic, high-voltage,
high-current power logic 8-bit shift register
designed for use in systems that require relatively
high load power. The device contains a built-in
voltage clamp on the outputs for inductive
transient protection. Power driver applications
include relays, solenoids, and other medium-cur-
rent or high-voltage loads. Each open-drain
DMOS transistor features an independent
chopping current-limiting circuit to prevent
damage in the case of a short circuit.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit, D-type storage
register. Data transfers through both the shift and
storage registers on the rising edge of the shift-
register clock (SRCK) and the register clock
(RCK), respectively. The storage register
transfers data to the output buffer when shift-
register clear (SRCLR) is high. When SRCLR is
low, the input shift register is cleared. When output
enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held
low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for
cascading of the data from the shift register to additional devices.
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and a 350-mA continuous sink
current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high,
the DMOS-transistor outputs have sink current capability.
Separate power ground (PGND) and logic ground (LGND) terminals are provided to facilitate maximum system
flexibility. All PGND terminals are internally connected, and each PGND terminal must be externally connected
to the power system ground in order to minimize parasitic impedance. A single-point connection between LGND
and PGND must be made externally in a manner that reduces crosstalk between the logic and load circuits.
The TPIC6A595 is offered in a thermally-enhanced dual-in-line (NE) package and a wide-body surface-mount
(DW) package. The TPIC6A595 is characterized for operation over the operating case temperature range of
−40°C to 125°C.
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