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TP3410J
TP3410 ISDN Basic Access Echo-Cancelling 2B1Q U Transceiver
TL/H/9151
TP3410
ISDN
Basic
Access
Echo-Cancelling
Transceiver
September 1994
TP3410 ISDN Basic Access
Echo-Cancelling 2B1QU Transceiver
General Description
The TP3410isa complete monolithic transceiverfor ISDN
Basic Access data transmissionat eitherendoftheU inter-
face. Fully compatible with ANSI specification T1.601,itis
builton National’s advanced double-metal CMOS process,
and requires onlya single a5V power supply.A totalof
160 kbps full-duplex transmissionona single twisted-pairis
provided, with user-accessible channels including2‘B’
channels, eachat64 kbps,1 ‘D’channelat16 kbps,andan
additional4 kbpsfor loop maintenance.12 kbpsof band-
widthis reservedfor framing. 2B1Q Line codingis used,in
which pairsof binary bitsare coded into1of4 quantum
levelsfor transmissionat80k symbols/sec (hence 2Binary/ Quaternary).To meetthe very demanding specifications
fork1in 10e7Bit Error Rate evenon long loops withcross-
talk,the device includes2 Adaptive Digital Signal Proces-
sors,2 Digital Phase-locked Loopsanda controller forauto-
matic activation.
The digital interfaceonthe devicecanbe programmedfor
compatibilitywith eitheroftwo typesof control interfacefor
chip control and accesstoall spare bits.In one modea
Microwire serial control interfaceis used together witha
2BaD digital interface whichis compatible withthe Time-di-
vision Multiplexed formatof PCM Combo devicesand back-
planes. This mode allows independent time-slot assignment
forthe2B channelsandtheD channel.
Alternatively,theGCI (General Circuit Interface) maybese-
lected,in whichthe 2BaD datais multiplexed togetherwith
control, sparebitsand loop maintenance dataon4 pins.
Features2 ‘B’a‘D’ channel160 kbps transceiverforLTandNT Meets ANSI T1.601 U.S. Standard 2B1Qline coding with scrambler/descrambler Range exceeds18kftof Ý26 AWG l70dB adaptive echo-cancellationand equalization On-chip timing recovery,no precision external
components Direct connectionto smallline transformer Automatic activation controller Selectable digital interface formats: TDM with time-slot assignerupto64 slots, plus
MICROWIRETM control interfaceGCI (General Circuit Interface),orIDL (Inter-chip Digital Link) Backplane clock DPLL allows free-running XTAL Elastic data buffers meet Q.502 wander/jitterfor Slave-
slave modeon PBX Trunk Cardsand DLC EOCand sparebits access with automatic validation Block error counter6 loopbacktest modes Single a5V supply,325 mW active power20 mWidle mode withline signal ‘‘wake-up’’ detector
ApplicationsLT, NT-1, NT-2 Trunks, U-TE’s, Regeneratorsetc. Digital Loop Carrier POTS Pair-Gain Systems Easy Interfaceto: Line Card Backplanes‘‘S’’ Interface Device TP3420A Codec/Filter Combos TP3054/7 and TP3075/6 LAPD Processor MC68302, HPC16400 HDLC Controller TP3451
ComboÉandTRI-STATEÉareregisteredtrademarksofNationalSemiconductorCorporation.
MICROWIRETMis atrademarkof National SemiconductorCorporation.
TheGeneralCircuit Interface (G.C.I.)isaninterfacespecificationofthe Group-of-FourEuro-
pean Telecommunications Companies.
Block Diagram
TL/H/9151–1Note: Pinnames showMicrowire mode.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
