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TP3404V/NOPB
Quad Digital Adapter for Subscriber Loops (QDASL) 28-PLCC
NRND
TP3404
www.ti.com SNOS703–DECEMBER 2004
TP3404 Quad Digital Adapter for Subscriber Loops (QDASL)
Checkfor Samples: TP3404
1FEATURES DESCRIPTIONThe TP3404isa combination 4-line transceiver for
23• 4 COMPLETE ISDN PBX 2-WIRE DATA voice and data transmission on twisted pair
TRANSCEIVERS INCLUDING: subscriber loops, typically in PBX line card
• Quad2B PlusD Channel Interface for PBX applications. It is a companion device to the
“U” Interface TP3401/2/3 DASL single-channel transceivers. In
additionto4 independent transceivers,a time-slot
• 144 kb/s Full-Duplex on1 Twisted Pair Usingassignment circuitis includedto support interfacingto
Burst Mode Transmission Technique the system backplane.
• Loop Range upto6 kft (#24AWG)Each QDASL line operatesas an ISDN “U” Interface
• Alternate Mark Inversion Coding with Transmit for short loop applications, typically ina PBX
Pulse Shaping DAC, Smoothing Filter, and environment, providing transmission for2B channels
Scrambler for Low Emi Radiation and1D channel.
• Adaptive Line Equalizer Full-duplex transmissionat 144 kb/sis achieved on
• On-Chip Timing Recovery, No External single twisted wire pairs using a burst-mode
Components technique (Time Compression Multiplexed). All timing
Programmable Time-Slot Assignment TDM sequences necessary for loop activation and de-
Interface forB Channels activation are generated on-chip.
Separate Interface forD Channel with Alternate Mark Inversion (AMI) line codingis usedto
Programmable Sub-Slot Assignment ensure low error ratesin the presenceof noise with
lower emi radiation than other codes suchas Biphase
• 4.096 MHz Master Clock (Manchester). On #24 AWG cable the rangeisat
• 4 Loop-Back Test Modes least 1.8 km (6k ft.).
• MICROWIRE™ Compatible Serial Control
Interface 5V Operation 28-Pin PLCC Package
BLOCK DIAGRAM