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TP3057
Enhanced Serial Interface CODEC/Filter COMBO Family
TL/H/5510
TP3054,
TP3057
‘‘Enhanced’’
Serial
Interface
CODEC/Filter
COMBO
Family
August 1994
TP3054, TP3057
‘‘Enhanced’’ Serial Interface
CODEC/Filter COMBOÉ Family
General Description
The TP3054, TP3057 family consistsof m-law and A-law
monolithic PCM CODEC/filters utilizingthe A/D and D/A
conversion architecture shown inFigure1,anda serialPCM
interface. The devicesare fabricated using National’sad-
vanced double-poly CMOS process (microCMOS).
The encode portionof each device consistsofan input gain
adjust amplifier,an activeRC pre-filterwhich eliminatesvery
high frequency noise priorto enteringa switched-capacitor
band-passfilter thatrejects signals below200Hz andabove
3400Hz. Also includedare auto-zero circuitryanda com-
panding coder which samplesthe filtered signal anden-
codesitinthe companded m-lawor A-law PCM format.The
decode portionof each device consistsofan expanding
decoder, which reconstructsthe analog signal fromthe
companded m-lawor A-law code,a low-pass filter which
correctsforthesinx/x responseofthe decoder outputand
rejects signals above 3400Hz followedbya single-ended
power amplifier capableof drivinglow impedance loads.
The devices requiretwo 1.536 MHz, 1.544 MHzor 2.048
MHz transmit and receive master clocks, which maybe
asynchronous; transmit and receivebit clocks, which may
vary from64kHzto 2.048 MHz; and transmit and receive
frame sync pulses. The timingofthe frame sync pulsesand
PCM datais compatible withboth industry standard formats.
Features Complete CODECand filtering system (COMBO)
including: Transmit high-passand low-pass filtering Receive low-pass filter withsinx/x correction ActiveRC noise filters m-lawor A-law compatible COderand DECoder Internal precision voltage reference SerialI/O interface Internal auto-zero circuitry m-law, 16-pinÐTP3054 A-law, 16-pinÐTP3057 Designedfor D3/D4and CCITT applications g5V operation Low operating powerÐtypically50mW Power-down standby modeÐtypically3 mW Automatic power-down TTLor CMOS compatible digital interfaces Maximizesline interface card circuit density Dual-In-Lineor surface mount packages See also AN-370, ‘‘Techniquesfor Designing with
CODEC/Filter COMBO Circuits’’
Connection Diagrams
Dual-In-Line Package
TL/H/5510–1
Top View
Order Number TP3054Jor TP3057J
SeeNS Package NumberJ16A
OrderNumber TP3054Nor TP3057N
SeeNS Package Number N16A
Order Number TP3054WMor TP3057WM
SeeNS PackageNumberM16B
Plastic Chip Carriers
TL/H/5510–10
TopView
Order Number TP3057V
SeeNS Package Number V20A
COMBOÉandTRI-STATEÉare registeredtrademarksof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M125/PrintedinU.S.A.