TP11362AV ,Quad Adaptive Differential PCM ProcessorPin DescriptionsMaster clock input. CLK may be asynchronous to PSCK orASCK.TSITransmit PCM serial d ..
TP11368N ,Octal Adaptive Differential PCM ProcessorPin DescriptionsTSI CLKTransmit PCM serial data input. TSI is an 8-bit PCM data Master clock input. ..
TP11368V ,Octal Adaptive Differential PCM Processor
TP11368V ,Octal Adaptive Differential PCM Processor
TP11368V/NOPB ,Octal Adaptive Differential PCM Processor 28-PLCC -40 to 85
TP13057B , MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
TPSMA16 , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TPSMA16 , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TPSMA16A , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TPSMA16A , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TPSMA18A , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TPSMA20A , Surface Mount Automotive Transient Voltage Suppressors High Temperature Stability and High Reliability Conditions
TP11362AV
Quad Adaptive Differential PCM Processor
TP11362A
Quad Adaptive Differential PCM Processor
General DescriptionThe TP11362Aisa quad(4) channel Adaptive Differential
Pulse Code Modulation (ADPCM) transcoder, fully compat-
ibleto ITU G.726 recommendationin40 kbps,32 kbps, kbps,16 kbpsand ANSI32 kbps modes.The TP11362A
ADPCM processor can operateonupto8 independent
channelsinan8 kHz frame. Each channelis individually
configured, supporting bothfullandhalf duplex operation.All
input/output transfers occuronan interrupt basis usingse-
rial, double buffered data registers. Togetherwith National’s
TP3054/57 COMBO®or TP3070/71 COMBOII devices,the
TP11362A forms complete ADPCM channels with Codec/
filtering.
Features CCITT G.726 compatibleat40,32,24,16 kbps ANSI T1.301 compatibleat32 kbps 8-channel half-duplex (encodeor decode)or 4-channel
full-duplex operationin8kHz frame Each channel individually configurable Selectable μ-lawor A-law PCM coding Asynchronous8 MHz master clock operation TTLand CMOS compatible inputsand outputs 28-pin PLCCor 24-pinDIP packages Power consumptionoftyp.6 mWat +5Vper full-duplex
channel On-Chip Power-On-Reset −40˚Cto +85˚C operating temperature range Single5V supply
Block DiagramTRI-STATE®and COMBO®are registeredtrademarksof National Semiconductor Corporation.
DS012877-1
FIGURE1. Block DiagramMarch 1997
TP1
1362A
Quad
Adaptive
Differential
PCM
Processor©1997NationalSemiconductor Corporation DS012877
