TMX320VC5420GGU200 , DIGITAL SIGNAL PROCESSOR SPRS080F − MARCH 1999 − REVISED OCTOBER 2008 200-MIP ..
TN0104N3 , N-Channel Enhancement-Mode Vertical DMOS FETs
TN0106N3 , N-Channel Enhancement-Mode Vertical DMOS FETs
TN0106N3 , N-Channel Enhancement-Mode Vertical DMOS FETs
TN0200K ,MOSFETsS-40243—Rev. A, 16-Feb-041TN0200KNew ProductVishay SiliconixSPECIFICATIONS (T = 25C UNLESS OTHERWI ..
TN0200T ,N-Channel 20-V (D-S) MOSFETsS-03184—Rev. D, 17-Feb-0311-3V - Gate-to-Source Voltage (V)GS I - Drain Current (A)Dr - Drain-Sourc ..
TPS65181RGZR ,PMIC for E Ink Vizplex Enabled Electronic Paper Display 48-VQFN -10 to 85 SLVSA76G–MARCH 2010–REVISED JANUARY 20165 Description (continued)Accurate back-plane biasing is pr ..
TPS65182RGZR ,PMIC for E Ink Vizplex Enabled Electronic Paper Display 48-VQFN -10 to 85Features • Sleep Mode Support• Thermally Enhanced Package for Efficient Heat1• Single Chip Power Ma ..
TPS65190RHDR ,10-Channel Level Shifter for LCD Displays w/ VCOM Op-Amp 28-VQFN -40 to 85ELECTRICAL CHARACTERISTICSV = V = 30 V; V = –6.2 V; V = 15 V; T = –40 °C to 85 °C; typical values a ..
TPS65191RHBR ,7-Channel Level Shifter for LCD Displays (Triple Channel Scan Driver) 32-VQFN -40 to 85ELECTRICAL CHARACTERISTICSVOFF = –10 V, VON = 30 V, EN = 3.3 V, T = –40°C to 85°C, typical values a ..
TPS65192 ,9-Channel Level Shifter for LCD Displays聽with GPMELECTRICAL CHARACTERISTICSV = V = 30V; V = –7 V; T = –40°C to 85°C; typical values are at 25°C (unl ..
TPS65192RHDR ,9-Channel Level Shifter for LCD Displays with GPM 28-VQFN -40 to 85maximum ratings may cause permanent damage to the device. These are stress ratingsonly and function ..
TMX320VC5420GGU200
DIGITAL SIGNAL PROCESSOR
40-Bit Arithmetic Logic Unit (ALU)Including a 40-Bit Barrel-Shifter and Two
40-Bit Accumulators Per Core Each Core Has a 17- × 17-Bit Parallel
Multiplier Coupled to a 40-Bit Adder for
Non-Pipelined Single-Cycle Multiply/
Accumulate (MAC) Operations Each Core Has a Compare, Select, and
Store Unit (CSSU) for the Add/Compare
Selection of the Viterbi Operator Each Core Has an Exponent Encoder to
Compute an Exponent Value of a 40-Bit
Accumulator Value in a Single Cycle Each Core Has Two Address Generators
With Eight Auxiliary Registers and Two
Auxiliary Register Arithmetic Units
(ARAUs) 16-Bit Data Bus With Data Bus Holder
Feature 256K × 16 Extended Program Address
Space Total of 192K × 16 Dual- and Single-Access
On-Chip RAM Single-Instruction Repeat and
Block-Repeat Operations Instructions With 32-Bit Long Word
Operands Instructions With 2 or 3 Operand Reads Fast Return From Interrupts Output Control of TOUT Power Consumption Control With IDLE1,
IDLE2, and IDLE3 Instructions Dual 1.8-V (Core) and 3.3-V (I/O) Power
Supplies for Low Power, Fast Operation 10-ns Single-Cycle Fixed-Point Instruction
Execution Interprocessor Communication via Two
Internal 8-Element FIFOs 12 Channels of Direct Memory Access
(DMA) for Data Transfers With No CPU
Loading (6 Channels Per Subsystem) Six Multichannel Buffered Serial Ports
(McBSPs) (Three McBSPs Per Subsystem) 16-Bit Host-Port Interface (HPI16)
Multiplexed With External Memory Interface
Pins Software-Programmable Phase-Locked
Loop (PLL) Provides Several Clocking
Options (Requires External TTL Oscillator) On-Chip Scan-Based Emulation Logic Two Software-Programmable Timers
(One Per Subsystem) Software-Programmable Wait-State
Generator (14 Wait States Maximum) Provided in 144-pin BGA Ball Grid Array
(GGU Suffix) and 144-pin Low-Profile Quad
Flatpack (LQFP) (PGE Suffix) Packages
NOTE: This data sheet is designed to be used in conjunction with the TMS320C54x DSP Functional Overview (literaturenumber SPRU307).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320C54x is a trademark of Texas Instruments.
