TMS320VC5402 ,Digital Signal ProcessorMaximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . 35Terminal Functions . . . . . ..
TMS320VC5402 ,Digital Signal ProcessorMaximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . 35Terminal Functions . . . . . ..
TMS320VC5402AGGU16 ,Fixed-Point Digital Signal ProcessorFeatures ....... 373.12.2 DMA External Access 373.12.3 DMPREC Issue ....... 393.12.4 DMA Memory Ma ..
TMS320VC5402APGE16 ,Fixed-Point Digital Signal ProcessorFeatures.. 92 Introduction.. 102.1 Description ...... 102.2 Pin Assignments 102.2.1 Terminal Assign ..
TMS320VC5402GGU100 ,Digital Signal Processor SPRS079G − OCTOBER 1998 − REVISED OCTOBER 2008 Adva ..
TMS320VC5402PGE100 ,Digital Signal ProcessorMaximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . 35Terminal Functions . . . . . ..
TPS60230RGTT ,5-Channel, Current-regulated 125-mA Charge Pump for White LED Backlight in 3x3 QFNMAXIMUM RATINGS(1)over operating free-air temperature range (unless otherwise noted)UNITV Supply vo ..
TPS60230RGTT ,5-Channel, Current-regulated 125-mA Charge Pump for White LED Backlight in 3x3 QFNmaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
TPS60230RGTTG4 ,5-Channel, Current-regulated 125-mA Charge Pump for White LED Backlight in 3x3 QFN 16-QFN -40 to 85TPS60230
TPS60230RGTTG4 ,5-Channel, Current-regulated 125-mA Charge Pump for White LED Backlight in 3x3 QFN 16-QFN -40 to 85SLVS516A–MAY 2004–REVISED JUNE 2004
TPS60231RGTR ,3-Channel, Current-regulated 75-mA Charge Pump for White LED Backlight in 3x3 QFNTPS60231
TPS60231RGTR/G4 ,WHITE LED CHARGE PUMP CURRENT SOURCE WITH PWM BRIGHTNESS CONTROLELECTRICAL CHARACTERISTICSV = 3.6 V, EN1 = EN2 = V , T = -40°C to 85°C (unless otherwise noted)I I ..
TMS320VC5402-TMS320VC5402GGU100-TMS320VC5402PGE100-TMS320VC5402-PGE100-TMS320VC5402PGE-100-TMS320VC5402PGE100.-TMS320VC5402PGE100/-TMS320VC5402PGER10-TMS320VC5402ZGU 100-TMX320VC5402PGE100
Digital Signal Processor
Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a
40-Bit Dedicated Adder for Non-Pipelined
Single-Cycle Multiply/Accumulate (MAC)
Operation Compare, Select, and Store Unit (CSSU) for
the Add/Compare Selection of the Viterbi
Operator Exponent Encoder to Compute an
Exponent Value of a 40-Bit Accumulator
Value in a Single Cycle Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs) Data Bus With a Bus-Holder Feature Extended Addressing Mode for 1M × 16-Bit
Maximum Addressable External Program
Space 4K x 16-Bit On-Chip ROM 16K x 16-Bit Dual-Access On-Chip RAM Single-Instruction-Repeat and
Block-Repeat Operations for Program Code Block-Memory-Move Instructions for
Efficient Program and Data Management Instructions With a 32-Bit Long Word
Operand Instructions With Two- or Three-Operand
Reads On-Chip Peripherals
− Software-Programmable Wait-State
Generator and Programmable Bank
Switching
− On-Chip Phase-Locked Loop (PLL) Clock
Generator With Internal Oscillator or
External Clock Source
− Two Multichannel Buffered Serial Ports
(McBSPs)
− Enhanced 8-Bit Parallel Host-Port
Interface (HPI8)
− Two 16-Bit Timers
− Six-Channel Direct Memory Access
(DMA) Controller Power Consumption Control With IDLE1,
IDLE2, and IDLE3 Instructions With
Power-Down Modes CLKOUT Off Control to Disable CLKOUT On-Chip Scan-Based Emulation Logic,
IEEE Std 1149.1† (JTAG) Boundary Scan
Logic 10-ns Single-Cycle Fixed-Point Instruction
Execution Time (100 MIPS) for 3.3-V Power
Supply (1.8-V Core) Available in a 144-Pin Plastic Low-Profile
Quad Flatpack (LQFP) (PGE Suffix) and a
144-Pin Ball Grid Array (BGA) (GGU Suffix)
NOTE:This data sheet is designed to be used in conjunction with the TMS320C5000 DSP Family Functional Overview(literature number SPRU307).
All trademarks are the property of their respective owners.
†IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
