TMS320DM6437ZWT6 ,Digital Media Processor 361-NFBGA 0 to 90– Supports Media Independent Interface (MII)• Enhanced Direct-Memory-Access (EDMA)Controller (64 In ..
TMS320DM6437ZWTQ6 ,Digital Media Processor 361-NFBGA Features• External Memory Interfaces (EMIFs)– Byte-Addressable (8-/16-/32-/64-Bit Data)– 32-Bit DDR ..
TMS320DM643AGDK5 ,Video/Imaging Fixed-Point Digital Signal ProcessoThe TMS320C64x™ DSPs (including the TMS320DM643 device) are the highest-performance fixed-pointDSP ..
TMS320DM643AZDK6 ,Video/Imaging Fixed-Point Digital Signal Processo SPRS269D–FEBRUARY 2005–REVISED OCTOBER 2010The VCXO interpolated control (VIC) port provides digit ..
TMS320DM643AZNZ6 ,Video/Imaging Fixed-Point Digital Signal Processor 548-FCBGA The TMS320C64x™ DSPs (including the TMS320DM643 device) are the highest-performance fixed-pointDSP ..
TMS320DM6441AZWT ,DaVinci Digital Media System-on-Chip 361-NFBGA • Video Processing Subsystem (Continued) • One Serial Port Interface (SPI) With TwoChip-Selects– Ba ..
TPS5430QDDARQ1 ,Automotive 5.5V to 36V, 3-A Step-Down Converter 8-SO PowerPAD -40 to 125features include an active-high enable, overcurrentFilter Sizelimiting, overvoltage protection (OVP ..
TPS54310 ,Low Input Voltage 3A Buck Converter with Adjustable Output VoltageSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareTPS54310SLVS412E–DEC ..
TPS54310PWP ,Q1Table of Contents8.2 Functional
TPS54310PWPG4 ,Q1Maximum Ratings.. 411.1 Layout Guidelines.... 187.2 ESD Ratings........ 411.2 Layout Example....... ..
TPS54310PWPR ,Q1Features... 18.3 Feature Description.... 102 Applications..... 18.4 Device Functional Modes.... 123 ..
TPS54310PWPRG4 ,3V to 6V Input, 3A Synchronous Step-Down SWIFT? Converter 20-HTSSOP -40 to 125features are a true,• Externally Compensated for Design Flexibility high performance, voltage error ..
TMS320DM6437ZDU7-TMS320DM6437ZWT4-TMS320DM6437ZWT6-TMS320DM6437ZWTQ6
Digital Media Processor
TMS320DM6437 Digital Media Processor1.1 Features
TMS320DM6437
Digital Media Processorwww.ti.com SPRS345D–NOVEMBER 2006–REVISED JUNE 2008
256K-Bit (32K-Byte) L1P Program•
High-Performance Digital Media Processor RAM/Cache [Flexible Allocation](DM6437) 2.5-, 2.-, 1.67-, 1.51-, 1.43-ns Instruction
Cycle Time – 640K-Bit (80K-Byte) L1D Data RAM/Cache
[Flexible Allocation]– 400-, 500-, 600, 660-, 700-MHz C64x+™
Clock Rate – 1M-Bit (128K-Byte)L2 Unified Mapped
RAM/Cache [Flexible Allocation]– Eight 32-Bit C64x+ Instructions/Cycle 3200, 4000, 4800, 5280, 5600 MIPS •
Supports Little Endian Mode Only Fully Software-Compatible With C64x •
Video Processing Subsystem (VPSS) Commercial and Automotive (QorS suffix) – Front End Provides:
Grades •
CCD and CMOS Imager Interface– Low-Power Device(L suffix) •
BT.601/BT.656 Digital YCbCr 4:2:2 VelociTI.2™ Extensionsto VelociTI™ (8-/16-Bit) Interface
Advanced Very-Long-Instruction-Word (VLIW) •
Preview Engine for Real-Time Image
TMS320C64x+™ DSP Core Processing Eight Highly Independent Functional Units •
Glueless Interfaceto Common Video
With VelociTI.2 Extensions: Decoders Six ALUs (32-/40-Bit), Each Supports •
Histogram Module
Single 32-Bit, Dual 16-Bit,or Quad 8-Bit •
Auto-Exposure, Auto-White Balance andArithmetic per Clock Cycle Auto-Focus Module Two Multipliers Support Four16x 16-Bit •
Resize EngineMultiplies (32-Bit Results) per Clock – Resize Images From 1/4xto4xCycleor Eight8x 8-Bit Multiplies (16-Bit – Separate Horizontal/Vertical ControlResults) per Clock Cycle – Back End Provides:– Load-Store Architecture With Non-Aligned •
Hardware On-Screen Display (OSD)Support •
Four 54-MHz DACs fora Combinationof– 64 32-Bit General-Purpose Registers – Composite NTSC/PAL Video– Instruction Packing Reduces Code Size – Luma/Chroma Separate Video– All Instructions Conditional (S-video)– Additional C64x+™ Enhancements – Component (YPbPror RGB) Video•
Protected Mode Operation (Progressive)•
Exceptions Support for Error Detection •
Digital Outputand Program Redirection – 8-/16-bit YUVor upto 24-Bit RGB•
Hardware Support for Modulo Loop – HD ResolutionAuto-Focus Module Operation – Upto2 Video Windows•
C64x+ Instruction Set Features •
External Memory Interfaces (EMIFs)– Byte-Addressable (8-/16-/32-/64-Bit Data) – 32-Bit DDR2 SDRAM Memory Controller– 8-Bit Overflow Protection With 256M-Byte Address Space (1.8-V I/O)– Bit-Field Extract, Set, Clear •
Supports upto 333-MHz (data rate) Bus– Normalization, Saturation, Bit-Counting and Interfaces With DDR2-400 SDRAM– VelociTI.2 Increased Orthogonality – Asynchronous 8-Bit Wide EMIF (EMIFA)– C64x+ Extensions With upto 64M-Byte Address Reach•
Compact 16-bit Instructions •
Flash Memory Interfaces•
Additional Instructionsto Support – NOR (8-Bit-Wide Data)Complex Multiplies – NAND (8-Bit-Wide Data)•
C64x+ L1/L2 Memory Architecture
