TMS320DM642GNZ600 ,Video/Imaging Fixed-Point Digital Signal ProcessorThe TMS320C64x™ DSPs (including the TMS320DM642 device) are the highest-performance fixed-pointDSP ..
TMS320DM642GNZA500 ,Video/Imaging Fixed-Point Digital Signal Processor1.2 Functional
TMS320DM6437ZDU7 ,Digital Media Processor 376-BGA 0 to 90 SPRS345D–NOVEMBER 2006–REVISED JUNE 20081.2 DescriptionThe TMS320C64x+™ DSPs (including the TMS320 ..
TMS320DM6437ZWT4 ,Digital Media Processor 361-NFBGA 0 to 90Features– 256K-Bit (32K-Byte) L1P Program• High-Performance Digital Media ProcessorRAM/Cache [Flexi ..
TMS320DM6437ZWT6 ,Digital Media Processor 361-NFBGA 0 to 90– Supports Media Independent Interface (MII)• Enhanced Direct-Memory-Access (EDMA)Controller (64 In ..
TMS320DM6437ZWTQ6 ,Digital Media Processor 361-NFBGA Features• External Memory Interfaces (EMIFs)– Byte-Addressable (8-/16-/32-/64-Bit Data)– 32-Bit DDR ..
TPS5430DDAR ,5.5V to 36V Input, 3A, 500kHz Step-Down Converter 8-SO PowerPAD -40 to 125MAXIMUM RATINGS table..... 4Changes from Original (January 2006) to Revision A Page• Added Added de ..
TPS5430DDARG4 ,5.5V to 36V Input, 3A, 500kHz Step-Down Converter 8-SO PowerPAD -40 to 125features are a high-performance voltage erroramplifier that provides tight voltage regulation• Up t ..
TPS5430MDDAREP ,Enhanced Product 5.5V to 36V Input, 3A, 500kHz Step Down Converter 8-SO PowerPAD -55 to 125...... SLVS911–MARCH 2009(1) (2)DISSIPATION RATINGSTHERMAL IMPEDANCEPACKAGEJUNCTION-TO-AMBIENT(3)8- ..
TPS5430MDDAREPG4 ,Enhanced Product 5.5V to 36V Input, 3A, 500kHz Step Down Converter 8-SO PowerPAD -55 to 125/swiftmeet aggressive equipment development cycles.SUPPORTS DEFENSE, AEROSPACE,AND MEDICAL APPLICAT ..
TPS5430QDDARQ1 ,Automotive 5.5V to 36V, 3-A Step-Down Converter 8-SO PowerPAD -40 to 125features include an active-high enable, overcurrentFilter Sizelimiting, overvoltage protection (OVP ..
TPS54310 ,Low Input Voltage 3A Buck Converter with Adjustable Output VoltageSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareTPS54310SLVS412E–DEC ..
TMS320DM642GNZ600
Video/Imaging Fixed-Point Digital Signal Processor
TMS320DM642
www.ti.com SPRS200N–JULY 2002–REVISED OCTOBER 2010
TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
Checkfor Samples: TMS320DM642 TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor
123 1024M-Byte Total Addressable External• High-Performance Digital Media Processor Memory Space– 2-, 1.67-, 1.39-ns Instruction Cycle Time • Enhanced Direct-Memory-Access (EDMA)– 500-, 600-, 720-MHz Clock Rate Controller (64 Independent Channels)– Eight 32-Bit Instructions/Cycle • 10/100 Mb/s Ethernet MAC (EMAC)– 4000, 4800, 5760 MIPS – IEEE 802.3 Compliant– Fully Software-Compatible With C64x™ – Media Independent Interface (MII)• VelociTI.2™ Extensionsto VelociTI™ –8 Independent Transmit (TX) Channels and1Advanced Very-Long-Instruction-Word (VLIW) Receive (RX) ChannelTMS320C64x™ DSP Core • Management Data Input/Output (MDIO)– Eight Highly Independent Functional Units • Three Configurable Video PortsWith VelociTI.2™ Extensions: Providinga GluelessI/Fto Common Video• Six ALUs (32-/40-Bit), Each Supports
Decoder and Encoder DevicesSingle 32-Bit, Dual 16-Bit,or Quad 8-Bit
Arithmetic per Clock Cycle – Supports Multiple Resolutions/Video Stds Two Multipliers Support Four16x 16-Bit • VCXO Interpolated Control Port (VIC)
Multiplies (32-Bit Results) per Clock – Supports Audio/Video SynchronizationCycleor Eight8x 8-Bit Multiplies (16-Bit • Host-Port Interface (HPI) [32-/16-Bit]Results) per Clock Cycle • 32-Bit/66-MHz, 3.3-V Peripheral Component– Load-Store Architecture With Non-Aligned Interconnect (PCI) Master/Slave InterfaceSupport Conformsto PCI Specification 2.2– 64 32-Bit General-Purpose Registers • Multichannel Audio Serial Port (McASP) Instruction Packing Reduces Code Size – Eight Serial Data Pins– All Instructions Conditional – Wide VarietyofI2S and Similar Bit Stream• Instruction Set Features Formats Byte-Addressable (8-/16-/32-/64-Bit Data) – Integrated Digital AudioI/F Transmitter 8-Bit Overflow Protection Supports S/PDIF, IEC60958-1, AES-3, CP-430
Formats– Bit-Field Extract, Set, Clear Inter-Integrated Circuit(I2C Bus™) Bit-Counting Two Multichannel Buffered Serial Ports Three 32-Bit General-Purpose Timers Sixteen General-Purpose I/O (GPIO) Pins L1P Program Cache Generator Data • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible • 548-Pin Ball Grid Package Mapped (GDK and ZDK Suffixes), 0.8-mm
RAM/Cache Allocation) • 548-Pin Ball Grid Array (BGA) Package (GNZ and ZNZ Suffixes), 1.0-mm Pitch (EMIF) • 0.13-µ m/6-Level Cu Process • 3.3-V I/O, 1.2-V and • 3.3-V -600, SBSRAM, -720)
