TMS320C6746BZWT4 ,Fixed/Floating Point Digital Signal Processor 361-NFBGA 0 to 90• Programmable Real-Time Unit Subsystem • Video Port Interface (VPIF):(PRUSS)– Two 8-Bit SD (BT.656 ..
TMS320C6746BZWTA3 ,Fixed/Floating Point Digital Signal Processor 361-NFBGA -40 to 105Features – Fixed-Point Multiply Supports Two 32 × 32-Bit Multiplies, Four 16 × 16-Bit Multiplies, o ..
TMS320C6747BZKB3 ,Fixed/Floating-Point Digital Signal Processor 256-BGA 0 to 90Features– Hardware Support for Modulo Loop– Superset of the C67x+ and C64x+ ISAsOperation– Up to 36 ..
TMS320C6747BZKBA3 ,Fixed/Floating-Point Digital Signal Processor 256-BGA -40 to 105 SPRS377F–SEPTEMBER 2008–REVISED JUNE 2014The peripheral set includes: a 10/100 Mbps Ethernet MAC ( ..
TMS320C6747BZKBT3 ,Fixed/Floating-Point Digital Signal Processor 256-BGA -40 to 125Block DiagramDSP SubsystemJTAG InterfaceSystem ControlC674xPLL/Clock DSP CPUInputGeneratorClock(s)M ..
TMS320C6747CZKBA3 ,Fixed/Floating-Point Digital Signal Processor 256-BGA -40 to 105• PRUSS can be Disabled via Software to – RMII Media-Independent InterfaceSave Power– Management Da ..
TPS51621RHAR ,Dual Phase, D-CAP+?Mode Step-Down Controller for IMVP6.5 CPU/GPU Vcore 40-VQFN -10 to 105
TPS51621RHAT ,Dual Phase, D-CAP+?Mode Step-Down Controller for IMVP6.5 CPU/GPU Vcore 40-VQFN -10 to 105
TPS51631RSMR ,3-phase DCAP+ Step-Down Controller for VR12.5 CPUs 32-VQFN -40 to 105
TPS51631RSMT ,3-phase DCAP+ Step-Down Controller for VR12.5 CPUs 32-VQFN -40 to 105
TPS51727RHAR ,Dual-Phase, D-CAP+? Mode Step Down Power Management IC for 50A+ Applications 40-VQFN -10 to 100maximum ratings" may cause permanent damage to the device. These are stress ratingsonly and functio ..
TPS51727RHAT ,Dual-Phase, D-CAP+? Mode Step Down Power Management IC for 50A+ Applications 40-VQFN -10 to 100features include an• Selectable 200/300/400/500 kHz Frequencyadjustable thermal sensor, output powe ..
TMS320C6746BZWT3-TMS320C6746BZWT4-TMS320C6746BZWTA3
Fixed/Floating Point Digital Signal Processor
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TMS320C6746SPRS591F –NOVEMBER 2009–REVISED JANUARY 2017
TMS320C6746™ Fixed- and Floating-Point DSP Device Overview
1.1 Features 375- and 456-MHz C674x Fixed- and Floating-
Point VLIW DSP C674x Instruction Set Features Supersetof the C67x+ and C64x+ ISAs Upto 3648 MIPS and 2746 MFLOPS Byte-Addressable (8-, 16-, 32-, and 64-Bit Data) 8-Bit Overflow Protection Bit-Field Extract, Set, Clear Normalization, Saturation, Bit-Counting Compact 16-Bit Instructions C674x Two-Level Cache Memory Architecture 32KBof L1P Program RAM/Cache 32KBof L1D Data RAM/Cache 256KBofL2 Unified Mapped RAM/Cache Flexible RAM/Cache Partition (L1 and L2) Enhanced Direct Memory Access Controller3
(EDMA3):2 Channel Controllers3 Transfer Controllers 64 Independent DMA Channels 16 Quick DMA Channels Programmable Transfer Burst Size TMS320C674x Floating-Point VLIW DSP Core Load-Store Architecture With Nonaligned
Support 64 General-Purpose Registers (32-Bit) Six ALU (32- and 40-Bit) Functional Units Supports 32-Bit Integer, SP (IEEE Single
Precision/32-Bit) and DP (IEEE Double
Precision/64-Bit) Floating Point Supportsupto Four SP Additions Per Clock,
Four DP Additions Every Two Clocksto Two Floating-Point (SPor DP) (RCPxP) and Approximation Cycle Multiply 2 SP× DP→ DP Every Three Clocks 2 DP× DP→ DP Every Four Clocks Fixed-Point Multiply Supports Two 32× 32-
Bit Multiplies, Four16× 16-Bit Multiplies,or
Eight8× 8-Bit Multiplies per Clock Cycle,
and Complex Multiples Instruction Packing Reduces Code Size All Instructions Conditional Hardware Supportfor Modulo Loop Operation Protected Mode Operation Exceptions Support for Error Detection and
Program Redirection Software Support TI DSP BIOS™ Chip Support Library and DSP Library 1.8-Vor 3.3-V LVCMOS I/Os (Except for USB and
DDR2 Interfaces) Two External Memory Interfaces: EMIFA NOR (8-or 16-Bit-Wide Data) NAND (8-or 16-Bit-Wide Data) 16-Bit SDRAM With 128-MB Address Space DDR2/Mobile DDR Memory Controller With one the Following: 16-Bit DDR2 SDRAM With 256-MB Address
Space 16-Bit mDDR SDRAM With 256-MB Address
Space Three Configurable 16550-Type UART Modules: With Modem Control Signals 16-Byte FIFO 16xor 13x Oversampling Option Two Serial Peripheral Interfaces (SPIs) Each With
Multiple Chip Selects Two Multimedia Card (MMC)/Secure Digital (SD)
Card Interfaces With Secure Data I/O (SDIO)
Interfaces Slave Inter-Integrated Circuits Address and Bandwidth
