TMS320C6727BZDH250 ,Floating-Point Digital Signal Processor 256-BGA SPRS268E–MAY 2005–REVISED JANUARY 2007The C6727 extends SDRAM support to 256M-bit and 512M-bit devi ..
TMS320C6727BZDH300 ,Floating-Point Digital Signal Processor 256-BGA 1.2 DescriptionThe TMS320C672x is the next generation of Texas Instruments' C67x generation of high ..
TMS320C6727BZDH350 ,Floating-Point Digital Signal Processor 256-BGA Features• C672x: 32-/64-Bit 350-MHz Floating-Point DSPs • Three Multichannel Audio Serial Ports– Tr ..
TMS320C6745BPTP3 ,Fixed/Floating-Point Digital Signal Processor 176-HLQFP 0 to 90• PRUSS can be Disabled via Software to – RMII Media-Independent InterfaceSave Power– Management Da ..
TMS320C6746BZWT3 ,Fixed/Floating Point Digital Signal Processor 361-NFBGA 0 to 90 SPRS591F–NOVEMBER 2009–REVISED JANUARY 20171.2 Applications• Currency Inspection • Machine Vision ..
TMS320C6746BZWT4 ,Fixed/Floating Point Digital Signal Processor 361-NFBGA 0 to 90• Programmable Real-Time Unit Subsystem • Video Port Interface (VPIF):(PRUSS)– Two 8-Bit SD (BT.656 ..
TPS51611RHBR ,Single Phase, D-CAP+? Mode Step-Down Controller for IMVP6.5? CPU/GPU Vcore 32-VQFN -10 to 105
TPS51611RHBR ,Single Phase, D-CAP+? Mode Step-Down Controller for IMVP6.5? CPU/GPU Vcore 32-VQFN -10 to 105
TPS51620 ,Dual Phase D-CAP+?Mode Step Down Controller for IMVP6+ CPU/GPU Vcore 40-VQFN -10 to 100
TPS51621RHAR ,Dual Phase, D-CAP+?Mode Step-Down Controller for IMVP6.5 CPU/GPU Vcore 40-VQFN -10 to 105
TPS51621RHAT ,Dual Phase, D-CAP+?Mode Step-Down Controller for IMVP6.5 CPU/GPU Vcore 40-VQFN -10 to 105
TPS51631RSMR ,3-phase DCAP+ Step-Down Controller for VR12.5 CPUs 32-VQFN -40 to 105
TMS320C6727BZDH250
Floating-Point Digital Signal Processors
www.ti.com TMS320C6727, TMS320C6726, TMS320C6722 DSPs
1.1 Features
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal ProcessorsSPRS268E–MAY 2005–REVISED JANUARY 2007
C672x: 32-/64-Bit 300-MHz Floating-Point DSPs •
Three Multichannel Audio Serial Ports Transmit/Receive Clocks upto50 MHz•
Upgradesto C67x+ CPU From C67x™ DSP Six Clock Zones and16 Serial Data PinsGeneration: Supports TDM, I2S, and Similar Formats– 2X CPU Registers [64 General-Purpose] DIT-Capable (McASP2)– New Audio-Specific Instructions Compatible With the C67x CPU •
Universal Host-Port Interface (UHPI) 32-Bit-Wide Data Bus for High Bandwidth•
Enhanced Memory System Muxed and Non-Muxed Address and Data– 256K-Byte Unified Program/Data RAM 384K-Byte Unified Program/Data ROM •
Two 10-MHz SPI Ports With 3-,4-, and 5-Pin Single-Cycle Data Access From CPU Options Large Program Cache (32K Byte) Supports •
Two Inter-Integrated Circuit (I2C) PortsRAM, ROM, and External Memory •
Real-Time Interrupt Counter/Watchdog•
External Memory Interface (EMIF) Supports •
Oscillator- and Software-Controlled PLL– 100-MHz SDRAM (16-or 32-Bit) •
Applications:– Asynchronous NOR Flash, SRAM (8-,16-,or – Professional Audio32-Bit) •
Mixers– NAND Flash (8-or 16-Bit) •
Effects Boxes•
Enhanced I/O System •
Audio Synthesis– High-Performance Crossbar Switch •
Instrument/Amp Modeling– Dedicated McASP DMA Bus •
Audio Conferencing– Deterministic I/O Performance •
Audio Broadcast•
dMAX (Dual Data Movement Accelerator) •
Audio EncoderSupports: – Emerging Audio Applications– 16 Independent Channels – Biometrics– Concurrent Processingof Two Transfer – MedicalRequests – Industrial– 1-, 2-, and 3-Dimensional •
Commercialor Extended TemperatureMemory-to-Memory and
Memory-to-Peripheral Data Transfers •
144-Pin, 0.5-mm, PowerPAD™ Thin Quad Circular Addressing Where the Sizeofa Flatpack (TQFP) [RFP Suffix]
Circular Buffer (FIFO)is not Limitedto2n •
256-Terminal, 1.0-mm, 16x16 Array Plastic Ball Table-Based Multi-Tap Delay Read and Grid Array (PBGA) [GDH and ZDH Suffixes]Write Transfers From/Toa Circular Bufferan concerning availability, standard warranty, and usein critical applicationsof Texas disclaimers thereto appearsatthe endof this document.
