TMS320VC5420PGE200 ,Digital Signal ProcessorMaximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . 41Pin Assignments . . . . . . . . . ..
TMS320VC5421GGU200 ,Digital Signal Processor
TMS320VC5421GGU-200 ,Digital Signal Processor
TMS320VC5441PGF ,Digital Signal Processor
TMS320VC549GGU-120 ,Digital Signal Processor SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004 Advance ..
TMS320VC549PGE100 ,Digital Signal ProcessorElectrical Characteristics Over Recommended Operating Case Temperature Range table:I , Supply curre ..
TPS61012DGSRG4 , HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS
TPS61013DGS ,Low Input Voltage Synchronous Boost Converter with Fixed 2.5V OutputFeatures 3 DescriptionThe TPS6101x devices are boost converters intended1• Integrated Synchronous R ..
TPS61014DGS ,Low Input Voltage Synchronous Boost Converter with Fixed 2.8V OutputFeatures 3 DescriptionThe TPS6101x devices are boost converters intended1• Integrated Synchronous R ..
TPS61014DGSR ,Low Input Voltage Synchronous Boost Converter with Fixed 2.8V OutputMaximum Ratings.. 4stg• Changed Handling Ratings To ESD Ratings..... 4• Changed R = 294°C/W" To: R ..
TPS61015DGS ,Low Input Voltage Synchronous Boost Converter with Fixed 3.0V OutputFeatures 3 DescriptionThe TPS6101x devices are boost converters intended1• Integrated Synchronous R ..
TPS61015DGSRG4 , HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS
TMS320C5420PGEA200-TMS320C5420PGEA-200-TMS320VC5420GGU200-TMS320VC5420PGE200
Digital Signal Processor
40-Bit Arithmetic Logic Unit (ALU)Including a 40-Bit Barrel-Shifter and Two
40-Bit Accumulators Per Core Each Core Has a 17- × 17-Bit Parallel
Multiplier Coupled to a 40-Bit Adder for
Non-Pipelined Single-Cycle Multiply/
Accumulate (MAC) Operations Each Core Has a Compare, Select, and
Store Unit (CSSU) for the Add/Compare
Selection of the Viterbi Operator Each Core Has an Exponent Encoder to
Compute an Exponent Value of a 40-Bit
Accumulator Value in a Single Cycle Each Core Has Two Address Generators
With Eight Auxiliary Registers and Two
Auxiliary Register Arithmetic Units
(ARAUs) 16-Bit Data Bus With Data Bus Holder
Feature 256K × 16 Extended Program Address
Space Total of 192K × 16 Dual- and Single-Access
On-Chip RAM Single-Instruction Repeat and
Block-Repeat Operations Instructions With 32-Bit Long Word
Operands Instructions With 2 or 3 Operand Reads Fast Return From Interrupts Output Control of TOUT Power Consumption Control With IDLE1,
IDLE2, and IDLE3 Instructions Dual 1.8-V (Core) and 3.3-V (I/O) Power
Supplies for Low Power, Fast Operation 10-ns Single-Cycle Fixed-Point Instruction
Execution Interprocessor Communication via Two
Internal 8-Element FIFOs 12 Channels of Direct Memory Access
(DMA) for Data Transfers With No CPU
Loading (6 Channels Per Subsystem) Six Multichannel Buffered Serial Ports
(McBSPs) (Three McBSPs Per Subsystem) 16-Bit Host-Port Interface (HPI16)
Multiplexed With External Memory Interface
Pins Software-Programmable Phase-Locked
Loop (PLL) Provides Several Clocking
Options (Requires External TTL Oscillator) On-Chip Scan-Based Emulation Logic Two Software-Programmable Timers
(One Per Subsystem) Software-Programmable Wait-State
Generator (14 Wait States Maximum) Provided in 144-pin BGA Ball Grid Array
(GGU Suffix) and 144-pin Low-Profile Quad
Flatpack (LQFP) (PGE Suffix) Packages
NOTE: This data sheet is designed to be used in conjunction with the TMS320C54x DSP Functional Overview (literaturenumber SPRU307).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320C54x is a trademark of Texas Instruments.
