TMS320C25FNL ,Digital Signal Processors 68-PLCC 0 to 70TMS320SECONDGENERATIONDIGITALSIGNALPROCESSORSSPRS010B — MAY 1987 — REVISED NOVEMBER 1990†68-PinGBPa ..
TMS320C25FNL# ,Digital Signal Processors 68-PLCC 0 to 70featuresetgreatlyincreasesthefunctionalityofthedeviceovertheTMS32020. Enhancements included 24 addi ..
TMS320C25FNL33 ,Digital Signal Processors 68-PLCC 0 to 70TMS320SECONDGENERATIONDIGITALSIGNALPROCESSORSSPRS010B — MAY 1987 — REVISED NOVEMBER 1990†68-PinGBPa ..
TMS320C25FNLR ,Digital Signal Processors 68-PLCC 0 to 70featuresetgreatlyincreasesthefunctionalityofthedeviceovertheTMS32020. Enhancements included 24 addi ..
TMS320C25FNLW ,Digital Signal Processors 68-PLCC 0 to 0Features:TMS32020+5V GND 200-nsInstructionCycleTime 544WordsofOn-ChipDataRAMInterrupts256-Word 28 ..
TMS320C25GBA ,Digital Signal Processors 68-CPGA -40 to 85featuresareaddedineachprocessortoprovidedifferentcost/performancetradeoffs.Softwarecompatibilityism ..
TPS40180RGERG4 , SINGLE PHASE STACKABLE CONTROLLER
TPS40180RGET ,Single Phase Stackable Controller 24-VQFN -40 to 85 SLVS753C–FEBRUARY 2007–REVISED NOVEMBER 20165 Pin Configuration and FunctionsRGE Package24-Pin VQF ..
TPS40180RGETG4 ,Single Phase Stackable Controller 24-VQFN -40 to 85Block Diagram... 1412 Mechanical, Packaging, and Orderable7.3 Feature Description.... 15Information ..
TPS40190DRCR ,LOW PIN COUNT SYNCHRONOUS BUCK CONTROLLERMAXIMUM RATINGS(1)over operating free-air temperature range unless otherwise notedTPS40190 UNITVDD ..
TPS40190DRCRG4 ,LOW PIN COUNT SYNCHRONOUS BUCK CONTROLLERELECTRICAL CHARACTERISTICST = –40°C to 85°C, V = 12 V , T =T , all parameters at zero power dissipa ..
TPS40190DRCRG4 ,LOW PIN COUNT SYNCHRONOUS BUCK CONTROLLERThese devices have limited built-in ESD protection. The leads should be shorted together or the dev ..
TMS320C25FNA-TMS320C25FNL-TMS320C25FNL#-TMS320C25FNL33-TMS320C25FNLR-TMS320C25FNLW-TMS320C25GBA-TMS320C25GBL-TMS320C25PHL
Wide-Band Analog Interface Circuit
TMS320 SECOND GENERATIONDIGITAL SIGNAL PROCESSORSSPRS010B— MAY 1987— REVISED NOVEMBER 1990
80-ns Instruction Cycle Time 544 Wordsof On-Chip Data RAM 4K Wordsof On-Chip Secure Program
EPROM (TMS320E25) 4K Wordsof On-Chip Program ROM
(TMS320C25) 128K Wordsof Data/Program Space 32-Bit ALU/Accumulator 16
16-Bit Multiplier Witha 32-Bit Product Block Moves for Data/Program
Management Repeat Instructions for Efficient Useof
Program Space Serial Port for Direct Codec Interface Synchronization Input for Synchronous
Multiprocessor Configurations Wait States for Communicationto Slow
Off-Chip Memories/Peripherals On-Chip Timer for Control Operations Single 5-V Supply Packaging: 68-Pin PGA, PLCC, andCER-QUAD 68-to-28 Pin Conversion Adapter Socket for
EPROM Programming Commercial and Military Versions Available NMOS Technology: TMS32020 200-ns cycle time.........
CMOS Technology: TMS320C25 100-ns cycle time........
— TMS320E25 100-ns cycle time........
— TMS320C25-50 80-ns cycle time......
descriptionThis data sheet provides complete design documentationfor the second-generation devicesof the TMS320family. This facilitatesthe selectionofthe devices best suitedfor user applicationsby providingall specificationsfor each TMS320 member. This data sheetisdivided into four major sections: architecture, (NMOS and CMOS), timing diagrams, and mechanical data.In eachof these sections,is presented first, followedby specific device information. An indexis provided for quick information abouta device. 345 6789 1011
68-PinGB Package†(Top View)IACKMSC
CLKOUT1
CLKOUT2XF
HOLDAFSX CLKINX1D9D10D1
D12D13D14D15 READY CLKRCLKX
STRBR/WDS
VSS282930313233343536373839404142438 76543216867666564636261VSSD6D3D1
SYNCINT0
INT1
INT2VCC
FSRA0A2A3A4A5A6A7 A8A9
A10
A12A13A14A15
68-PinFN andFZ Packages†(Top View)
ADV
ANCE
INFORMA
ION
