TLV571IDW ,8-Bit, 1.25 MSPS Single Ch., Hardware Config., Low Power w/Auto or S/W PowerDownfeatures applications* Fast Throughput Rate: 1.25 MSPS at 5 V, * Mass Storage and HDD625 KSPS at 3 ..
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TLV70012DDCR ,200mA, Low IQ, Low Dropout Regulator for Portables 5-SOT -40 to 125Block Diagram... 1112 Mechanical, Packaging, and Orderable7.3 Feature Description.... 11Information ..
TLV70012DDCT ,200mA, Low IQ, Low Dropout Regulator for Portables 5-SOT -40 to 125Electrical Characteristics....... 611.2 Documentation Support.... 176.6 Typical Characteristics. 71 ..
TLV70012DSER ,200mA, Low IQ, Low Dropout Regulator for Portables 6-WSON -40 to 125Maximum Ratings table....... 5• Changed output current limit typical and maximum specifications.... ..
TND731E4 ,Condenser Microphone DevicesFeatures• Ultrasmall package permitting applied sets to be small and slim.• Especially suited for u ..
TND905 , SERIES TMPD MICROMINIATURE DIODES
TND908 , SERIES TMPD MICROMINIATURE DIODES
TND908 , SERIES TMPD MICROMINIATURE DIODES
TND908 , SERIES TMPD MICROMINIATURE DIODES
TND942 , SERIES TMPD MICROMINIATURE DIODES
TLV571IDW
8-Bit, 1.25 MSPS Single Ch., Hardware Config., Low Power w/Auto or S/W PowerDown
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Differential Nonlinearity Error: < ± 0.5 LSB Integral Nonlinearity Error: < ± 0.5 LSB Single 2.7-V to 5.5-V Supply Operation Low Power: 12 mW at 3 V and 35 mW at 5 V Auto Power Down of 1 mA Max Software Power Down: 10 m A Max Internal OSC Hardware Configurable DSP and Microcontroller CompatibleParallel Interface Binary/Twos Complement Output Hardware Controlled Extended Sampling Hardware or Software Start of Conversion Process Control General-Purpose DSP Image Sensor Processing
descriptionThe TLV571 is an 8-bit data acquisition system
that combines a high-speed 8-bit ADC and a
parallel interface. The device contains two on-chip control registers allowing control of software conversion start
and power down via the bidirectional parallel port. The control registers can be set to a default mode using a
dummy RD while WR is tied low allowing the registers to be hardware configurable.
The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to
AVDD and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that
automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the
ADC is further powered down to only 10 m A.
Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal
choice for high-speed digital signal processing.
AVAILABLE OPTIONSPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC – No internal connection
CLK
DGND
DVDD
INT/EOC
DGND
DGND
AIN
AVDD
AGND
REFM
REFP
CSTART
A1/D7
A0/D6
DW OR PW PACKAGE
(TOP VIEW)
