TLE7259G ,The new LIN Transceiver generation with sleep mode/inhibit outpout, remote and local wake up capabilityFeatures• Transmission rate up to 20 kBaud Compatible to LIN specification 1.2, 1.3 and 2.0 Suppo ..
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TLE7259G
The new LIN Transceiver generation with sleep mode/inhibit outpout, remote and local wake up capability
LIN Transceiver
TLE7259G
FeaturesTransmission rate up to 20 kBaudCompatible to LIN specification 1.2, 1.3 and 2.0Support of K-line functionVery low current consumption in sleep modeVery low leakage current in unpowered stateControl output for voltage regulatorWake up source recognition (local/remote)For 3.3 V and 5 V µC I/OSuitable for 12V and 24V boardnetBus short to VBAT protectionBus short to GND handlingOvertemperature protection
DescriptionThe TLE7259G is a monolithic integrated circuit in a P-DSO-8-3 package. It works as
an interface between the protocol controller and the physical bus. The TLE7259G is
especially suitable to drive the bus line in LIN systems in automotive and industrial
applications.
In order to reduce the current consumption, the TLE7259G offers a sleep operation
mode. In this mode the voltage regulator can be switched off by the TLE7259G to
minimize the current consumption of the whole application. A wake-up caused by a
message on the bus or a signal at the wake (WK) pin, enables the voltage regulator and
sets the device to standby operation mode. The TLE7259G has a BUS short to GND
feature implemented, to avoid a battery discharge.
The TLE7259G offers a very good EMC performance within a broad frequency range
independent from battery voltage. This is achieved by implementing a slope control
mechanism based on a constant slew rate. The TLE7259G can also be used with 3.3
V and 5 V micro controllers.
The IC is based on the Smart Power Technology SPT® which allows bipolar and CMOS
control circuitry in accordance with DMOS power devices existing on the same
monolithic circuit. The TLE7259G is designed to withstand the severe conditions of
automotive applications.
Figure1Pin Configuration (top view)
Table1Pin Definitions and Functions
Figure2Functional Block Diagram
Operation Modes
Figure3Operation Mode State Diagram
Standby ModeAfter a power up, wake-up or low supply condition, the TLE7259G is automatically
transferred to the standby mode (see Figure
3). This is realized, by setting EN = low dueto a pull-down. The INH output is automatically switching to high level (= VS), to turn on
the system voltage regulator. In the standby mode, no communication on the bus is
possible. The bus driver is disabled.
In the standby mode, the µC can detect if a wake-up from sleep mode is caused by the
WK pin or a bus message. This is realized by monitoring the RxD and TxD pin (see
Normal ModeThe TLE7259G is entering the normal mode after the µC is setting EN = high (see
Figure3). In this mode it is possible to transmit and receive messages on the bus.
Sleep ModeIn order to reduce the current consumption the TLE7259G offers a sleep operation
mode. This mode is selected by switching the enable input EN low from the normal mode
(see Figure
3). In the sleep mode, a voltage regulator will be switched off via the INHoutput in order to minimize the current consumption of the whole application. A wake-up
caused by a message on the communication bus (for t > tWK,bus) or the WK pin (for>tWK), automatically enables the voltage regulator by switching the INH output high.
In parallel the wake-up is indicated by setting the RxD output LOW. The TxD input
automatically is set to LOW if the source of the wake-up was the WK-pin, otherwise TxD
is HIGH. So, the RxD pin can be used as a flag to indicate a wake-up from sleep mode
and the TxD flag can be used as an indicator for the wake-up source (see Figure
3).When entering the normal mode these wake-up flags are reset and the RxD output and
TxD input is released to receive/transmit the bus data.
In case the voltage regulator control input is not connected to INH output or the
microcontroller is active respectively, the TLE7259G can be set in normal operation
mode without a wake-up via the communication bus.
Application Information
Master TerminationTo achieve the required timings for the dominant to recessive transition of the bus signal
an additional external termination resistor of 1 kΩ is mandatory. It is recommended to
place this resistor at the master node. To avoid reverse currents from the bus line into
the battery supply line it is recommended to place a diode in series to the external pull-
up. For small systems (low bus capacitance) the EMC performance of the system is
supported by an additional capacitor of at least 1 nF in the master node (see Figure
6and Figure
7, application circuit).
BUS short to GND FeatureThe TLE7259G has a feature implemented to protect the battery from running out of
charge in the case of BUS short to GND.
In this failure case a normal master termination connection like described above, 1kΩ
resistor and diode between bus and VS, would cause a constantly drawn current even in
sleep mode. The resulting resistance of this short to GND is lower than 1kΩ. To avoid
this current during a generator off state, like a parked car, the sleep mode has a bus short
master termination is connected with the INH pin, instead of the VS (see Figure
6 and
Figure7). Internally, the 30kΩ path is also switched off from supply (see Figure
2).
External CapacitorsA capacitor of 22µF at the supply voltage input VS buffers the input voltage. In
combination with the required reverse polarity diode this prevents the device from
detecting power down conditions in case of negative transients on the supply line.
The 100 nF capacitors close to the VS pins of the TLE7259G and the voltage regulator
help to improve the EMC behavior of the system.
Oscillator ToleranceAccording to the LIN Calculation table, an oscillator clock tolerance < 2% is possible with
TLE7259G.
3.3 V and 5 V Logic CapabilityThe TLE7259G can be used for 3.3V and 5V micro controllers. The inputs and the
outputs are capable to operate with both voltage levels. The inputs (TxD, EN) take the
reference voltage from the connected µC pins. The RxD output must have an external
pull-up resistance to the µC supply, to define the output voltage level.
LIN Specifications 1.2, 1.3 and 2.0The difference between LIN specification 1.2 and 1.3 is mainly the physical layer
specification. The reason was to improve the compatibility between the nodes.
The difference between LIN specification 1.3 and 2.0 is that the 2.0 version is a superset
of the 1.3 version. The 2.0 version offers some new features. However, it is possible to
use the LIN 1.3 slave node in a 2.0 node cluster, as long as the new features are not
used. Vice versa it is possible to use a LIN 2.0 node in the 1.3 cluster without using the
new features.
LIN 2.0 is the latest version of the LIN specification, released in September 2003.
Note:Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Table2Absolute Maximum Ratings
Voltages
Temperatures
Table3Operating Range
Thermal Resistances
Thermal Shutdown (Junction Temperature)
Table4Electrical Characteristics7.0 V < VS < 27 V; RL = 500 Ω; VEN > VEN,ON; -40 °C < Tj < 125 °C; all voltages with respect
to ground; positive current flowing into pin; unless otherwise specified.
Current Consumption
Receiver Output RxD
Transmission Input TxD
Enable Input EN
Inhibit Output INH
Wake Input WK
Table4Electrical Characteristics (cont’d)7.0 V < VS < 27 V; RL = 500 Ω; VEN > VEN,ON; -40 °C < Tj < 125 °C; all voltages with respect
to ground; positive current flowing into pin; unless otherwise specified.
