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TLE6228GP-TLE6228-GP
Smart Low Side Switches
Datasheet TLE 6228 GPSmart Quad Channel Low-Side Switch
Features
Product SummaryShorted Circuit Protection
• Overtemperature Protection
• Overvoltage ProtectionParallel Control of the Inputs (PWM Applications)Seperate Diagnostic Pin for Each ChannelPower - SO 20 - Package with integrated cooling areaStandby mode with low current consumptionµC compatible Input
Electrostatic Discharge (ESD) Protection
ApplicationAll kinds of resistive and inductive loads (relays,electromagnetic valves)µC compatible power switch for 12 and 24 V applicationsSolenoid control switch in automotive and industrial control systems
• Robotic Controls
General descriptionQuad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate in-
puts and four open drain DMOS output stages. The TLE 6228 GP is fully protected by embedded pro-
tection functions and designed for automotive and industrial applications. Each channel has its ownstatus signal for diagnostic feedback. Therefore the TLE 6228 GP is particularly suitable for ABS or
Powertrain Systems.
Block Diagram
ST1
ST2
ST3
IN1
IN2
IN3
IN4
OUT4
STBY
Datasheet TLE 6228 GPDetailed Block DiagramST4
IN4
ST1
IN1
ENA
GND
ST3
IN3
ST2
IN2
STBY
OUT1
OUT
OUT
Datasheet TLE 6228 GPPin Description Pin Configuration (Top view)Heat slug internally connected to ground pins
GNDGND
OUT1OUT4
ST1ST4
IN4IN1ENA
STBYGNDL
IN3IN2
ST2ST3
OUT2OUT3
GNDGND
P - DSO - 20 - 12
Datasheet TLE 6228 GPMaximum Ratings for Tj = – 40°C to 150°CThe maximum ratings may not be exceeded under any circumstances, not even momentarily and
individually, as permanent damage to the IC will result.
PCB with heat pipes,backside 6 cm2 cooling areaMinimum footprint
Datasheet TLE 6228 GPElectrical Characteristics
1. Power Supply (VS)Supply current (Outputs ON)
2. Power OutputsON state resistance Channel 1,2Tj = 25 ° C
ID = 1A; VS ≥ 9.5 V Tj = 150°C
ON state resistance Channel 3,4Tj = 25 ° C
ID = 1A; VS ≥ 9.5 V Tj = 150°C
Output turn on time 4 ID = 1 A
Output turn off time 4ID = 1 A
Output on fall time 4 ID = 1 A
Output off rise time 4ID = 1 A
Overload switch-off delay time 4
Output off status delay time 4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time 5
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)Input high voltage
Input voltage hysteresis 5
4. Digital Status Outputs (ST1 - ST4) Open DrainOutput voltage lowIST = 2 mA
Leakage current high
If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA
Datasheet TLE 6228 GPElectrical Characteristics
Parameter and Conditions
5. Standby Input (STBY)Input current VSTBY = 18 V
6. Diagnostic FunctionsOvertemperature shutdown threshold 5
Hysteresis
Datasheet TLE 6228 GPApplication DescriptionThis IC is especially designed to drive inductive loads (relays, electromagnetic valves).
Integrated clamp-diodes limit the output voltage when inductive loads are discharged.
Four open-drain logic outputs indicate the status of the integrated ciruit. The following conditions aremonitored and signalled:
- overloading of output (also shorted load to supply) in active mode
- open and shorted load to ground in active and inactive mode
- overtemperature
Circuit Description
Input CircuitsThe control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs
are provided with pull-down current sources. Not connected inputs are interpreted as low and the re-
spective output stages are switched off.
In standby mode (STBY = LOW ) the current consumption is greatly reduced.
The circuit is active when STBY = HIGH.
If the standby function is not used, it is allowed to connect the standby pin directly to VS.
Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to hightransition.
Output StagesThe four power outputs consist of DMOS-power transistors with open drains. The output stages areshort circuit protected throughout the operating range. Each output has it's own zenerclamp. This
causes a voltage limitation at the power transistor when inductive loads are switched off.
Parallel to the DMOS transistors there are internal pull down current sources. They are provided to
detect an open load condition in the off state. They will be disconnected in the standby mode.Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active
above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ VDS = 40V.
Protective CircuitsThe outputs are protected6) against current overload and overtemperature. If the output current in-
creases above the overload detection threshold IQO for a longer time then tDSO or the temperature in-
creases above Tth, then the power transistor is immediately switched off. It remains off until the controlsignal at the input is switched off and on again.
Fault DetectionThe status outputs indicate the switching state of the output stage. Under normal conditions is: ST =
low Output off; ST = high Output on. If an error occurs, the logic level of the status output is in-verted, as listed in the diagnostic table.
Datasheet TLE 6228 GPIf current overload or overtemperature occurs for a longer time than tDSO, the fault condition is latched
into an internal register and the output is shutdown. The reset is done by switching off the correspond-ing control input for a time longer than tD-IN.
Open load is detected for all four channels in on and off mode.
In the on mode the load current is monitored. If it drops below the specified threshold value IQU then
an open load condition is detected.
In the off mode, the output voltage is monitored. An open load condition is detected when the output
voltage of a given channel is below the threshold VDS(OL), which is typ. 33 % of the supply voltage VS.
To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detectionin off mode uses a filter of typ. 50µs.
Status output at pulse width operationIf the input is operated with a pulsed signal, the status does not follow each single pulse of the input
signal. An internal delay tD of typ. 1.2ms ( min 500 µs) enables a continuous status output signal. Seethe timing diagrams on the following pages for further information.
This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic TableIn general the status follows the input signal in normal operating conditions.
If any error is detected the status is inverted.L
Datasheet TLE 6228 GPNote 2) : to reset latched status-output in case of overload/short-to-supply/overtemperature the controlinput has to go low and stay low for longer than max. input suppression time tD-IN specified in 2.13 of
the characteristics
Failure Situations and Status Report
Logic Block Diagram
Open load "on"0.....open load
1.... normal cond.
Open load "off"1.....open load
0.....normal cond.
Overload0.....overload
1.....normal cond.
Input1....On
0... Off
ENA1....enabled
0... disabled
Overtemperature1.....overtemperature
0.....normal cond.
Gate Driver1... Output
0....Output
Status0....High
Delay DOUT
OUT
Filter
