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TLE6208-6G
Smart Motorbridges + Driver ICs
Hex-Half-Bridge / Double Six-Driver TLE 6208-6 GOverview
1.1FeaturesSix High-Side and six Low-Side-DriversFree configurable as switch, halfbridge or H-bridgeOptimized for DC motor management applications0.6A continuous (1Apeak) current per switch RDSON; typ. 0.8 Ω, @25°C per switchOutputs fully short circuit protected with diagnosisOvertemperature-Protection with hysteresis
and diagnosisTemperature prewarningStandard SPI-InterfaceVery low current consumption (typ. 10 µA, @25°C)
in stand-by (Inhibit) mode Over- and Undervoltage-LockoutCMOS/TTL compatible inputs with hysteresisInternal clamp diodesEnhanced power P-DSO-Package
Functional DescriptionThe TLE 6208-6 G is a fully protected Hex-Half-Bridge-Driver designed specifically for
automotive and industrial motion control applications. The part is based on Infineons
Smart Power Technology SPT® which allows bipolar and CMOS control circuitry in
accordance with DMOS power devices existing on the same monolithic circuitry. The six
low and high side drivers are freely configurable and can be controlled separately.
Therefore all kind of loads can be combined. In motion control up to 5 actuators (DC-
Motors) can be connected to the 6 halfbridge-outputs (cascade configuration). Operation
modes forward (cw), reverse (ccw), brake and high impedance are controlled from a
standard SPI-Interface. The possibility to control the outputs via software from a central
logic, allows limiting the power dissipation. So the standard P-DSO-28-6-package meets
the application requirements and saves PCB-Board-space and cost.
Furthermore the build-in features like Over- and Undervoltage-Lockout, Over-
Temperature-Protection and the very low quiescent current in stand-by mode opens a
1.2Pin Configuration(top view)
Figure 1 1.3Pin Definitions and Functions
1.3Pin Definitions and Functions (cont’d)
1.4Functional Block Diagram
Figure 2
Block Diagram
1.5Circuit Description
Figure 2 shows a block schematic diagram of the module.There are 6 halfbridge drivers on the right-hand side. An HS driver and an LS driver are
combined to form a halfbridge driver in each case.
The drivers communicate via the internal data bus with the logic and the other control
and monitoring functions: undervoltage (UV), overvoltage (OV), overtemperature (TSD),
charge pump and fault detect.
Two connection interfaces are provided for supply to the module: All power drivers are
connected to the supply voltage VS. These are monitored by overvoltage and
undervoltage comparators with hysteresis, so that the correct function can be checked
in the application at any time.
The logic is supplied by the VCC voltage, typ. with 5V. The VCC voltage uses an internally
generated Power-OnReset (POR) to initialize the module at power-on. The advantage
of this system is that information stored in the logic remains intact in the event of short-
term failures in the supply voltage VS. The system can therefore continue to operate
following VS undervoltage, without having to be reprogrammed. The “undervoltage”
information is stored, and can be read out via the interface. The same logically applies
for overvoltage. “Interference spikes” on VS are therefore effectively suppressed.
The situation is different in the case of undervoltage on the VCC connection pin. If this
occurs, then the internally stored data is deleted, and the output levels are switched to
high-impedance status (tristate). The module is initialized by VCC following restart
(Power-On Reset = POR).
The 16-bit wide programming word or control word (see Table
1) is read in via the DIdata input, and this is synchronized with the clock input CLK. The status word appears
synchronously at the DO data output (see Table
2).The transmission cycle begins when the chip is selected with the CSN input (H to L). If
the CSN input changes from L to H then the word which has been read in becomes the
control word. The DO output switches to tristate status at this point, thereby releasing the
DO bus circuit for other uses.
The INH inhibit input can be used to cut off the complete module. This reduces the
current consumption to just a few µA, and results in the loss of any data stored. The
output levels are switched to tristate status. The module is reinitialized with the internally
generated POR (Power-On Reset) at restart.
This feature allows the use of this module in battery-operated applications (vehicle body
control applications).
Every driver block from DRV1 to 6 contains a low-side driver and a high-side driver. The
output connections have been selected so that each HS driver and LS driver pair can be
combined to form a halfbridge by short-circuiting adjacent connections. The full flexibility
of the configuration can be achieved by dissecting the halfbridges into “quarter-bridges”.
When commutating inductive loads, the dissipated power peak can be significantly
reduced by activating the transistor located parallel to the internal freewheeling diode. A
special, integrated “timer” for power ON/OFF times ensures there is no crossover current
at the halfbridge.
Figure 3
Configuration Examples for “Quarter Bridges” on the TLE 6208-6 G
Table 1Table 2
Input Data ProtocolDiagnosis Data ProtocolH= ON
L= OFF
H= ON
L= OFF
Table 3
Fault Result Table= failure;= no failure.
Electrical CharacteristicsNote:Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
2.1Absolute Maximum Ratings
Voltages
Currents
Temperatures
2.2Operating Range
Thermal Resistances
2.3Electrical Characteristics8V
unless otherwise specified
Current Consumption
Over- and Under-Voltage Lockout
