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TL16C550DIPFB-TL16C550DIPT-TL16C550DIPTR-TL16C550DIPTRG4-TL16C550DIRHB-TL16C550DIRHBR-TL16C550DIRHBRG4-TL16C550DPFB-TL16C550DPFBR-TL16C550DPT-TL16C550DPTR-TL16C550DRHB-TL16C550DRHBR
Asynchronous Communications Element ((16-Byte Fifos, Autoflow Control)
1FEATURES
DESCRIPTION/ORDERING INFORMATION
TL16C550D,,
TL16C550DI
www.ti.com.................................................................................................................................................. SLLS597E–APRIL 2004–REVISED DECEMBER 2008
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH AUTOFLOW CONTROL Programmable Auto-RTS and Auto-CTS •
Standard Asynchronous Communication Bits
(Start, Stop, and Parity) Addedtoor Deleted•
In Auto-CTS Mode, CTS Controls Transmitter
From the Serial Data Stream•
In Auto-RTS Mode, RCV FIFO Contents and •
5-V, 3.3-V, and 2.5-V OperationThreshold Control RTS Independent Receiver Clock Input•
Serial and Modem Control Outputs Drivea
RJ11 Cable Directly When EquipmentIs on the •
Transmit, Receive, Line Status, and Data Set
Same Power Drop Interrupts Independently Controlled Capableof Running With All Existing •
Fully Programmable Serial Interface
TL16C450 Software Characteristics: After Reset, All Registers Are Identicalto the – 5-, 6-,7-,or 8-Bit Characters
TL16C450 Register Set – Even-, Odd-,or No-Parity Bit Generation Upto 24-MHz Clock Rate for upto 1.5-Mbaud and Detection
Operation With VCC=5V – 1-,1 ＝-,
or 2-Stop Bit Generation Upto 20-MHz Clock Rate for upto 1.25-Mbaud – Baud Generation (dcto1 Mbit/s)
Operation With VCC= 3.3V •
False-Start Bit Detection•
Upto 48-MHz Clock Rate for upto 3-Mbaud •
Complete Status Reporting CapabilitiesOperation with VCC= 3.3V (ZQS Package Only, •
3-State Output TTL Drive Capabilities forDivisor=1) Bidirectional Data Bus and Control Bus•
Upto 40-MHz Clock Rate for upto 2.5-Mbaud •
Line Break Generation and DetectionOperation with VCC= 3.3V (ZQS Package Only, •
Internal Diagnostic Capabilities:Divisor≥2) Loopback Controls for Communications•
Upto 16-MHz Clock Rate for upto 1-Mbaud
Link Fault IsolationOperation With VCC= 2.5V Break, Parity, Overrun, and Framing Error•
In the TL16C450 Mode, Hold and Shift
SimulationRegisters Eliminate the Need for Precise
Synchronization Between the CPU and Serial •
Fully Prioritized Interrupt System Controls
Data •
Modem Control Functions (CTS, RTS, DSR, Programmable Baud Rate Generator Allows DTR, RI, and DCD)
Divisionof Any Input Reference Clockby1to •
Availablein 48-Pin PT, 48-Pin PFB, 32-Pin16 –1) and Generates an Internal 16× Clock RHB, and 24-Pin ZQS PackagesThe TL16C550D and the TL16C550DI are speed and operating voltage upgrades (but functional equivalents)of
the TL16C550C asynchronous communications element (ACE), whichin turnisa functional upgradeof the
TL16C450. Functionally equivalent to the TL16C450 on power up (character or TL16C450 mode), the
TL16C550D and the TL16C550DI, like the TL16C550C, canbe placedinan alternate FIFO mode. This relieves
the CPUof excessive software overhead by buffering received and transmitted characters. The receiver and
transmitter FIFOs store upto 16 bytes including three additional bitsof error status per byte for the receiver
FIFO.In the FIFO mode, thereisa selectable autoflow control feature that can significantly reduce software
overload and increase system efficiencyby automatically controlling serial data flow using RTS output and CTS signals.
