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TJA1042T
High-speed CAN transceiver with Standby mode
1. General descriptionThe TJA1042 is a high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1042 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1040. It offers improved ElectroMagnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, and also features:
Ideal passive behavior to the CAN bus when the supply voltage is off
A very low-current Standby mode with bus wake-up capability
TJA1042T/3 and TJA1042TK/3 can be interfaced directly to microcontrollers with
supply voltages from 3Vto5V
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
2. Features and benefits
2.1 General Fully ISO 11898-2 and ISO 11898-5 compliant Suitable for 12 V and 24 V systems Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI) VIO input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3Vto5V
microcontrollers (available in SO8 and very small HVSON8 packages respectively) SPLIT voltage output on TJA1042T for stabilizing the recessive bus level (available in
SO8 package only) Available in SO8 and HVSON8 packages Leadless HVSON8 package (3.0 mm 3.0 mm) with improved Automated Optical
Inspection (AOI) capability Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
2.2 Low-power management Very low-current Standby mode with host and bus wake-up capability Functional behavior predictable under all supply conditions
TJA1042
High-speed CAN transceiver with Standby mode
Rev. 7 — 8 May 2012 Product data sheet
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode Transceiver disengages from the bus when not powered up (zero load)
2.3 Protections High ESD handling capability on the bus pins Bus pins protected against transients in automotive environments Transmit Data (TXD) dominant time-out function Bus-dominant time-out function in Standby mode Undervoltage detection on pins VCC and VIO Thermally protected
3. Quick reference data
4. Ordering information[1] TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with VIO pin.
Table 1. Quick reference dataVCC supply voltage 4.5 - 5.5 V
Vuvd(VCC) undervoltage detection voltage on pin
VCC
3.5 - 4.5 V
ICC supply current Standby mode - 10 15 A
Normal mode; bus recessive 2.5 5 10 mA
Normal mode; bus dominant 20 45 70 mA
VESD electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL 8- +8 kV
VCANH voltage on pin CANH no time limit; DC limiting value 58 - +58 V
VCANL voltage on pin CANL no time limit; DC limiting value 58 - +58 V
Tvj virtual junction temperature 40 - +150 C
Table 2. Ordering informationTJA1042T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1042T/3 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1042TK/3 HVSON8 plastic thermal enhanced very thin small outline package; no leads; terminals; body 3 3 0.85 mm
SOT782-1
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
5. Block diagramNXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
6.2 Pin description[1] For enhanced thermal and electrical performance, the exposed center pad of the HVSON8 package should
be soldered to board ground (and not to any other voltage level).
Table 3. Pin descriptionTXD 1 transmit data input
GND 2[1] ground supply
VCC 3 supply voltage
RXD 4 receive data output; reads out data from the bus lines
SPLIT 5 common-mode stabilization output; in TJA1042T version only
VIO 5 supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions
only
CANL 6 LOW-level CAN bus line
CANH 7 HIGH-level CAN bus line
STB 8 Standby mode control input
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7. Functional descriptionThe TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved
EMC and ESD handling capability and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
The TJA1042 is available in two versions, distinguished only by the function of pin 5:
The TJA1042T is 100 % backwards compatible with the TJA1040, and also covers
existing PCA82C250 and PCA82C251 applications
The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with
supply voltages down to 3V
7.1 Operating modesThe TJA1042 supports two operating modes, Normal and Standby, which are selected via
pin STB. See Table 4 for a description of the operating modes under normal supply
conditions.
7.1.1 Normal modeA LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).
The differential receiver converts the analog data on the bus lines into digital data which is
output to pin RXD. The slope of the output signals on the bus lines is controlled and
optimized in a way that guarantees the lowest possible EME.
7.1.2 Standby modeA HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power differential receiver monitors the bus lines for activity. The wake-up filter on the
output of the low-power receiver does not latch bus dominant states, but ensures that only
bus dominant and bus recessive states that persist longer than tfltr(wake)bus are reflected on
pin RXD.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus
activity even if VIO is the only supply voltage available. When pin RXD goes LOW to signal
a wake-up request, a transition to Normal mode will not be triggered until STB is forced
LOW.
Table 4. Operating modesNormal LOW bus dominant bus recessive
Standby HIGH wake-up request detected no wake-up request detected
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7.2 Fail-safe features
7.2.1 TXD dominant time-out functionA ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on
pin TXD persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set to HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.
7.2.2 Bus dominant time-out functionIn Standby mode a 'bus dominant time-out' timer is started when the CAN bus changes
from recessive to dominant state. If the dominant state on the bus persists for longer than
tto(dom)bus, the RXD pin is reset to HIGH. This function prevents a clamped dominant bus
(due to a bus short-circuit or a failure in one of the other nodes on the network) from
generating a permanent wake-up request. The bus dominant time-out timer is reset when
the CAN bus changes from dominant to recessive state.
7.2.3 Internal biasing of TXD and STB input pinsPins TXD and STB have internal pull-ups to VIO to ensure a safe, defined state in case
one or both of these pins are left floating. Pull-up currents flow in these pins in all states;
both pins should be held HIGH in Standby mode to minimize standby current.
7.2.4 Undervoltage detection on pins VCC and VIOShould VCC drop below the VCC undervoltage detection level, Vuvd(VCC), the transceiver
will switch to Standby mode. The logic state of pin STB will be ignored until VCC has
recovered.
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceiver will
switch off and disengage from the bus (zero load) until VIO has recovered.
7.2.5 Overtemperature protectionThe output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, Tj(sd), the output drivers will be
disabled until the virtual junction temperature falls below Tj(sd) and TXD becomes
recessive again. Including the TXD condition ensures that output driver oscillation due to
temperature drift is avoided.
7.3 SPLIT output pin and VIO supply pinTwo versions of the TJA1042 are available, only differing in the function of a single pin.
Pin 5 is either a SPLIT output pin or a VIO supply pin.
7.3.1 SPLIT pinUsing the SPLIT pin on the TJA1042T in conjunction with a split termination network (see
Figure 3 and Figure 6) can help to stabilize the recessive voltage level on the bus. This
will reduce EME in networks with DC leakage to ground (e.g. from deactivated nodes with
poor bus leakage performance). In Normal mode, pin SPLIT delivers a DC output voltage
of 0.5VCC. In Standby mode or when VCC is off, pin SPLIT is floating.
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7.3.2 VIO supply pinPin VIO on the TTJA1042T/3 and TJA1042TK/3 should be connected to the
microcontroller supply voltage (see Figure 7). This will adjust the signal levels of
pins TXD, RXD and STB to the I/O levels of the microcontroller. Pin VIO also provides the
internal supply voltage for the low-power differential receiver of the transceiver. For
applications running in low-power mode, this allows the bus lines to be monitored for
activity even if there is no supply voltage on pin VCC.
For versions of the TJA1042 without a VIO pin, the VIO input is internally connected to VCC.
This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5V
microcontrollers.
8. Limiting values
Table 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND. voltage on pin x no time limit; DC value
on pins CANH, CANL and SPLIT 58 +58 V
on any other pin 0.3 +7 V
Vtrt transient voltage on pins CANH and CANL [1] 150 +100 V
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode[1] Verified by an external test house to ensure pins CANH and CANL can withstand ISO 7637 part 3 automotive transient test pulses 1, 2a,
3a and 3b.
[2] IEC 61000-4-2 (150 pF, 330.
[3] ESD performance of pins CANH and CANL according to IEC 61000-4-2 (150 pF, 330 ) has been be verified by an external test house.
The result is equal to or better than 8 kV (unaided).
[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 k).
[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 H, 10 ).
[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). The classification level is C5 (>1000 V).
[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj =Tamb+P Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
9. Thermal characteristics
10. Static characteristicsVESD electrostatic discharge voltage IEC 61000-4-2 [2]
at pins CANH and CANL [3] 8+8 kV
HBM [4]
at pins CANH and CANL 8+8 kV
at any other pin 4+4 kV [5]
at any pin 300 +300 V
CDM [6]
at corner pins 750 +750 V
at any pin 500 +500 V
Tvj virtual junction temperature [7] 40 +150 C
Tstg storage temperature 55 +150 C
Table 5. Limiting values …continuedIn accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Table 6. Thermal characteristicsAccording to IEC 60747-1.
Rth(vj-a) thermal resistance from virtual junction to ambient SO8 package; in free air 145 K/W
HVSON8 package; in free air 50 K/W
Table 7. Static characteristicsTvj= 40 C to +150 C; VCC= 4.5 V to 5.5 V; VIO= 2.8 V to 5.5V[1] =60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Supply; pin VCCVCC supply voltage 4.5 - 5.5 V
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby modeICC supply current Standby mode
TJA1042T; includes IIO; VTXD =VIO -10 15 A
TJA1042T/3 or TJA1042TK/3 - - 5 A
Normal mode
recessive; VTXD =VIO 2.5 5 10 mA
dominant; VTXD =0V 20 45 70 mA
Vuvd(VCC) undervoltage detection
voltage on pin VCC
3.5 - 4.5 V
I/O level adapter supply; pin VIO[1]VIO supply voltage on pin VIO 2.8 - 5.5 V
IIO supply current on pin VIO Standby mode; VTXD =VIO 5- 14 A
Normal mode
recessive; VTXD =VIO 15 80 200 A
dominant; VTXD=0V - 350 1000 A
Vuvd(VIO) undervoltage detection
voltage on pin VIO
1.3 2.0 2.7 V
Standby mode control input; pin STBVIH HIGH-level input voltage [3] 0.7VIO -VIO +
VIL LOW-level input voltage 0.3 - 0.3VIO V
IIH HIGH-level input current VSTB =VIO 1- +1 A
IIL LOW-level input current VSTB =0V 15 - 1 A
CAN transmit data input; pin TXDVIH HIGH-level input voltage [3] 0.7VIO -VIO +
VIL LOW-level input voltage 0.3 - 0.3VIO V
IIH HIGH-level input current VTXD =VIO 5- +5 A
IIL LOW-level input current VTXD =0V 260 150 30 A input capacitance [4] -5 10 pF
CAN receive data output; pin RXDIOH HIGH-level output current VRXD =VIO 0.4 V; VIO =VCC 8 3 1mA
IOL LOW-level output current VRXD= 0.4 V; bus dominant 2 5 12 mA
Bus lines; pins CANH and CANLVO(dom) dominant output voltage VTXD =0V; t< tto(dom)TXD
pin CANH 2.75 3.5 4.5 V
pin CANL 0.5 1.5 2.25 V
Vdom(TX)sym transmitter dominant voltage
symmetry
Vdom(TX)sym = VCC VCANH VCANL 400 - +400 mV
Table 7. Static characteristics …continuedTvj= 40 C to +150 C; VCC= 4.5 V to 5.5 V; VIO= 2.8 V to 5.5V[1] =60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[3] Maximum value assumes VCC
VIO, the maximum value will be VCC + 0.3 V.
[4] Not tested in production; guaranteed by design.
[5] Vcm(CAN) is the common mode voltage of CANH and CANL.
[6] For TJA1042T/3 and TJA1042TK/3: values valid when VIO = 4.5 V to 5.5 V; when VIO = 2.8 V to 4.5 V, values valid when
Vcm(CAN)= 12Vto +12V.
VO(dif)bus bus differential output voltage VTXD =0V; t< tto(dom)TXD
VCC= 4.75 V to 5.25V =45to65
1.5 - 3 V
VTXD =VIO; recessive; no load 50 - +50 mV
VO(rec) recessive output voltage Normal mode; VTXD =VIO; no load 2 0.5VCC 3V
Standby mode; no load 0.1 - +0.1 V
Vth(RX)dif differential receiver threshold
voltage
Vcm(CAN)= 30Vto +30V [5]
Normal mode 0.5 0.7 0.9 V
Standby mode [6] 0.4 0.7 1.15 V
Vhys(RX)dif differential receiver hysteresis
voltage
Vcm(CAN)= 30Vto +30V
Normal mode 120 200 mV
IO(dom) dominant output current VTXD =0V; t< tto(dom)TXD; VCC =5 V
pin CANH; VCANH =0V 100 70 40 mA
pin CANL; VCANL=5V / 40 V 40 70 100 mA
IO(rec) recessive output current Normal mode; VTXD =VIO
VCANH =VCANL = 27 V to +32V 5- +5 mA leakage current VCC =VIO =0V; VCANH =VCANL =5V 5- +5 A input resistance 9 15 28 k
Ri input resistance deviation between VCANH and VCANL 1- +1 %
Ri(dif) differential input resistance 19 30 52 k
Ci(cm) common-mode input
capacitance
[4] -- 20 pF
Ci(dif) differential input capacitance [4] -- 10 pF
Common mode stabilization output; pin SPLIT; only for TJA1042T output voltage Normal mode
ISPLIT= 500Ato +500A
0.3VCC 0.5VCC 0.7VCC V
Normal mode; RL =1 M 0.45VCC 0.5VCC 0.55VCCV leakage current Standby mode
VSPLIT= 58 V to +58V 5- +5 A
Temperature detection
Tj(sd) shutdown junction
temperature
[4] -190 - C
Table 7. Static characteristics …continued
Tvj= 40 C to +150 C; VCC= 4.5 V to 5.5 V; VIO= 2.8 V to 5.5V[1] =60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
11. Dynamic characteristics
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
Table 8. Dynamic characteristics
Tvj= 40 C to +150 C; VCC= 4.5 V to 5.5 V; VIO= 2.8 V to 5.5V[1] =60 unless specified otherwise. All voltages are
defined with respect to ground. Positive currents flow into theIC.[2]
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 4 and Figure5
td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 - ns
td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 - ns
td(busdom-RXD) delay time from bus dominant to RXD Normal mode - 60 - ns
td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 - ns
tPD(TXD-RXD) propagation delay from TXD to RXD version with SPLIT pin
Normal mode - 220 ns
versions with VIO pin
Normal mode - 250 ns
tto(dom)TXD TXD dominant time-out time VTXD=0 V; Normal mode 0.3 2 5 ms
tto(dom)bus bus dominant time-out time Standby mode 0.3 2 5 ms
tfltr(wake)bus bus wake-up filter time version with SPLIT pin
Standby mode
0.5 1 3 s
versions with VIO pin
Standby mode
0.5 1.5 5 s
td(stb-norm) standby to normal mode delay time 7 25 47 s
