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TJA1041AT.
High-speed CAN transceiver with standby and sleep mode
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
FEATURES
Optimized for in-vehicle high speed communication Fully compatible with the ISO 11898 standard Communication speed up to 1 Mbit/s Very low ElectroMagnetic Emission (EME) Differential receiver with wide common-mode range,
offering high ElectroMagnetic Immunity (EMI) Passive behaviour when supply voltage is off Automatic I/O-level adaptation to the host controller
supply voltage Recessive bus DC voltage stabilization for further
improvement of EME behaviour Listen-only mode for node diagnosis and failure
containment Allows implementation of large networks (more than
110 nodes).
Low-power management Very low-current in standby and sleep mode, with local
and remote wake-up Capability to power down the entire node, still allowing
local and remote wake-up Wake-up source recognition.
Protection and diagnosis (detection and signalling) TXD dominant clamping handler with diagnosis RXD recessive clamping handler with diagnosis TXD-to-RXD short-circuit handler with diagnosis Over-temperature protection with diagnosis Undervoltage detection on pins VCC, VI/O and VBAT Automotive environment transient protected bus pins
and pin VBAT Short-circuit proof bus pins and pin SPLIT (to battery
and to ground) Bus line short-circuit diagnosis Bus dominant clamping diagnosis Cold start diagnosis (first battery connection).
GENERAL DESCRIPTIONThe TJA1041A provides an advanced interface between
the protocol controller and the physical busina Controller
Area Network (CAN) node. The TJA1041A is primarily
intendedfor automotive high-speed CAN applications (up
to 1 Mbit/s). The transceiver provides differential transmit
capability to the bus and differential receive capability to
the CAN controller. The TJA1041A is fully compatible to
the ISO 11898 standard, and offers excellent EMC
performance, very low power consumption, and passive
behaviour when supply voltage is off. The advanced
features include: Low-power management, supporting local and remote
wake-up with wake-up source recognition and the
capability to control the power supply in the rest of the
node Several protection and diagnosis functions including
short circuitsof the bus lines and first battery connection Automatic adaptation of the I/O-levels, in line with the
supply voltage of the controller.
ORDERING INFORMATION
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
QUICK REFERENCE DATA
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
BLOCK DIAGRAM
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
PINNING
FUNCTIONAL DESCRIPTIONThe primary functionofa CAN transceiveristo provide the
CAN physical layer as described in the ISO 11898
standard. In the TJA1041A this primary function is
complemented with a number of operating modes,
fail-safe features and diagnosis features, which offer
enhanced system reliability and advanced power
management functionality.
Operating modesThe TJA1041A can be operated in five modes, each with
specific features. Control pins STB and EN select the
operating mode. Changing between modes also gives
access to a number of diagnostics flags, available via
pin ERR. The following sections describe the five
operating modes. Table 1 shows the conditions for
selecting these modes. Figure 3 illustrates the mode
transitions when VCC, VI/O and VBAT are present.
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
Table 1 Operating mode selection
Notes Setting the pwon flag or the wake-up flag will clear the UVNOM flag. The transceiver directly enters sleep mode and pin INH is set floating when the UVNOM flag is set (so after the
undervoltage detection time on either VCC or VI/O has elapsed before that voltage level has recovered). When go-to-sleep command mode is selected for longer than the minimum hold time of the go-to-sleep command,
the transceiver will enter sleep mode and pin INH is set floating. On entering normal mode the pwon flag and the wake-up flag will be cleared.
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
NORMAL MODE
Normal mode is the mode for normal bi-directional CAN
communication. The receiver will convert the differential
analog bus signal on pins CANH and CANL into digital
data, available for output to pin RXD. The transmitter will
convert digital data on pin TXD into a differential analog
signal, available for output to the bus pins. The bus pins
are biased at 0.5VCC (via Ri(cm)). Pin INH is active, so
voltage regulators controlledby pin INH (see Fig.4) willbe
active too.
PWON/LISTEN-ONLY MODE pwon/listen-only mode the transmitterof the transceiver
is disabled, effectively providing a transceiver listen-only
behaviour. The receiver will still convert the analog bus
signalon pins CANH and CANL into digital data, available
for outputto pin RXD.Asin normal mode the bus pins are
biased at 0.5VCC, and pin INH remains active.
STANDBY MODE
The standby modeis the first-level power saving modeof
the transceiver, offering reduced current consumption. standby mode the transceiver is not able to transmit or
receive data and the low-power receiver is activated to
monitor bus activity. The bus pins are biased at ground
level (via Ri(cm)). Pin INH is still active, so voltage
regulators controlled by this pin INH will be active too.
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
Pins RXD and ERR will reflect any wake-up requests
(provided that VI/O and VCC are present).
GO-TO-SLEEP COMMAND MODE
The go-to-sleep command modeis the controlled routefor
entering sleep mode. In go-to-sleep command mode the
transceiver behaves as if in standby mode, plus a
go-to-sleep command is issued to the transceiver. After
remainingin go-to-sleep command modefor the minimum
hold time (th(min)), the transceiver will enter sleep mode.
The transceiver will not enter the sleep modeif the stateof
pins STB or EN is changed or the UVBAT, pwon or
wake-up flag is set before th(min) has expired.
SLEEP MODE
The sleep modeis the second-level power saving modeof
the transceiver. Sleep modeis enteredvia the go-to-sleep
command mode, and also when the undervoltage
detection time on either VCC or VI/O elapses before that
voltage level has recovered.In sleep mode the transceiver
still behaves as described for standby mode, but now
pin INH is set floating. Voltage regulators controlled by
pin INH will be switched off, and the current into pin VBAT
is reduced to a minimum. Waking up a node from sleep
modeis possible via the wake-up flag and (as longas the
UVNOM flag is not set) via pin STB.
Internal flagsThe TJA1041A makes use of seven internal flags for its
fail-safe fallback mode control and system diagnosis
support. Table 1 shows the relation between flags and
operating modes of the transceiver. Five of the internal
flags canbe made availableto the controllervia pin ERR.
Table 2 shows the details on how to access these flags.
The following sections describe the seven internal flags.
Table 2 Accessing internal flags via pin ERR
Notes Pin ERRisan active-LOW output,so aLOW level indicatesaset flaganda HIGH level indicatesa cleared flag.Allow
pin ERR to stabilize for at least 8 μs after changing operating modes. Allow for a TXD dominant time of at least 4 μs per dominant-recessive cycle.
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
UVNOM FLAG
UVNOM is the VCC and VI/O undervoltage detection flag.
The flag is set when the voltage on pin VCC drops below
VCC(sleep) for longer than tUV(VCC) or when the voltage on
pin VI/O drops below VI/O(sleep) for longer than tUV(VI/O).
When the UVNOM flag is set, the transceiver will enter
sleep modeto save power and not disturb the bus.In sleep
mode the voltage regulators connected to pin INH are
disabled, avoiding the extra power consumptionin caseof
a short-circuit condition. After a waiting time (fixed by the
same timers usedfor setting UVNOM) any wake-up request settingof the pwon flag will clear UVNOM and the timers,
allowing the voltage regulators to be reactivated at least
until UVNOM is set again.
UVBAT FLAG
UVBATis the VBAT undervoltage detection flag. The flagis
set when the voltage on pin VBAT drops below VBAT(stb).
When UVBATis set, the transceiver willtryto enter standby
mode to save power and not disturb the bus. UVBAT is
cleared when the voltageon pin VBAT has recovered. The
transceiver will then return to the operating mode
determined by the logic state of pins STB and EN.
PWON FLAG
Pwon is the VBAT power-on flag. This flag is set when the
voltage on pin VBAT has recovered after it dropped below
VBAT(pwon), particularly after the transceiver was
disconnected from the battery. By setting the pwon flag,
the UVNOM flag and timers are cleared and the transceiver
cannot enter sleep mode. This ensures that any voltage
regulator connectedto pin INHis activated when the node reconnectedto the battery.In pwon/listen-only mode the
pwon flag can be made available on pin ERR. The flag is
cleared when the transceiver enters normal mode.
WAKE-UP FLAG
The wake-up flag is set when the transceiver detects a
local or a remote wake-up request. A local wake-up
request is detected when a logic state change on
pin WAKE remains stable for at least twake. A remote
wake-up requestis detected after two bus dominant statesat least tBUSdom (with each dominant state followedbya
recessive state of at least tBUSrec). The wake-up flag can
onlybe setin standby mode, go-to-sleep command mode
or sleep mode. Setting of the flag is blocked during the
UVNOM flag waiting time. By setting the wake-up flag, the
UVNOM flag and timers are cleared. The wake-up flag is
immediately available on pins ERR and RXD (provided
that VI/O and VCC are present). The flag is cleared at
power-on,or when the UVNOM flagis setor the transceiver
enters normal mode.
WAKE-UP SOURCE FLAG
Wake-up source recognition is provided via the wake-up
source flag, whichis set when the wake-up flagis setbya
local wake-up requestvia pin WAKE. The wake-up source
flag can only be set after the pwon flag is cleared. normal mode the wake-up source flag can be made
available on pin ERR. The flag is cleared at power-on or
when the transceiver leaves normal mode.
BUS FAILURE FLAG
The bus failure flag is set if the transceiver detects a bus
line short-circuit conditionto VBAT,VCCor GND during four
consecutive dominant-recessive cycleson pin TXD, when
tryingto drive the bus lines dominant.In normal mode the
bus failure flag can be made available on pin ERR. The
flag is cleared when the transceiver re-enters normal
mode.
LOCAL FAILURE FLAG
In normal mode or pwon/listen-only mode the transceiver
can recognize five different local failures, and will combine
them into one local failure flag. The five local failures are:
TXD dominant clamping, RXD recessive clamping, a
TXD-to-RXD short circuit, bus dominant clamping, and
over-temperature. Nature and detection of these local
failures is described in Section “Local failures”. pwon/listen-only mode the local failure flag canbe made
available on pin ERR. The flag is cleared when entering
normal mode or when RXD is dominant while TXD is
recessive, provided that all local failures are resolved.
Local failuresThe TJA1041A can detect five different local failure
conditions. Any of these failures will set the local failure
flag, and in most cases the transmitter of the transceiver
will be disabled. The following sections give the details.
TXD DOMINANT CLAMPING DETECTION permanent LOW levelon pin TXD (duetoa hardwareor
software application failure) would drive the CAN bus into
a permanent dominant state, blocking all network
communication. The TXD dominant time-out function
prevents such a network lock-up by disabling the
transmitterof the transceiverif pin TXD remainsata LOW
levelfor longer than the TXD dominant time-out tdom(TXD).
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
The tdom(TXD) timer defines the minimum possible bit rate
of 40 kbit/s. The transmitter remains disabled until the
local failure flag is cleared.
RXD RECESSIVE CLAMPING DETECTION
An RXD pin clamped to HIGH level will prevent the
controller connected to this pin from recognizing a bus
dominant state. So the controller can start messages at
any time, whichis likelyto disturball bus communication.
RXD recessive clamping detection prevents this effectby
disabling the transmitter when the busisin dominant state
without RXD reflecting this. The transmitter remains
disabled until the local failure flag is cleared.
TXD-TO-RXD SHORT-CIRCUIT DETECTION
Ashort-circuit between pins RXD and TXDwould keep the
busina permanent dominant state once the busis driven
dominant, because the low-side driver of RXD is typically
stronger than the high-side driver of the controller
connected to TXD. The TXD-to-RXD short-circuit
detection prevents sucha network lock-upby disabling the
transmitter.Thetransmitter remains disabled until the local
failure flag is cleared.
BUS DOMINANT CLAMPING DETECTION CAN bus short circuit(to VBAT,VCCor GND)ora failure
in one of the other network nodes could result in a
differential voltageon the bus high enoughto representa
bus dominant state. Because a node will not start
transmissionif the busis dominant, the normal bus failure
detection will not detect this failure, but the bus dominant
clamping detection will. The local failure flag is set if the
dominant stateon the bus persistsfor longer than tdom(bus).
By checking this flag, the controller can determine if a
clamped busis blocking network communication. Thereis
no need to disable the transmitter. Note that the local
failure flag does not retain a bus dominant clamping
failure, and is released as soon as the bus returns to
recessive state.
OVER-TEMPERATURE DETECTION
To protect the output drivers of the transceiver against
overheating, the transmitter will be disabled if the virtual
junction temperature exceeds the shutdown junction
temperature Tj(sd). The transmitter remains disabled until
the local failure flag is cleared.
Recessive bus voltage stabilization recessive state the output impedanceof transceiversis
relatively high. In a partially powered network (supply
voltage is off in some of the nodes) any deactivated
transceiver with a significant leakage current is likely to
load the recessive bus to ground. This will cause a
common-mode voltage step each time transmissionstarts,
resulting in increased ElectroMagnetic Emission (EME).
Using pin SPLITof the TJA1041Ain combination with split
termination (see Fig.5) will reduce this step effect. In
normal mode and pwon/listen-only mode pin SPLIT
providesa stabilized 0.5VCCDC voltage.In standby mode,
go-to-sleep command mode and sleep mode pin SPLITis
set floating.
I/O level adapterThe TJA1041A is equipped with a built-in I/O-level
adapter.By using the supply voltageof the controller(tobe
supplied at pin VI/O) the level adapter ratio-metrically
scales the I/O-levelsof the transceiver. For pins TXD, STB
and EN the digital input threshold levelis adjusted, andfor
pins RXD and ERR the HIGH-level output voltage is
adjusted. This allows the transceiver to be directly
interfaced with controllers on supply voltages between
2.8V and 5.25 V, without the need for glue logic.
Pin WAKEPin WAKE of the TJA1041A allows local wake-up
triggering by a LOW to HIGH state change as well as a
HIGHto LOW state change. This gives maximum flexibility
when designing a local wake-up circuit. To keep current
consumptionata minimum, aftera twake delay the internal
bias voltage of pin WAKE will follow the logic state of this
pin. A HIGH level on pin WAKE is followed by an internal
pull-up to VBAT. A LOW level on pin WAKE is followed by
an internal pull-down towards GND. To ensure EMI
performance in applications not using local wake-up it is
recommended to connect pin WAKE to pin VBAT or to pin
GND.
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).
Notes Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor (6 kV level with pin GND connected to
ground). Equivalent to discharging a 200 pF capacitor via a 0.75 μH series inductor and a 10 Ω series resistor. Junction temperaturein accordance with IEC 60747-1.An alternative definitionis:Tvj =Tamb +P× Rth(vj-amb), where
Rth(vj-amb) is a fixed value. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
THERMAL CHARACTERISTICS
Philips Semiconductors Product specification
High speed CAN transceiver TJA1041A
QUALITY SPECIFICATIONQuality specification in accordance with “AEC-Q100”.
CHARACTERISTICSVCC= 4.75Vto 5.25 V; VI/O= 2.8 V to VCC; VBAT =5Vto27V; RL =60 Ω; Tvj= −40°Cto +150 °C; unless specified
otherwise; all voltages are defined with respect to ground; positive currents flow into the device; note1.
