TEA2019 ,Current mode switching power supply control circuitTEA2019CURRENT MODE SWITCHINGPOWER SUPPLY CONTROL CIRCUIT.DIRECT DRIVE OF THE EXTERNAL Due to its c ..
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TEA2019
Current mode switching power supply control circuit
TEA2019CURRENT MODE SWITCHING
POWER SUPPLY CONTROL CIRCUIT
.DIRECT DRIVE OF THE EXTERNAL
SWITCHING TRANSISTOR.POSITIVE AND NEGATIVE OUTPUT CUR-
RENTS UP TO 0.5A.CURRENT LIMITATION.TRANSFORMER DEMAGNETIZATION AND
POWER TRANSISTOR SATURATION SENS-
ING.FULL OVERLOAD AND SHORT-CIRCUIT
PROTECTION .PROPORTIONALBASE CURRENT DRIVING.LOW STANDBY CURRENT BEFORE START-
ING (1.6mA) .SYNCHRONIZATION CAPABILITY WITH IN-
TERNAL PLL.THERMAL PROTECTION
DIP14(Plastic package)
ORDER CODE: TEA2019
DESCRIPTIONThe TEA2019isan 14-pin DIP low cost integrated
circuit designed for the controlof switch mode
power supplies.It has the same basic functionsas
the TEA2018Abut with synchronization capability internal PLL.Itis particularly suitable for appli-
cations where oscillator synchronizationis re-
quired.
OUTPUT
AUXILIARY OUTPUT SUPPLY
POSITIVE SUPPLY VOLTAGE
SATURATION SENSING
DEMAGNETIZATION SENSING
ERROR AMPLIFIERNON-INVERTING INPUT
SYNCHRONIZATIONINPUT
NEGATIVE SUPPLY (OUTPUT STAGE)
SUBSTRATE SAMPLE (NEGATIVE)
GROUND
OSCILLATOR CAPACITOR
OSCILLATOR REFERENCE CURRENT
PLL OUTPUT
PIN CONNECTIONSDuetoits current mode regulation, the TEA2019
facilitates designof power supplies with following
features:. High stability regulationloop.. Automatic input voltage feed-forwardin dis-
continuous mode fly-back.. Automaticpulse-by-pulse current limitation.
Typical applications: Video Display Units, TV sets,
typewriters, micro-computers and industrial appli-
cations. For more details, see application
note AN406/0591.
ABSOLUTE MAXIMUMRATINGS
Symbol Parameter Value Unit+CC Positive Supply Voltage 15 V
V(aux) Auxiliary Output Supply Voltage 15 V–CC Negative Supply Voltage –5 V (peak) Peak Output Current (duty cycle< 5%) ± 1A Input Current Pins4-5 ± 5mA Junction Temperature 150 °C
DELAY
200ms
THERMAL
SHUT-DOWN
80%
DUTY
CYCLE
LIMITATION
-1V
VOLTAGE
LIMITATION
OSCILLATOR
REF
2.4V
PHASE
LOCKED
LOOP8 9
SWITCH
Undervoltage R Q
FLIP
FLOP
RECOPY &
3.2V
01.V
Demagnetization
Sensing
Sampling
Pulse
REF
Bias
”good”
Output
PLL
Out
Sync. Ct
Feed-back
Ground
Monitoring
Substrate
SENSE
AUX
TEA20192019-02.EPS
BLOCK DIAGRAM
TEA2019
ELECTRICAL OPERATING CHARACTERISTICSTamb =+25oC, potentialsreferencedto ground (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit+CC Positive Supply Voltage 6.6 8 15 V
VCC Negative Supply Voltage –1 –3 –5 V
VCC(start) Minimum positive supply voltagerequiredfor starting(V+CC rising) 6 6.6 V
VCC(stop) Minimum positive voltage below which device stops operating(V+CC falling) 4.2 4.9 5.6 VV+CC HysteresisonV+CC Threshold 0.7 1.1 1.6 V
ICC(sb) Standby Supply Current Before Starting[V+CC
Vth(Ic) Current Limitation Threshold Voltage (pin 12) –1100 –1000 –880 mV
R(Ic) CollectorCurrent Sensing Input Resistance 1000 Ω Demagnetization Sensing Threshold 75 100 125 mV
Demagnetization Sensing Input Current (pin5 grounded) 1 μA
τmax Maximum Duty Cycle 70 80 % Error Amplifier Gain 50+I Error Amplifier Input Current (non-inverting input) (pin6) 2 μA
V(REF) Internal Reference Voltage 2.3 2.4 2.5 V
ΔV(REF) Reference Voltage Temperature Drift 10–4 V/°C
TOSC Oscillator Free-running Period(R= 59kΩ,C= 1.5nF) 60 65 70 μs
ΔfOSC Oscillator Frequency Drift with Temperature(V+=+ 8V) 0.05 %/°C
ΔfOSC
ΔVCC Oscillator Frequency Drift withV+CC(+8Vton(min) Minimum Conducting Time(Ct= 1nF) 2 μs
2019-03.TBL
SYNCHRONIZATION INPUT (pin7)
Symbol Parameter Min. Typ. Max. Unit
V7pp Peakto Peak Sawtooth Voltage 0.5 2.5 V
R(7) Input Impedance 20 kΩ
2019-04.TBL
PLL CHARACTERISTICS (see Test Circuit)
Symbol Parameter Min. Typ. Max. Unit
Frequency Sensitivity 100 Hz/μA Capture Range (TOSC =64μs Typ.) TOSC -TSYNminTSYNmax -TOSC
2019-05.TBL
SATURATION SENSING (pin4)
Symbol Parameter Min. Typ. Max. Unit
V(4) Input Threshold 3.2 V
I(4) Input Current (V4> 3.2V) 50 μA
Input Internal Resistance 1 kΩ
2019-06.TBL
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min. Typ. Max. Unit+CC Positive Supply Voltage 8 V
VCC Negative Supply Voltage 3 V
THERMAL DATA
Symbol Parameter Value Unit
Rth(j-a) Junction-ambient Thermal Resistance 80 °C/W
2019-02.TBL
TEA2019
RAMP
GENERATOR
22nF
22nF
10Ω470Ω427 9 10 11 12 13 14
TEA2019
-1V
AS1
10nF
10nF
10kΩ
8.2kΩ 4.7μF
4.7μF
V12 V14
47nF
1.5nF
3.3nF
22nF
3.9kΩ
56kΩ 1%
59kΩ
V10
100Ω
2019-03.EPS
TYPICAL CIRCUIT
GENERAL DESCRIPTION
(see application note AN406/0591)
Operating Principles (Figure1) every period, the beginningof the conduction
timeof the transistoris triggeredby the fallof the
oscillator saw-tooth which actsas clock signal. The
period Toscis givenby:
Tosc≈ 0.69Ct (Rt+ 2000)
(Toscin seconds,Ctin Farad,RtinΩ)
The endof the conduction timeis determinedbya
signalissued from comparing the followingsignals. the sawtooth waveform representing the
collector currentof the switching transistor,
sampled across the emitter shunt resistor. the outputof the error amplifier.
Base Drive Fast turn-on each period,a current pulse ensures fast
transistor switch-on.
This pulse performs also the ton(min) functionat
the beginningof the conduction. Proportional base drive orderto save power, the positive base current
after the starting pulse becomesan imageof the
collector current.
The ratioICis programmedas follows (Figure2).
2019-04.EPS
Figure1: Current Mode ControlI SENSE
OSCILLATOR
ERROR
SIGNAL
ERROR
AMPLIFIER
COMPARATOR
FLIP-FLOP
VREF
OUTPUT
FILTER
LOAD
Error
Signal
OSCILLATOR
SAWTOOTH (sample)
FLIP-FLOP
TEA2019
Efficientand fast switch-offWhen the positive base driveis removed, 1s
(typically) will elapse before the applicationof
negative current therefore allowinga safe and
rapid collector current fall.
Safety Functions Overload& short-circuit protection
When the voltage appliedto pin12 exceeds the
current limitation thershold voltage [Vth(Ic)], the
outputflip-flopis reset and the transistoris turned
off.
The shunt resistorRe mustbe calculatedsoas obtain the current limitation thresholdon pinat the maximum allowable collector current. Demagnetization sensing
This function disables any new conduction cycle the transistoras longas the coreis not com-
pletely demagnetized.
When not used, pin5 mustbe grounded. ton(max)
Outside the regulation area andin the absence current limitation, the maximum conduction
timeis setat about 70%of the period. ton(min) minimum conducting timeis ensured during
each period (see Figure2). Supply voltage monitoring
The TEA2019 will stop operatingif VCC+on Pin3
falls below the threshold level VCC(stop).BC
COLLECTOR
CURRENT
BIAS
CURRENTC ReIC
ton(min)
TEA2019
2019-06.EPS
Figure2
Starting Process (Figure3)
Priorto starting,a low currentis drawn from the
high voltage source througha high value resistor.
This current charges the power supply storage
capacitorof the device. output pulses are available before the voltage pin3 has reached the threshold level [VCC(start),+CC rising].
During this time the TEA2019 draws only 1mA
(typically). When the voltageon pin3 reaches this
threshold base drive pulses appear.
The energy drawnby these pulses tendsto dis-
charge the power supply storage capacitor. How-
evera hysteresisof about 1.1V (typically)(Δ VCC) implementedto avoid the device from stopping.CC (start) (stop)VCCCC
4.9V
2019-07.EPS
Figure3: Normal TEA2019 Startup Sequence
TEA2019
The TEA2019 has some additional capabilities
comparedto the TEA2018A: The oscillatorcharge currentits supplied through internalcurrent generator,programmed exter-
nally- insteadof using an external charging
resistor. The sawtoothso obtainedis linear. The oscillator can be synchronized through an
internal PLL circuit. This feature provides syn-
chronization between the external sync pulse
and the endof the switching transistor current.
The sync pulse canbe for example the fly-back
pulseofa TV horizontal sweep circuit. As indi-
catedin the application diagram, this pulseis
applied firsttoa R.C. networkto obtaina low
voltage sawtooth and thento pin7of the circuit.
The PLL output (pin8) suppliesa correction
currentto pin9 throughan external resistor,soto maintain the oscillatorat the correct fre-
quency (referto application note AN406/0591for
detailed information).In the TEA2019,the power supplyof the positive
output stageis separated from the main power
supply,so thatit can be supplied froma lower
voltagein orderto reduce the I.C. power dissipa-
tion.
For low power applications, the circuit can be
normally supplied by connecting pins2 and3
together.In orderto protect the substrate (pin 13) from the
parasitic voltage peaks produced by negative
output current peaksat pin 14, the substrate
(pin 13)is internally separated from the negative
supply (pin 14). They must be externally con-
nected together. The switching transistor saturation voltage can monitoredat pin4. To achieve this,a high
voltage diode must be connected between the
collectorof the switching transistor and pin4.
Alsoa resistor mustbe connected from pin4to+CC (see application diagram). This arrange-
mentis useful when the chosen valueof base
currentis very low andasa consequence the
saturationvoltage willbehigh.In thisevent,when
VCE(sat) increases above 2.5V, the base current interruptedbeforethe normal endof the period.
Remark: the TEA2019 can also operate without
this protection.
47μF
385V
0.1μF
0.1μFx 1N4007
RFFilterx 12mH
0.5A
1N4148
PrimaryGround
SecondaryGround
TEA2019
Mains
Input
910 14
1.5nF
22nF3.3nF
56kΩ56kΩ
3.9kΩ
82kΩ 10kΩ
10kΩ
1.8kΩ
47nF
33nF
10μF
18Ω
10Ω10kΩ
470μF
1N41483.9Ω
120kΩ
3.3Ω
BUV
46A
BYT
BYT11-100
BYT11-1000
0.47Ω
4.7Ω
10μF
BYT11-800
BYT11-800
100μF
160V
470μF
40V
120V
0.4A
24V
0.5A
1kΩ
680Ω
2.2nF
100Ω 1N4001
Sync.
Pulse
2019-08.EPS
TYPICAL APPLICATION
.PMAX= 60W.Free-running Frequency: 15kHz.155VRMS≤ VAC≤ 250VRMS . Outputs: 120V± 3%, 0.4A
24V ±3%, 0.5A. VCE Monitoring
TEA2019
