TEA1795T ,GreenChip synchronous rectifier controllerGeneral descriptionThe TEA1795T is a member of the new generation of Synchronous Rectifier (SR) con ..
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TEA1795T
GreenChip synchronous rectifier controller
1. General descriptionThe TEA1795T is a member of the new generation of Synchronous Rectifier (SR)
controller ICs for switched mode power supplies. Its high level of integration enables the
design of a cost-effective power supply with a minimum number of external components.
The TEA1795T is a dedicated controller IC for synchronous rectification on the secondary
side of resonant converters. It has two driver stages for driving the SR MOSFETs, which
are rectifying the outputs of the central tap secondary transformer windings.
The two gate driver stages have their own sensing inputs and operate independently of
each other.
The TEA1795T is fabricated in a Silicon On Insulator (SOI) process.
2. Features and benefits
2.1 Distinctive features Accurate synchronous rectification functionality Wide supply voltage range (8.5 V to 38V) Separate sense inputs for sensing the drain and source voltage of each SR MOSFET High level of integration, resulting in a minimum external component count High driver output voltage of 10 V to drive all MOSFET brands to the lowest RDSon
2.2 Green features Low current consumption High system efficiency from no load to full load
2.3 Protection features UnderVoltage Protection (UVP)
3. ApplicationsThe TEA1795T is intended for resonant power supplies. In such applications, it can drive
two external synchronous rectifier MOSFETs which replace diodes for the rectification of
the voltages on the two secondary windings of the transformer. It can be used in
applications such as: Adapters ATX power supplies
TEA1795T
GreenChip synchronous rectifier controller
Rev. 1 — 4 November 2010 Product data sheet
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controller Server power supplies LCD television Plasma television
4. Ordering information
5. Block diagram
Table 1. Ordering informationTEA1795T/N1 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controller
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
7.1 IntroductionThe TEA1795T is a controller for synchronous rectification to be used in resonant
applications. It can drive two synchronous rectifier MOSFETs on the secondary side of the
central tap transformer winding. A typical configuration is shown in Figure3.
Table 2. Pin descriptionSSA 1 source sense input MOSFET A
GND 2 ground
GDA 3 gate driver output MOSFET A
DSA 4 drain sense input for synchronous timing MOSFET A
DSB 5 drain sense input for synchronous timing MOSFET B
GDB 6 gate driver output MOSFET B
VCC 7 supply voltage
SSB 8 source sense input MOSFET B
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controller
7.2 Start-up and UnderVoltage LockOut (UVLO)The IC leaves the UVLO state and activates the synchronous rectifier circuitry when the
voltage on the VCC pin is above Vstartup (8.5 V typical). When the voltage drops below
8.0 V (typical), the UVLO state is reentered and the SR MOSFET gate driver outputs are
actively kept low.
7.3 Supply managementAll (internal) reference voltages are derived from a temperature compensated, on-chip
band gap circuit.
7.4 Synchronous rectification (DSA, SSA, DSB and SSB pins)The voltages present between the drain and source terminals of the SR MOSFETs are
used to derive the timing for the gate drive signal. The IC senses the voltage difference
between the drain sense (pins DSA and DSB) and the source sense (pins SSA and SSB)
connections. When this voltage difference is lower than Vact(drv) (−220 mV typical), the
corresponding gate driver output voltage is driven high and the external SR MOSFET is
switched on.
When the external SR MOSFET is switched on, the input signals on the drain sense pins
and source sense pins are ignored during the minimum synchronous rectification active
time (tact(sr)(min), 520 ns typical). This minimizes false switch-off due to the sensing of high
frequency ringing signals at the start of the conduction phase.
Once this minimum synchronous rectification active time has ended, the IC monitors the
difference between the drain sense inputs and the source sense inputs. When the
difference is higher than Vreg(drv) (−25 mV typical), the gate driver output voltage is
regulated to maintain this −25 mV difference between the drain sense pins and the source
sense pins. As a result, the SR MOSFET can be switched off quickly when the current
through the external SR MOSFET reaches zero.
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controllerThe zero current is detected by sensing a Vdeact(drv) (−12 mV typical) difference between
the drain sense pins and the source sense pins (see Figure 4). A synchronous
rectification off-timer (toff(sr)(min), 400 ns typical) is started and the next switching cycle can
only be started when the synchronous rectification off-timer has finished.
7.5 Gate driver (GDA and GDB pins)The gate driver circuit to the gate of the external SR MOSFET has a source capability of
typically 400 mA and a sink capability of typically 2.7 A. This allows fast turn-on and
turn-off of the external SR MOSFET for efficient operation. The source stage is coupled to
the timer (see Figure 1). When the timer has finished, the source capability is reduced to a
small current (4 mA typical) capable of keeping the driver output voltage at its level.
The output voltage of the driver is limited to 10 V (typical). This high output voltage drives
all MOSFET brands to the minimum on-state resistance.
During start-up conditions (VCC
pulled low.
7.6 Source sense (SSA and SSB pins)
The IC is equipped with additional source sense pins (SSA and SSB). These pins are
used for the measurement of the drain-to-source voltage of the external SR MOSFET.
This drain-to-source voltage determines the timing of the gate driver. The source sense
input should be connected as close as possible to the source pin of the external MOSFET to minimize timing errors, caused by voltage difference on PCB tracks, due
to parasitic inductance in combination with large dI/dt values.
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controller
8. Limiting values
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
[2] Equivalent to discharging a 200 pF capacitor through a 0.75 μH coil and a 10 Ω resistor.
9. Thermal characteristics
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured
with respect to ground (pin 2); positive currents flow into the chip. Voltage ratings are valid provided
other ratings are not violated; current ratings are valid provided the other ratings are not violated.
Voltages
VCC supply voltage continuous −0.4 +38 V
Vsense(D)A drain sense voltage A continuous - 120 V
Vsense(D)B drain sense voltage B continuous - 120 V
Currents
Idrv(G)A gate driver current A δ <10% −0.8 +3.0 A
Idrv(G)B gate driver current B δ <10% −0.8 +3.0 A
II(DSA) input current on pin DSA −3- mA
II(DSB) input current on pin DSB −3- mA
II(SSA) input current on pin SSA −1+1 mA
II(SSB) input current on pin SSB −1+1 mA
General
Ptot total power dissipation Tamb <80°C - 0.45 W
Tstg storage temperature −55 +150 °C junction temperature −40 +150 °C
ElectroStatic Discharge voltage (ESD)
VESD electrostatic discharge
voltage
class 2
human body
model
[1] - 2000 V
machine model [2] -200 V
charged device
model
-500 V
Table 4. Thermal characteristics
Rth(j-a) thermal resistance from junction
to ambient
JEDEC test board 150 K/W
Rth(j-c) thermal resistance from junction
to case
JEDEC test board 100 K/W
NXP Semiconductors TEA1795T
GreenChip synchronous rectifier controller
10. Characteristics
[1] The VCC stop voltage is Vstartup− Vhys.
[2] The Vdeact(drv) level is always above the Vreg(drv) level.
Table 5. Characteristics
Tamb =25 °C; VCC=20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Supply voltage management (pin VCC)
Vstartup start-up voltage 8.2 8.5 8.8 V
Vhys hysteresis voltage [1] -0.5 - V
ICC(oper) operating supply current VCC =8V (VCC fsw= 200 kHz; loadon pins GDA and GDB
-1.85 - mA
Synchronous rectification sense input (pins DSA/SSA and pins DSB/SSB)
Vact(drv) driver activation voltage Vsense(S)A =0V; Vsense(S)B =0V −260 −220 −180 mV
Vreg(drv) driver regulation voltage Vsense(S)A =0V; Vsense(S)B =0V −33 −25 −17 mV
Vdeact(drv) driver deactivation voltage Vsense(S)A =0V; Vsense(S)B =0V [2] - −12 - mV
VI(cm) common-mode input voltage pins SSA and SSB −0.7 - +0.7 V
td(act)(drv) driver activation delay time Vsense(S)A =0V; Vsense(S)B =0V;
Vsense(D)A= falling from +0.5Vto −0.5V;
Vsense(D)B= falling from +0.5Vto −0.5V
-100 - ns
td(deact)(drv) driver deactivation delay
time
Vsense(S)A =0V; Vsense(S)B =0V;
Vsense(D)A= rising from −0.35Vto +0.5V;
Vsense(D)B= rising from −0.35Vto +0.5V
-35 - ns
tact(sr)(min) minimum synchronous
rectification active time
415 520 625 ns
toff(sr)(min) minimum synchronous
rectification off-time
310 400 490 ns
Gate driver (pins GDA/GDB)
Isource source current VCC=15 V; pins GDA/GDB=2 V; during
minimum synchronous rectification active
time
−0.46 −0.4 −0.34 A
VCC=15 V; pins GDA/GDB=5V;
minimum synchronous rectification active
time has ended −4- mA
Isink sink current VCC =15V
pins GDA/GDB=2V 1 1.4 - A
pins GDA/GDB= 9.5V 2.2 2.7 - A
Vo(max) maximum output voltage VCC =15V - 10 12 V
Switching
fsw(max) maximum switching
frequency
500 - - kHz
