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TDK5111 ,ASK/FSK Transmitter 315 MHzcharacteristics.Terms of delivery and rights to change design reserved.Due to technical requirement ..
TDK5111F , 315 MHz ASK/FSK Transmitter in 10-pin Package
TDK5111F , 315 MHz ASK/FSK Transmitter in 10-pin Package
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TDK5111
ASK/FSK Transmitter 315 MHz
Wireless Components
ASK/FSK Transmitter 315 MHz
TDK 5111 Version 1.1
Specification October 2002
Edition 31.10.2002
Published by Infineon Technologies AG,
Balanstraße 73,
81541 München
© InfineonTechnologiesAG 2002.
All Rights Reserved.
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plemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
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Critical components1 of the InfineonTechnologiesAG, may only be used in life-support devices or systems2 with the express written approval of the
InfineonTechnologiesAG.A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-
support device or system, or to affect its safety or effectiveness of that device or system.Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they
fail, it is reasonable to assume that the health of the user may be endangered.
Product Info
Product Info
General DescriptionThe TDK 5111 is a single chip ASK/
FSK transmitter for the frequency band
314-317 MHz. The IC offers a high
level of integration and needs only a
few external components. The device
contains a fully integrated PLL synthe-
sizer and a high efficiency power ampli-
fier to drive a loop antenna. A special
circuit design and an unique power
amplifier design are used to save cur-
rent consumption and therefore to save
battery life. Additionally features like a
power down mode, a low power detect
and a divided clock output are imple-
mented. The IC can be used for both
ASK and FSK modulation.
Features-fully integrated frequency synthe-
sizerVCO without external componentshigh efficiency power amplifier
typically 10 dBm @ 3 Vfrequency range 314-317 MHzASK/FSK modulation low supply current typ. 13 mA@3Vvoltage supply range 2.1 - 4 Vpower down modelow voltage sensorprogrammable divided clock output
for µClow external component count
Applications-Keyless entry systemsRemote control systemsAlarm systemsCommunication systems
Ordering Information
available on tape and reel
Product Description2.1Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.2Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.4Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
Product Description
2.1Overview
The TDK 5111 is a single chip ASK/FSK transmitter for the frequency band 314-
317 MHz. The IC offers a high level of integration and needs only a few external
components. The device contains a fully integrated PLL synthesizer and a high
efficiency power amplifier to drive a loop antenna. A special circuit design and
an unique power amplifier design are used to save current consumption and
therefore to save battery life. Additional features like a power down mode, a low
power detect and a divided clock output are implemented. The IC can be used
for both ASK and FSK modulation.
2.2ApplicationsKeyless entry systemsRemote control systemsAlarm systemsCommunication systems
2.3Featuresfully integrated frequency synthesizerVCO without external componentshigh efficiency power amplifier typ. 10 dBm @ 3 Vfrequency range 314-317 MHzASK/FSK modulation low supply current typ. 13 mA @ 3 Vvoltage supply range 2.1 - 4 Vpower down modelow voltage sensorprogrammable divided clock output for µClow external component count
2.4
Functional Description3.1Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
3.2Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.3Functional Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7
3.4Functional Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.4.1PLL Synthesizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.4.2Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.4.3Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-9
3.4.4Low Power Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-9
3.4.5Power Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.5.1Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.5.2PLL Enable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.5.3Transmit Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.5.4Power mode control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.6Recommended timing diagrams for ASK- and FSK-Modulation . .3-12
Functional Description
3.1Pin Configuration
Pin_config.wmf
Figure 3-1IC Pin Configuration
Functional Description
3.2Pin Definitions and Functions
Functional Description
Functional Description
Functional DescriptionIndicated voltages and currents apply for PLL Enable Mode and Transmit Mode.
In Power Down Mode, the values are zero or high-ohmic.
Functional Description
3.3Functional Block diagram
Funct_Block_Diagram.wmf
Figure 3-2Functional Block diagram
Functional Description
3.4Functional Blocks
3.4.1 PLL Synthesizer
The Phase Locked Loop synthesizer consists of a Voltage Controlled Oscillator
(VCO), an asynchronous divider chain, a phase detector, a charge pump and a
loop filter. It is fully implemented on chip. The tuning circuit of the VCO consist-
ing of spiral inductors and varactor diodes is on chip, too. Therefore no addi-
tional external components are necessary. The nominal center frequency of the
VCO is 630 MHz. The oscillator signal is fed both, to the synthesizer divider
chain and to the power amplifier. The overall division ratio of the asynchronous
divider chain is 64. The phase detector is a Type IV PD with charge pump. The
passive loop filter is realized on chip. In all 315 MHz applications, the CSEL pin
is not connected (logic high).
3.4.2 Crystal Oscillator
The crystal oscillator operates at 9.84 MHz. Frequencies of 615 kHz or 2.46
MHz are available at the clock output CLKOUT (pin 8) to drive the clock input
of a micro controller.
The frequency at CLKOUT (pin 8) is controlled by the signal at CLKDIV (pin 9)
To achieve FSK transmission, the oscillator frequency can be detuned by a
fixed amount by switching an external capacitor via FSKOUT (pin 11).
The condition of the switch is controlled by the signal at FSKDTA (pin 7). Low:Voltage at pin < 0.2 VOpen:Pin openLow:Voltage at pin < 0.5 VOpen:Pin openHigh:Voltage at pin > 1.5 V
Functional Description
3.4.3 Power Amplifier
For operation at 315 MHz, the power amplifier is fed with the VCO frequency
divided by 2. It is possible to feed the power amplifier directly from the voltage
controlled oscillator. This is controlled by FSEL (pin 15) as described in the
table below. This is not recommended for this frequency range.
The Power Amplifier can be switched on and off
by the signal at ASKDTA (pin 6).
The Power Amplifier has an Open Collector output at PAOUT (pin 14) and
requires an external pull-up coil to provide bias. The coil is part of the tuning and
matching LC circuitry to get best performance with the external loop antenna.
To achieve the best power amplifier efficiency, the high frequency voltage swing
at PAOUT (pin 14) should be twice the supply voltage.
The power amplifier has its own ground pin PAGND (pin 13) in order to reduce
the amount of coupling to the other circuits.
In all 315 MHz applications, the pin FSEL is connected to ground.
3.4.4 Low Power Detect
The supply voltage is sensed by a low power detector. When the supply voltage
drops below 2.15 V, the output LPD (pin 2) switches to the low-state. To mini-
mize the external component count, an internal pull-up current of 40 µA gives
the output a high-state at supply voltages above 2.15 V.
The output LPD (pin 2) can either be connected to ASKDTA (pin 6) to switch off
the PA as soon as the supply voltage drops below 2.15 V or it can be used to
inform a micro-controller to stop the transmission after the current data packet. Low:Voltage at pin < 0.5 VOpen:Pin openLow:Voltage at pin < 0.5 VOpen:Pin openHigh:Voltage at pin > 1.5 V
Functional Description
3.4.5 Power Modes
The IC provides three power modes, the POWER DOWN MODE, the PLL
ENABLE MODE and the TRANSMIT MODE.
3.4.5.1 Power Down Mode
In the POWER DOWN MODE the complete chip is switched off.
The current consumption is typically 0.25 nA at 3 V 25°C.
This current doubles every 8°C. The values for higher temperatures are
typically 14 nA at 85°C and typically 600 nA at 125°C.
3.4.5.2 PLL Enable Mode
In the PLL ENABLE MODE the PLL is switched on but the power amplifier is
turned off to avoid undesired power radiation during the time the PLL needs to
settle. The turn on time of the PLL is determined mainly by the turn on time of
the crystal oscillator and is less than 1 msec when the specified crystal is used.
The current consumption is typically 4 mA.
3.4.5.3 Transmit Mode
In the TRANSMIT MODE the PLL is switched on and the power amplifier is
turned on too.
The current consumption of the IC is typically 13 mA when using a proper trans-
forming network at PAOUT, see Figure 4-1.
3.4.5.4 Power mode control
The bias circuitry is powered up via a voltage V > 1.5 V at the pin PDWN (pin 1).
When the bias circuitry is powered up, the pins ASKDTA and FSKDTA are
pulled up internally.
Forcing the voltage at the pins low overrides the internally set state.
Alternatively, if the voltage at ASKDTA or FSKDTA is forced high externally, the
PDWN pin is pulled up internally via a current source. In this case, it is not nec-
essary to connect the PDWN pin, it is recommended to leave it open.
The principle schematic of the power mode control circuitry is shown in
Figure 3-5.
Functional Description
Power_Mode.wmf
Figure 3-5Power mode control circuitry
Table 3-7 provides a listing of how to get into the different power modes
Other combinations of the control pins PDWN, FSKDTA and ASKDTA are not
recommended. Low:Voltage at pin < 0.7 V (PDWN)
Voltage at pin < 0.5 V (FSKDTA, ASKDTA)Open:Pin openHigh:Voltage at pin > 1.5 V
Functional Description
3.4.6 Recommended timing diagrams for ASK- and FSK-Modulation
ASK Modulation using FSKDTA and ASKDTA, PDWN not connected
ASK_mod.wmf
Figure 3-6ASK Modulation
FSK Modulation using FSKDTA and ASKDTA, PDWN not connected
FSK_mod.wmf
Figure 3-7FSK Modulation
Functional Description
Alternative ASK Modulation, FSKDTA not connected.
Alt_ASK_mod.wmf
Figure 3-8Alternative ASK Modulation
Alternative FSK Modulation
Alt_FSK_mod.wmf
Figure 3-9Alternative FSK Modulation
Applications4.150 Ohm-Output Testboard: Schematic. . . . . . . . . . . . . . . . . . . . . . . .4-2
4.250 Ohm-Output Testboard: Layout. . . . . . . . . . . . . . . . . . . . . . . . . . .4-3
4.350 Ohm-Output Testboard: Bill of material. . . . . . . . . . . . . . . . . . . . .4-4
4.450 Ohm-Output Testboard: Measurement results . . . . . . . . . . . . . . .4-5
4.5Application Hints on the Crystal Oscillator . . . . . . . . . . . . . . . . . . . . .4-6
4.6Design hints on the buffered clock output (CLKOUT). . . . . . . . . . . . .4-8
4.7Application Hints on the Power-Amplifier . . . . . . . . . . . . . . . . . . . . . .4-9

Partno	Mfg	Dc	Qty	Available	Descript
TDK5111		N/a	674	avai	ASK/FSK Transmitter 315 MHz