TDA9899HN ,Multistandard hybrid IF processing including car mobileFeatures2.1 Generaln 5 V supply voltage2n I C-bus control over all functions2n Four I C-bus address ..
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TDA9901 ,Wideband differential digital controlled variable gain amplifier
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TK13E25D ,Power MOSFET (N-ch 150V<VDSS≤250V)Absolute Maximum Ratings (Note) (T = 25 = 25 unless otherwise specified) unless otherwise specifi ..
TK13H90A1 , Swiching Regulator Applications
TK13P25D ,Power MOSFET (N-ch 150V<VDSS≤250V)Absolute Maximum Ratings (Note) (T = 25 = 25 = 25 = 25 unless otherwise specified) unless other ..
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TDA9899HN
Multistandard hybrid IF processing including car mobile
General descriptionThe Integrated Circuit (IC)is suitablefor Intermediate Frequency (IF) processing including
global multistandard Analog TV (ATV), Digital Video Broadcast (DVB) and mono FM radio
using only 1 IC and 1to 3 fixed Surface Acoustic Waves (SAWs) (application dependent).
Features
2.1 General5 V supply voltageI2 C-bus control over all functions Four I2 C-bus addresses provided; selection by programmable Module Address (MAD) Three I2 C-bus voltage level supported; selection via pin BVS Separate gain controlled amplifiers with input selector and conversion for incoming IF
[analog Vision IF (VIF) or Sound IF (SIF) or Digital TV (DTV)] allows the use of
different filter shapes and bandwidths All conventional A TV standards applicable by using DTV bandwidth window
[Band-Pass (BP)] filter Easyto use default settingsfor almost every standard provided, selectable viaI2 C-bus Two 4 MHz reference frequency stages; the first one operates either as crystal
oscillator or as optional signal input, the second one either as external signal input or
as buffered reference frequency output Stabilizer circuit for ripple rejection and to achieve constant output signals Smallest size, simplest application ElectroStatic Discharge (ESD) protection for all pins
2.2 Analog TV processing Gain controlled wide-band VIF amplifier; AC-coupled Multistandard true synchronous demodulation with active carrier regeneration: very
linear demodulation, good intermodulation figures, reduced harmonics and excellent
pulse response Internal Nyquist slope processing; switch-off able for alternative use of inexpensive
Nyquist slope SAW filter with additive video noise improvement Separate passive video detector; monitor output for antenna diversity applications Gated phase detector for L and L-accent standards Fully integrated VIF Voltage-Controlled Oscillator (VCO), alignment-free, frequencies
switchable for all negative and positive modulated standards via I2 C-bus
TDA9899
Multistandard hybrid IF processing including car mobile
Rev. 03 — 15 January 2008 Product data sheet
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile VIF Automatic Gain Control (AGC) detector for gain control; operating as a peak sync
detector for negative modulated signals and as a peak white detector for positive
modulated signals Optimized AGC modesfor negative modulation; e.g. very fast reaction timefor VIF and
SIF External VIF AGC access for car mobile applications; enable function via control port Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit
Digital-to-Analog Converter (DAC); AFC bits can be read-out via I2 C-bus High precise Tuner AGC (TAGC) T akeOver Point (TOP) for negative modulated
standards; TOP adjust via I2 C-bus TAGC TOP for positive standards and Received Signal Strength Indication (RSSI);
adjustable via I2 C-bus or alternatively by potentiometer Fully integrated Sound Carrier (SC) trap for any A TV standard (SC at 4.5 MHz,
5.5 MHz, 6.0 MHz and 6.5 MHz) SIF AGC for gain controlled SIF amplifier and high-performance single-reference
Quasi Split Sound (QSS) mixer True Split Sound (TSS) mode; picture carrier independent sound demodulationfor car
mobile applications Fully integrated sound BP filter supporting any A TV standard Optional use of external FM sound BP filter AM sound demodulation for L and L-accent standard Alignment-free selective FM Phase-Locked Loop (PLL) demodulator with high linearity
and low noise; external FM input Weak Audio Frequency Processing (WAFP) in the event of FM audio; audio gain and
bandwidth dependent on received signal quality VIF AGC voltage monitor output or port function VIF AFC current or tuner, SIF or FM AGC voltage or WAFP voltage monitor output Buffered SIF wide-band output, gain controlled by internal SIF AGC 2nd SIF output, gain controlled by internal SIF AGC or by internal FM carrier AGC for
Digital Signal Processor (DSP) Fully integrated BP filter for 2nd SIF at 4.5 MHz, 5.5 MHz, 6.0 MHz or 6.5 MHz
2.3 Digital TV processing Applicable for terrestrial and cable TV reception 70 dB variable gain wide-band IF amplifier (AC-coupled) Gain control via external control voltage (0Vto3V)2V (p-p) differential lowIF (downconverted) outputor1V (p-p) 1stIF outputfor direct
Analog-to-Digital Converter (ADC) interfacing DVB downconversion with integrated selectivity for Low IF (LIF)/Zero IF (ZIF) Integrated anti-aliasing tracking low-pass filter Fully integrated synthesizer controlled oscillator with excellent phase noise
performance Synthesizer frequencies for a wide range of world wide DVB standards (for IF center
frequencies of 34.5 MHz, 36 MHz, 44 MHz and57 MHz) All DVB bandwidth ranges supported (including ZIF I/Q) TAGC detector for independent tuner gain control loop applications
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile TAGC operating as peak detector, fast reaction time due to additional speed-up
detector Port function TAGC voltage monitor output
2.4 Dual mode Fully performed DTV processing and additional ATV video signal processing in
parallel, but with reduced performance, for very fast channel scan VIF AGC voltage monitor output or port function VIF AFC current monitor output or TAGC voltage output
2.5 FM radio mode Gain controlled wide-band Radio IF (RIF) amplifier; AC-coupled Buffered RIF amplifier wide-band output, gain controlled by internal RIF AGC Fully integrated BP filter for 2nd RIF at 4.5 MHz, 5.5 MHz, 6.0 MHz, 6.5 MHz or
10.7 MHz 2nd RIF output, gain controlled by internal RIF AGC or by internal FM carrier AGC for
DSP Alignment-free selective FM PLL demodulator with high linearity and low noise Precise fully digital AFC detector with 4-bit DAC; AFC bits read-out via I2 C-bus Weak signal FM audio frequency processing Port function Radio AFC current or tuner, RIF or FM AGC voltage or WAFC voltage monitor output
Applications Analog and digital TV front-end applications for TV sets, recording applications, car
mobile and personal computer cards
Quick reference data
Table 1. Quick reference data =5V; Tamb =25 °C. supply voltage [1] 4.5 5.0 5.5 V supply current - - 190 mA
Analog TV signal processingVideo part
Vi(IF)(RMS) RMS IF input voltage lower limit at−1 dB video
output signal 60 100 μV
GVIF(cr) control range VIF gain 60 66 - dB
fVIF VIF frequency see Table26 ---MHz
ΔfVIF(dah) digital acquisition help VIF
frequency window
related to fVIF
all standards except M/N - ±2.3 - MHz
M/N standard - ±1.8 - MHz
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileVo(video)(p-p) peak-to-peak video output voltage see Figure8
positive or negative
modulation; normal mode
and sound carrier on
[2] 1.7 2.0 2.3 V
trap bypass mode and
sound carrier off
[3]- 1.1 - V
Gdif differential gain “ITU-T J.63 line 330” [2][4]
B/G standard - - 5 % standard - - 7 %
ϕdif differential phase “ITU-T J.63 line 330” [2][4]
B/G standard - 2 4 deg standard - 2 4 deg
Bvideo(−3dB) −3 dB video bandwidth trap bypass mode and
sound carrier off; AC load: <20pF, RL >1kΩ
[3] 68- MHz
αSC1 first sound carrier attenuation M/N standard;
f=fSC1= 4.5 MHz;
see Figure20
[3] 38 --dB
B/G standard;
f=fSC1= 5.5 MHz;
see Figure22
[3] 35 --dB
(S/N)w weighted signal-to-noise ratio normal mode and sound
carrier on; B/G standard; % grey video signal;
unified weighting filter
(“ITU-T J.61”);
see Figure19
[2][5] 53 57 - dB
PSRRCVBS power supply ripple rejection on
pin CVBS
normal mode and sound
carrier on; fripple =70Hz;
video signal; grey level;
positive and negative
modulation; see Figure9
[2] 14 20 - dB
ΔIAFC/ΔfVIF change of AFC current with VIF
frequency
AFC TV mode [6] 0.85 1.05 1.25 μA/kHz
Audio part
Vo(AF)(RMS) RMS AF output voltage FM: QSS or TSS mode; kHz FM deviation;μs de-emphasis
430 540 650 mV
AM: 54 % modulation 400 500 600 mV
THD total harmonic distortion FM: 50μs de-emphasis; deviation: for TV mode kHz and for radio mode
22.5 kHz 0.15 0.50 %
AM: 54% modulation; on; see Figure32 0.5 1.0 %
Table 1. Quick reference data …continued =5V; Tamb =25 °C.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobilef−3dB(AF) AF cut-off frequency W3[2]= 0; W3[4]=0;
without de-emphasis; window
width= 237.5 kHz 100 - kHz
(S/N)w(AF) AF weighted signal-to-noise ratio “ITU-R BS.468-4”
FM: 27 kHz FM deviation;μs de-emphasis; vision
carrier unmodulated; PLL only 56 - dB
AM: BPoff 44 50 - dB
PSRR power supply ripple rejection fripple=70 Hz; see Figure9 14 20 - dB
Vo(RMS) RMS output voltage IF intercarrier single-ended
to GND; SC1 on; SC2off 140 180 mV intercarrier single-ended
to GND; L standard;
without modulation; BPon;
W7[5]=0 70 90 mV
FM sound part
Vi(FM)(RMS) RMS FM input voltage gain controlled operation;
W1[1:0]= 10 or
W1[1:0]= 11 or
W1[1:0]= 01; see Figure14 - 300 mV
ΔIAFC/ΔfRIF change of AFC current with RIF
frequency
AFC radio mode [6] 0.85 1.05 1.25 μA/kHz
αAM AM suppression referenced to 27 kHz deviation;μs de-emphasis;
AM:f=1 kHz; m=54% 46 - dB
Digital TV signal processingDigital direct IF
Vo(dif)(p-p) peak-to-peak differential output
voltage
between pin OUT2A and
pin OUT2B
[7]
W4[7]=0 - 1.0 1.1 V
W4[7]=1 - 0.50 0.55 V
GIF(max) maximum IF gain output peak-to-peak level to
input RMS level ratio
[8] -83 - dB
GIF(cr) control range IF gain [8] 60 66 - dB
PSRR power supply ripple rejection residual spuriousat nominal
differential output voltage
dependent on power supply
ripple
[8]
fripple =70Hz - 60 - dB
fripple=20 kHz - 60 - dB
Digital low IF
Vo(dif)(p-p) peak-to-peak differential output
voltage
between pin OUT1A and
pin OUT1B; W4[7]=0
[7] -2 -V
Table 1. Quick reference data …continued =5V; Tamb =25 °C.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] Values of video and sound parameters can be decreased at VP=4.5V.
[2] AC load;CL<20pF andRL >1kΩ. The sound carrier frequencies (dependingonTV standard)are attenuatedbythe integrated sound
carrier traps.
[3] The sound carrier trap can be bypassed by setting the I2C-bus bit W2[0] to logic 0; see Table 25. In this way the full composite video
spectrum appears at pin CVBS. The video amplitude is reduced to 1.1V (p-p).
GIF(max) maximum IF gain output peak-to-peak level to
input RMS level ratio
[8] -89 - dB
GIF(cr) control range IF gain [8] 60 66 - dB
fsynth synthesizer frequency see Table 37 and Table38 ---MHz
ϕn(synth) synthesizer phase noise with 4 MHz crystal oscillator
reference; fsynth=31 MHz;
fIF =36MHz
at 1 kHz [8] 89 99 - dBc/Hz
at 10 kHz [8] 89 99 - dBc/Hz
at 100 kHz [8] 98 102 - dBc/Hz
at 1.4 MHz [8] 115 119 - dBc/Hz
αripple(pb)LIF low IF pass-band ripple 6 MHz bandwidth - - 2.7 dB MHz bandwidth - - 2.7 dB MHz bandwidth - - 2.7 dB
αstpb stop-band attenuation 8 MHz band; f= 15.75 MHz 30 40 - dB
αimage image rejection −10 MHzto0 MHz; BPon 30 34 - dB
C/N carrier-to-noise ratio at fo= 4.9 MHz;
Vi(IF)=10 mV (RMS);
see Figure38
[8][9][10] 112 118 - dBc/Hz
Digital zero IF
Vo(dif)(p-p) peak-to-peak differential output
voltage
between pin OUT1A and
pin OUT1B or between
pin OUT2A andpin OUT2B;
W4[7]=0
[7] -2 -V
GIF(max) maximum IF gain output peak-to-peak level to
input RMS level ratio
[8] -89 - dB
GIF(cr) control range IF gain [8] 60 66 - dB
fsynth synthesizer frequency see Table 37 and Table38 ---MHz
ϕn(synth) synthesizer phase noise with 4 MHz crystal oscillator
reference; fsynth=31 MHz;
fIF =36MHz
at 1 kHz [8] 89 99 - dBc/Hz
at 10 kHz [8] 89 99 - dBc/Hz
at 100 kHz [8] 98 102 - dBc/Hz
at 1.4 MHz [8] 115 119 - dBc/Hz
Reference frequency input from external sourcefref reference frequency W7[7]=0 [11] -4 -MHz
Vref(RMS) RMS reference voltage W7[7]= 0; see Figure35
and Figure47 150 500 mV
Table 1. Quick reference data …continued =5V; Tamb =25 °C.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[4] Condition: luminance range (5 steps) from 0%to 100 %. Measurement value is based on 4 of 5 steps.
[5] Measurement using 200 kHz high-pass filter, 5 MHz low-pass filter and subcarrier notch filter (“ITU-T J.64”).
[6] To match the AFC output signal to different tuning systems a current output is provided. The test circuit is given in Figure 18. The
AFC steepness can be changed by resistors R1 and R2.
[7] With single-ended load for fIF<45 MHz RL≥ 1kΩ and CL≤5 pF to ground and for fIF=45 MHz to 60 MHz RL =1kΩ and CL≤3 pF to
ground.
[8] This parameter is not tested during production and is only given as application information.
[9] Noise level is measured without input signal but AGC adjusted corresponding to the given input level.
[10] Set with AGC nominal output voltage as reference. For C/N measurement switch input signal off.
[11] The tolerance of the reference frequency determines the accuracy of VIFAFC, RIFAFC, FM demodulator center frequency, maximum deviation, sound trap frequency, LIF band-pass cut-off frequency and ZIF low-pass cut-off frequency as well as the accuracy of the
synthesizer.
Ordering information
Table 2. Ordering informationTDA9899HL LQFP48 plastic low profile quad flat package; 48 leads; body 7×7× 1.4 mm SOT313-2
TDA9899HN HVQFN48 plastic thermal enhanced very thin quad flat package; no leads; terminals; body7×7× 0.85 mm
SOT619-1
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile Block diagram
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile Pinning information
7.1 Pinning
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
7.2 Pin description
Table 3. Pin descriptionLFSYN2 1 loop filter synthesizer 2 (conversion synthesizer)
n.c. 2 not connected
IF3A 3 IF symmetrical input 3 for sound
IF3B 4
CIFAGC 5 IFAGC capacitor; L standard
IF1A 6 IF symmetrical input 1 for vision or digital
IF1B 7
CTAGC 8 TAGC capacitor
IF2A 9 IF symmetrical input 2 for vision or digital
IF2B 10
TOP2 11 TOP potentiometer for positive modulated standards and RSSI reference
MPP1 12 multipurpose pin 1: VIF AGC monitor output or port function
LFVIF 13 loop filter VIF PLL
i.c. 14 internally connected; connect to ground
EXTFILO 15 output to external filter
MPP2 16 multipurpose pin 2: SIF AGC or FM AGC or TAGC or VIF AFC or FM AFC or
WAFP monitor output
EXTFILI 17 input from external filter
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile Functional description
8.1 IF input switchDifferent signal bandwidth can be handled by using two signal processing chains with
individual gain control.
Switch configuration allows independent selection of filter for analog VIF and for analog
SIF (used at same time) or DIF.
i.c. 18 internally connected; connect to ground
LFFM 19 loop filter FM PLL
CDEEM 20 de-emphasis capacitor
EXTFMI 21 external FM input
GNDD 22 digital ground
SDA 23 I2 C-bus data input and output
SCL 24 I2 C-bus clock input
ADRSEL 25 address select
OUT1A 26 zero IF I or low IF or 2nd sound intercarrier symmetrical output
OUT1B 27
CAF 28 Direct Current (DC) decoupling capacitor
OUT2A 29 zero IF Q or 1st Digital IF (DIF) symmetrical output
OUT2B 30
AUD 31 audio signal output
BVS 32 I2 C-bus voltage select
CVBS 33 composite video signal output
APCHC 34 audio processing capacitor for high cut
APCLC 35 audio processing capacitor and resistor for low cut
AGCDIN 36 AGC input for DIF amplifier for e.g. input from channel decoder AGC
AGCSWI 37 AGC control switch
LFSYN1 38 loop filter synthesizer 1 (filter control synthesizer)
OPTXTAL 39 optional quartz input
GNDA 40 analog ground
GNDA 41 analog ground
DIV 42 diversity output 43 supply voltage 44 supply voltage
AGCVIN 45 AGC input for VIF amplifier
FREF 46 4 MHz reference input or output
TAGC 47 TAGC output
GND 48 ground; plateau connection
Table 3. Pin description …continued
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileThe switch takes into account correct signal selection for TAGC in the event of VIF and
DIF signal processing.
8.2 VIF demodulatorATV demodulation using 6 MHz DVB window (band-pass) filter (for 6 MHz, 7 MHz or MHz channel width).
IF frequencies adapted to enable the use of different filter configurations. The Nyquist
processing is integrated.
For optional use of standard Nyquist filter the integrated Nyquist processing can be
switched off.
Sideband switch supplies selection of lower or upper sideband (e.g. for L-accent).
Equalizer provides optimum pulse response at different standards [e.g. to cope with
higher demands for Liquid Crystal Display (LCD) TV].
Integrated sound traps.
Sound trap reference independent from received 2nd sound IF (reference taken from
integrated reference synthesizer).
IF level selection provides an optimum adaptation of the demodulator to high linearity or
low noise.
Separate passive video detector for monitoring the received IF level in combination with
AGC hold mode for diversity application.
8.3 VIF AGC and tuner AGC
8.3.1 Mode selection of VIF AGCPeak white AGCfor positive modulation mode with adaptationfor speedup and black level
AGC (using proven system from TDA9886).
For negative modulation mode equal response times for increasing or decreasing input
level (optimum for amplitude fading)
or normal peak AGC or ultra fast peak AGC (for carmobile).
8.3.2 External VIF AGC controlAGC input for external control enabled via fast switching input (car mobile).
AGC hold mode (for diversity detection) via fast switching input (car mobile).
8.3.3 VIF AGC monitorVIF AGC DC voltage monitor output (with expanded internal characteristic).
VIF AGC read out viaI2 C-bus (forIF level indication) with zero-calibration via TOP setting
(TOP setting either via I2 C-bus or via TOP potentiometer).
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
8.3.4 Tuner AGCIndependent integral tuner gain control loop (not nested with VIF AGC). Integral
characteristic provides high control accuracy.
Accurate setting of tuner control onset (TOP) for integral tuner gain control loop via2 C-bus.
For L standard, TAGC remains VIF AGC nested, as from field experience in the past this
narrow-band T AGC gives best performance.
Thus two switchable TAGC systems for negative/DIF and positive modulation
implemented. standard TAGC output changed from current output to voltage output, as it is not
necessary to adapt for other than 5 V tuner. standard tuner time constant switching integrated (= speed up function in the event of
step into high input levels), to minimize external application.
For high TOP accuracy at L standard, additional adjustment via optional potentiometer or2 C-bus is provided.
Tuner AGC status bit provided. This function enables TOP alignment without need for
TAGC voltage measurement (e.g. for TOP alignment in a complete set, where access to
internal signals is not possible).
8.4 DIF/SIF FM and AM sound AGCExternal AGC control input for DIF. DIF includes 1st IF, zero IF and low IF.
Integrated gain control loop for SIF.
Bandwidth of AGC control for FM SIF related to used SAW bandwidth.
Peak AGC control in the event of FM SIF.
Ultra fast SIF AGC time constant for mobile mode.
Slow average AGC control in the event of AM sound.
AM sound AGC related to AM sound carrier level.
Fast AM sound AGC in the event of fast VIF AGC (speed up).
SIF AGC DC voltage monitor output with expanded internal characteristic.
8.5 Frequency phase-locked loop for VIFBasic function as previous TDA9887 design.
PLL gating mode for positive and negative modulation, optional.
PLL optimized for either overmodulation or strong multipath (car mobile).
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
8.6 DIF/SIF converter stageFrequency conversion with sideband suppression.
Selection mode of upper or lower sideband for pass or suppression.
Suppression around zero for frequency conversion.
I/Q output mode for zero IF conversion.
Conversion mode selection via synthesizer for DIF , TSS and radio mode or via VIF
Frequency Phase-Locked Loop (FPLL) for TV QSS sound (FM/AM).
External BP filter (e.g. for 4.5 MHz) for additional filtering, optional.
Bypass mode selection for use of external filter.
Integrated SIF BP tracking filter for chroma suppression.
Integrated tracking filters for LIF and ZIF.
Symmetrical output stages for DIF , ZIF and 2nd SIF.
Second narrow-band gain control loop for 2nd SIF via FM PLL.
8.7 Mono sound demodulator
8.7.1 Narrow-band FM PLL demodulationAdditional external input for either TV or radio intercarrier signal.
FM carrier selection independent from VIF trap, because VIF trap uses reference via
synthesizer.
FM wide and ultra wide mode with adapted loop bandwidth and different selectable acquisition window widths to cope with FM overmodulation conditions.
8.7.2 AM sound demodulationPassive AM sound detector.
L and L-accent standard without SAW switching (done by sideband selection of SIF
converter).
8.8 Audio amplifierDifferent gain settings for FM sound to adapt to different FM deviation.
Switchable de-emphasis for FM sound.
Automatic mute function when FM PLL is unlocked.
Forced mute function.
Weak signal processing for FM sound in the event of low or noisy FM carrier.
Weak signal processing includes noise dependent gain and bandwidth control.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileOutput amplifier for AM sound.
8.9 SynthesizerIn DIF mode, the synthesizer supports low and zero IF input frequencies for 34.5 MHz, MHz, 44 MHz and 57 MHz center frequencies.
In TSS and radio mode, the synthesizer supports 2nd sound intercarrier conversion. large setof synthesizer frequenciesin stepsof 0.5 MHz enables flexible combinationof
filter and 2nd IF frequencies.
Synthesizer loop internally adapted to divider ratio range for optimum phase noise
requirement (loop bandwidth).
Synthesizer reference either via 4 MHz crystal or via an external source. Individual pins
for crystal and external reference allows optimum interface definition and supports use of
custom reference frequency offset.
Buffered reference frequency output optional via external reference pin.
8.10I2 C-bus transceiver and slave addressFour different I2 C-bus device addresses to enable application with multi-IC use.2 C-bus transceiver input ports can handle three different I2 C-bus voltages.
Read-out functions as TDA9887 plus additional read out of VIF AGC and TAGC status.
I2 C-bus control[1] For MAD activation via pin ADRSEL: see Table4.
Table 4. Slave address detectionMAD1 0 1 GND
MAD2 0 0 VP
MAD3 1 1 resistor to GND
MAD4 1 0 resistor to VP
Table 5. Slave addresses[1]MAD1 43h 1000011
MAD2 42h 1000010
MAD3 4Bh 1001011
MAD4 4Ah 1001010
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
9.1 Read format[1] If no IF input is applied, then bit AFCWIN can be logic 1 due to the fact that the VCO is forced to the AFC
window border for fast lock-in behavior.
[2] All standards except M/N standard.
[3] M/N standard.
[4] Typical time constant of FM carrier detection is 50 ms. The minimal recommended wait time for read out is ms.
Table 6. R1 - data read register 1 bit allocationAFCWIN reserved CARRDET AFC4 AFC3 AFC2 AFC1 PONR
Table 7. R1 - data read register 1 bit description AFCWIN AFC window[1]= VCO in ±1.6 MHz AFC window[2]= VCO in ±0.8 MHz AFC window[3]= VCO out of ±1.6 MHz AFC window[2]= VCO out of ±0.8 MHz AFC window[3] - reserved CARRDET FM carrier detection[4]= detection (FM PLL is locked and level is less than 6 dB below
gain controlled range of FM AGC)= no detectionto1 AFC[4:1] automatic frequency control; see Table8 PONR power-on reset= after power-on reset or after supply breakdown= after a successful reading of the status register
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] fnom is the nominal frequency.
[2] In ATV mode f means vision intermediate frequency; in radio mode f means radio intermediate frequency.
Table 8. Automatic frequency control bits[1]0111 ≤ (fnom− 187.5 kHz)
0110fnom− 162.5 kHz
0101fnom− 137.5 kHz
0100fnom− 112.5 kHz
0011fnom− 87.5 kHz
0010fnom− 62.5 kHz
0001fnom− 37.5 kHz
0000fnom− 12.5 kHz
1111fnom+ 12.5 kHz
1110fnom+ 37.5 kHz
1101fnom+ 62.5 kHz
1100fnom+ 87.5 kHz
1011fnom+ 112.5 kHz
1010fnom+ 137.5 kHz
1001fnom+ 162.5 kHz
1000 ≥ (fnom+ 187.5 kHz)
Table 9. R2 - data read register 2 bit allocationreserved TAGC VAGC5 VAGC4 VAGC3 VAGC2 VAGC1 VAGC0
Table 10. R2 - data read register 2 bit description - reserved T AGC tuner AGC= active= inactiveto0 VAGC[5:0] AGC level detector; VIF AGC in ATV mode, SIF AGC in radio mode
and DIF AGC in DTV mode; seeT able11
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 11. AGC bits (for corresponding AGC characteristic see Figure 10)1111110 (TOP)[1]
111110 −0.04
111101 −0.08
111100 −0.12
111011 −0.16
111010 −0.20
111001 −0.24
111000 −0.28
110111 −0.32
110110 −0.36
110101 −0.40
110100 −0.44
110011 −0.48
110010 −0.52
110001 −0.56
110000 −0.60
101111 −0.64
101110 −0.68
101101 −0.72
101100 −0.76
101011 −0.80
101010 −0.84
101001 −0.88
101000 −0.92
100111 −0.96
100110 −1.00
100101 −1.04
100100 −1.08
100011 −1.12
100010 −1.16
100001 −1.20
100000 −1.24
011111 −1.28
011110 −1.32
011101 −1.36
011100 −1.40
011011 −1.44
011010 −1.48
011001 −1.52
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] The reference of 0 (TOP) can be adjusted via TOPPOS[4:0] (register W10; see Table 51 and Table 49) or
via potentiometer at pin TOP2.
9.2 Write format011000 −1.56
010111 −1.60
010110 −1.64
010101 −1.68
010100 −1.72
010011 −1.76
010010 −1.80
010001 −1.84
010000 −1.88
001111 −1.92
001110 −1.96
001101 −2.00
001100 −2.04
001011 −2.08
001010 −2.12
001001 −2.16
001000 −2.20
000111 −2.24
000110 −2.28
000101 −2.32
000100 −2.36
000011 −2.40
000010 −2.44
000001 −2.48
000000 −2.52
Table 11. AGC bits (for corresponding AGC characteristic see Figure 10) …continued
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
9.2.1 Subaddress[1] The register setting after power-on is not specified.
[2] See Table 17 for detailed description of W1.
[3] See Table 25 for detailed description of W2.
[4] See Table 29 for detailed description of W3.
[5] See Table 31 for detailed description of W4.
[6] See Table 36 for detailed description of W5.
[7] See Table 40 for detailed description of W6.
Table 12. W0 - subaddress register bit allocation A6 A5 A4 A3 A2 A1 A0
Table 13. W0 - subaddress register bit descriptionto4 A[7:4] has to be set to logic0to0 A[3:0] subaddress; see Table14
Table 14. Subaddress control bits 0 0 0 subaddress for register W1 0 0 1 subaddress for register W2 0 1 0 subaddress for register W3 0 1 1 subaddress for register W4 1 0 0 subaddress for register W5 1 0 1 subaddress for register W6 1 1 0 subaddress for register W7 1 1 1 subaddress for register W8 0 0 0 subaddress for register W9 0 0 1 subaddress for register W10
Table 15.I2 C-bus write register overview[1][2] RADIO STD1 STD0 TV2 TV1 DUAL FM EXTFIL[3] MOD STD4 STD3 STD2 SB PLL GATE TRAP[4] RESCAR AMUTE FMUTE FMWIDE0 DEEMT DEEM AGAIN1 AGAIN0[5] VIFLEVEL BP MPP2S1 MPP2S0 AGCSW IFIN1 IFIN0 VIFIN[6] FSFREQ1 FSFREQ0 SFREQ5 SFREQ4 SFREQ3 SFREQ2 SFREQ1 SFREQ0[7] TAGC1 TAGC0 AGC2 AGC1 FMWIDE1 TWOFLO AUDIOPRO DIRECT[8] FREFOUT WAFP SIFLEVEL VIDLEVEL OPSTATE PORT FILOUTBP NYQOFF[9] 0 0 0 0 EASY3 EASY2 EASY1 EASY0[10] DAGCSLOPE TAGCIS TAGCTC TOPNEG4 TOPNEG3 TOPNEG2 TOPNEG1 TOPNEG0
W10[11] 0 0 XPOTPOS TOPPOS4 TOPPOS3 TOPPOS2 TOPPOS1 TOPPOS0
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[8] See Table 43 for detailed description of W7.
[9] See Table 45for detailed description of W8.
[10] See Table 48 for detailed description of W9.
[11] See Table 51 for detailed description of W10.
9.2.2 Description of data bytes[1] For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table36.
Table 16. W1 - data write register bit allocationRADIO STD1 STD0 TV2 TV1 DUAL FM EXTFIL
Table 17. W1 - data write register bit description RADIO FM mode= radio= ATV/DTV and5 STD[1:0] 2nd sound IF; seeT able 18, Table 19 and Table20 and3 TV[2:1] TV mode= DTV and ZIF= DTV and LIF= ATV and TSS= ATV and QSS DUAL A TV and DTV dual mode for channel search; see Table23= dual (TV2=0)= normal and0 FM and EXTFIL FM and output switching; see Table22
Table 18. Intercarrier sound BP and FM PLL frequency select for ATV, QSS mode[1]0100X X 1 4.5 M/N standard
0101X X 1 5.5 B/G standard
0110X X 1 6.0 I standard
0111X X 1 6.5 D/K standard
0011X X 1 off L/L-accent standard
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table36.
[1] For description of bit MOD refer to Table 25 and bits FSFREQ[1:0] are described in Table36.
[1] For description of bit MOD refer to Table 25 and for BP refer to Table31.
Table 19. Intercarrier sound BP and FM PLL frequency select for ATV, TSS mode[1]01010005.5 M/N standard
01010105.5 B/G standard
01011005.5 I standard
01011105.5 D/K standard
0011X X 0 off L/L-accent standard
Table 20. Intercarrier sound BP and FM PLL frequency select for radio, QSS mode[1] 1 X X 0 0 0 4.5 M/N standard 1 X X 0 1 0 5.5 B/G standard 1 X X 1 0 0 6.0 I standard 1 X X 1 1 0 6.5 D/K standard 0 XXXX0 10.7 RADIO
Table 21. Second sound IF selection for 10.7 MHz[1] 0 1 10.7
Table 22. 2nd intercarrier and sound input and output switching 0 0 FM sound internal internal BP via FM AGC internal BP 0 1 FM sound EXTFILI internal BP external BP 1 0 FM sound EXTFMI internal BP external input 1 1 FM sound EXTFILI external BP via FM AGC external BP 0 0 AM sound not used 0 1 AM sound- internal BP internal BP 1 0 AM sound- internal BP internal BP 1 1 AM sound EXTFILI external BP internal BP
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 23. Dual mode optionsXXX0 all normal mode functions (ATV
OR DTV) X 1 1 analog CVBS at pin CVBS
AND direct 1st DIF atpins OUT2A and OUT2B
0001 analog CVBS at pin CVBS
AND digital zero IF I/Q atpins OUT1A, OUT1B and OUT2A, OUT2B
0101 analog CVBS at pin CVBS
AND digital low IF atpins OUT1A and OUT1B
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 24. W2 - data write register bit allocationMOD STD4 STD3 STD2 SB PLL GATE TRAP
Table 25. W2 - data write register bit description MOD modulation= negative; FM mono sound at ATV and dual mode= positive; AM mono sound at ATV and dual modeto4 STD[4:2] vision IF; see Table26 SB sideband for sound IF and digital low IF= upper
0=lower PLL operating modes; see Table27 GATE PLL gating
1=on=off TRAP sound trap
1=on= bypass
Table 26. Vision IF 0 0 0 0 38.0 38.0 low 0 0 0 1 38.5 38.375 low 0 0 1 0 39.0 38.875 low 0 0 1 1 39.5 39.875 low 0 1 0 0 32.0 32.25 high 0 1 0 1 32.5 32.625 high 0 1 0 1 32.5 33.9 - 0 1 1 0 33.0 33.125 high 0 1 1 1 33.5 33.625 high 1 0 0 0 38.0 38.0 low 1 0 0 1 38.5 38.375 low 1 0 1 0 39.0 38.875 low 1 0 1 1 39.5 39.875 low 1 1 0 0 46.5 45.75 low 1 1 0 1 59.5 58.75 low 1 1 1 0 46.0 46.25 low 1 1 1 1 59.0 59.25 low
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 27. VIF PLL gating and detector mode 0 0 % gating in positive modulation mode (W2[1]=1) 1 36 % gating in positive modulation mode (W2[1]=1) π mode on; optimized for overmodulation in negative modulation mode;
fPC=0 kHz± 187.5 kHz π mode off; optimized for multipath in negative modulation mode;
fPC=0 kHz± 187.5 kHz
Table 28. W3 - data write register bit allocationRESCAR AMUTE FMUTE FMWIDE0 DEEMT DEEM AGAIN1 AGAIN0
Table 29. W3 - data write register bit description RESCAR video gain correction for residual carrier=20 % residual carrier=10 % residual carrier AMUTE auto mute
1=on=off FMUTE forced mute
1=on=off FMWIDE0 FM window (W6[3]=0)= 475 kHz; normal FM phase detector steepness= 237.5 kHz; high FM phase detector steepness DEEMT de-emphasis time
1=50μs
0=75μs DEEM de-emphasis
1=on=off and0 AGAIN[1:0] audio gain
00=0dB= −6dB= −12 dB (only for FM mode)= −18 dB (only for FM mode)
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 30. W4 - data write register bit allocationVIFLEVEL BP MPP2S1 MPP2S0 AGCSW IFIN1 IFIN0 VIFIN
Table 31. W4 - data write register bit description VIFLEVEL control of internal VIF mixer input level (W1[4]= 1) and
OUT1/OUT2 output level; see Table32= reduced= normal BP SIF/DIF BP= on (bit W6[0]= 0; see Table 40)= bypass
5 and 4 MPP2S[1:0] AGC or AFC output; see Table33 AGCSW VIF AGC switch state; see Table34= VIF AGC hold (for diversity detection)= VIF AGC external and1 IFIN[1:0] DIF/SIF input= IF1A/B input= IF3A/B input= not used= IF2A/B input VIFIN VIF input= IF1A/B input= IF2A/B input
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] Intercarrier output level based on wide-band AGC of SIF amplifier.
[2] SIF output level based on wide-band AGC of SIF amplifier.
[3] Intercarrier output level based on narrow-band AGC of FM amplifier.
Table 32. List of output signals at OUT1 and OUT2 0 0 X X zero IF I zero IF Q 1 0 X X low IF off X 1 X X off direct IF X 1 0 0 intercarrier[1] SIF[2] X 1 0 1 intercarrier[3] SIF[2] X 1 1 0 intercarrier[3] SIF[2] X 1 1 1 intercarrier[1] SIF[2] X 0 0 0 intercarrier[1] off X 0 0 1 intercarrier[3] off X 0 1 0 intercarrier[3] off X 0 1 1 intercarrier[1] off
Table 33. Output mode at pin MPP2 for ATV; dual or radio mode X 0 0 gain control voltage of FM PLL X 0 1 gain control voltage of SIF amplifier X 1 0 TAGC monitor voltage
0011 AFC current output, VIF PLL
0111 AFC current output, radio mode X 0 0 voltage output of weak audio signal detector
Table 34. Control function of bit AGCSW <1V VIFAGC from internal >2V VIFAGC from pin AGCVIN <1V VIFAGC is
not on hold >2V VIFAGC is on hold
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] For bit description of TV1 and TV2 see Table 16 W1[3] and W1[4] and Table17.
Table 35. W5 - data write register bit allocationFSFREQ1 FSFREQ0 SFREQ5 SFREQ4 SFREQ3 SFREQ2 SFREQ1 SFREQ0
Table 36. W5 - data write register bit description[1]7 and 6 FSFREQ[1:0] DTV filter or sound trap selection for video
ATV; sound trap; TV2=1= M/N standard (4.5 MHz)= B/G standard (5.5 MHz)=I standard (6.0 MHz)= D/K and L/L-accent standard (6.5 MHz)
DTV (zero IF); low-pass cut-off frequency; TV2= 0 and TV1=0= 3.0 MHz= 3.5 MHz= 4.0 MHz= not used
DTV (low IF); upper BP cut-off frequency; TV2= 0 and TV1=1= 7.0 MHz= 8.0 MHz= 9.0 MHz= not usedto0 SFREQ[5:0] synthesizer frequencies; seeT able 37 and Table38
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Table 37. DIF/SIF synthesizer frequencies (using bit TWOFLO=0)111111 22.0
111110 22.5
111101 23.0
111100 23.5
111011 24.0
111010 24.5
111001 25.0
111000 25.5
110111 26.0
110110 26.5
110101 27.0
110100 27.5
110011 28.0
110010 28.5
110001 29.0
110000 29.5
101111 30.0
101110 30.5
101101 31.0
101100 31.5
101011 32.0
101010 32.5
101001 33.0
101000 33.5
100111 34.0
100110 34.5
100101 35.0
100100 35.5
100011 36.0
100010 36.5
100001 37.0
100000 37.5
011111 38.0
011110 38.5
011101 39.0
011100 39.5
011011 40.0
011010 40.5
011001 41.0
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile011000 41.5
010111 42.0
010110 42.5
010101 43.0
010100 43.5
010011 44.0
010010 44.5
010001 45.0
010000 45.5
001111 46.0
001110 46.5
001101 47.0
001100 47.5
001011 48.0
001010 48.5
001001 49.0
001000 49.5
000111 50.0
000110 50.5
000101 51.0
000100 51.5
000011 52.0
000010 52.5
000001 53.0
000000 53.5
Table 38. DIF/SIF synthesizer frequency for zero IF Japan (using bit TWOFLO=1)Table 37. DIF/SIF synthesizer frequencies (using bit TWOFLO= 0) …continued
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] In integral TAGC loop mode the pin TAGC provides sink and source currents for control. TakeOver Point
(TOP) is set via register W9 TOPNEG[4:0].
[2] For bit description refer to Table 16 and Table17.
[1] For bit description of MOD refer to Table 24 W2[7] and Table25.
Table 39. W6 - data write register bit allocationTAGC1 TAGC0 AGC2 AGC1 FMWIDE1 TWOFLO AUDIOPRO DIRECT
Table 40. W6 - data write register bit description and6 T AGC[1:0] tuner AGC mode[1]= TAGC integral loop mode; all currents off= TAGC integral loop mode; source current off= TAGC integral loop mode= TAGC derived from IF AGC; recommended for positive
modulated signals and4 AGC[2:1] AGC mode and behavior; see Table41 FMWIDE1 FM window
1=1MHz= see Table 29 bit FMWIDE0 TWOFLO synthesizer frequency selection= zero IF Japan mode (57 MHz)= synthesizer mode AUDIOPRO audio processing (weak signal handling)
1=on= bypass DIRECT direct IF at DTV mode; TV2=0[2]= direct IF output= zero IF or low IF output
direct SIF at ATV or radio mode; TV2= 1 or RADIO=1[2]= buffered SIF output at pins OUT2A and OUT2B= pins OUT2A and OUT2B switched off
Table 41. AGC mode and behavior 0 normal normal 1 off (minimum gain) off (minimum gain) 0 fast normal 1 2nd fast fast
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] Pin OPTXTAL wired as quartz oscillator or used as reference frequency input.
Table 42. W7 - data write register bit allocationFREFOUT WAFP SIFLEVEL VIDLEVEL OPSTATE PORT FILOUTBP NYQOFF
Table 43. W7 - data write register bit description FREFOUT reference frequency output= pin FREF works as reference frequency output[1]= pin FREF works as quartz oscillator or reference frequency input WAFP weak FM AF processing control voltage at pin MPP2; see Table33 SIFLEVEL SIF level reduction= internal SIF level is reduced by 6 dB (only for AM sound)= internal SIF level is normal VIDLEVEL video level reduction= internal video level is reduced by 6dB= internal video level is normal OPSTATE output state; PORT=1= output port is HIGH (external pull-up resistor needed)= output port is LOW PORT port or VIFAGC monitor= pin MPP1 is logic output port; level depends on OPSTATE= pin MPP1 is VIF AGC monitor output; independent on OPST ATE FILOUTBP external filter output signal source; see Figure7= signal for external filter is obtained behind internal BP filter= signal for external filter is obtained behind SIF mixer NYQOFF internal Nyquist processing= internal Nyquist processing off= internal Nyquist processing on
Table 44. W8 - data write register bit allocation 0 0 0 EASY3 EASY2 EASY1 EASY0
Table 45. W8 - data write register bit descriptionto4 - 0= fixed valueto0 EASY[3:0] easy setting; seeT able46
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] Access to register W1to W6 after selection of an easy setting mode would require a transfer of all W1to W6 register data.
Table 46. Easy setting (to be used for fixed bit set-up only)[1] 0 0 0 off - - ------ 0 0 1 - - - ------ 0 1 0 - - - ------ 0 1 1 - - - ------ 1 0 0 - - - ------ 1 0 1 I 6.0 ES2 58 B1 CC 60 80 80 0C 1 1 0 B/G 5.5 ES3 38 B1 4C 60 40 80 0C 1 1 1 direct IF ES4 08 E1 64 62 00 81 08 0 0 0 M Japan 4.5 ES5 18 F1 44 73 00 80 08 0 0 1 LIF 6/36 ES6 28 88 60 61 AD 00 0C 0 1 0 - - - ------ 0 1 1 D/K 6.5 ES8 78 B1 4C 70 C0 80 0C 1 0 0 radio 5.5 ES9 BB B8 40 26 6B 00 04 1 0 1 - - - ------ 1 1 0 L 6.5 ES11 79 33 00 60 C0 C0 0C 1 1 1 - - - ------
Table 47. W9 - data write register bit allocationDAGCSLOPE TAGCIS TAGCTC TOPNEG4 TOPNEG3 TOPNEG2 TOPNEG1 TOPNEG0
Table 48. W9 - data write register bit description DAGCSLOPE AGCDIN input characteristic; see Figure46= high voltage for high gain= low voltage for high gain TAGCIS tuner AGC IF input= inverse to VIF input= aligned to VIF input TAGCTC tuner AGC time constant= 2nd mode= normalto0 TOPNEG[4:0] TOP adjustment for integral loop mode; see Table49
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile[1] See Table 55 for parameter tuner takeover point accuracy (αacc(set)TOP).
[1] See Table 55 for parameter tuner takeover point accuracy (αacc(set)TOP2).
Table 49. Tuner takeover point adjustment bits W9[4:0]11111 98.2 typical
:::::see Figure12
10000 78.7[1]
:::::see Figure12
00000 57.9 typical
Table 50. W10 - data write register bit allocation 0 XPOTPOS TOPPOS4 TOPPOS3 TOPPOS2 TOPPOS1 TOPPOS0
Table 51. W10 - data write register bit description and6 - 0= fixed value XPOTPOS TOP derived from IFAGC via I2 C-bus or potentiometer= TOP adjustment by external potentiometer at pin TOP2= see Table52to0 TOPPOS[4:0] TOP adjustment for TAGC derived from IF AGC; see Table52
Table 52. Tuner takeover point adjustment bits W10[4:0]1111199 typical
:::::see Figure12
1000081[1]
:::::see Figure12
0000061 typical
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
10. Limiting values[1] Class 2 according to JESD22-A114.
[2] Class B according to EIA/JESD22-A115.
11. Thermal characteristics
12. Characteristics
12.1 Analog TV signal processing
Table 53. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). supply voltage - 5.5 V voltage on any other pin all pins except ground 0 VP V
tsc short-circuit time to ground orVP -10 s
Tstg storage temperature −40 +150 °C
Tamb ambient temperature −20 +70 °C
Tcase case temperature TDA9899HL (LQFP48) - 105 °C
TDA9899HN (HVQFN48) - 115 °C
Vesd electrostatic discharge voltage human body model [1]- ±3000 V
machine model [2]- ±300 V
Table 54. Thermal characteristicsRth(j-a) thermal resistance from junction
to ambient
in free air; 2 layer board
TDA9899HL (LQFP48) 67 K/W
TDA9899HN (HVQFN48) 48 K/W
Rth(j-c) thermal resistance from junction
to case
TDA9899HL (LQFP48) 19 K/W
TDA9899HN (HVQFN48) 10 K/W
Table 55. Characteristics =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
Supply; pinVP supply voltage [1] 4.5 5.0 5.5 V supply current - - 190 mA
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobilePower-on reset
VP(POR) power-on reset supply
voltage
for start of reset at
decreasing supply voltage
[2] 2.5 3.0 3.5 V
for end of reset at
increasing supplyvoltage;2 C-bus transmission
enable
[2]- 3.3 4.4 V
VIF amplifier; pins IF1A, IF1B, IF2A and IF2B input voltage - 1.95 - V
Ri(dif) differential input resistance [3] -2 -kΩ
Ci(dif) differential input capacitance [3] -3 -pF
Vi(IF)(RMS) RMS IF input voltage lower limit at−1 dB video
output signal 60 100 μV
upper limitat+1dB video
output signal
150 190 - mV
permissible overload [4]- - 320 mV
ΔGIF IF gain variation difference between
picture and sound carrier;
within AGC range;= 5.5 MHz 0.7 - dB
GVIF(cr) control range VIF gain 60 66 - dB
f−3dB(VIF)l lower VIF cut-off frequency - 15 - MHz
f−3dB(VIF)u upper VIF cut-off frequency - 80 - MHz
FPLL and true synchronous video demodulator[5]VLFVIF voltage on pin LFVIF (DC) 0.9 - 3.6 V
fVCO(max) maximum VCO frequency fVCO =2fPC 120 140 - MHz
fVIF VIF frequency see Table26 ---MHz
ΔfVIF(dah) digital acquisition help VIF
frequency window
related to fVIF
all standards except
M/N ±2.3 - MHz
M/N standard - ±1.8 - MHz
tacq acquisition time BLF(−3dB) =70kHz [6] --30 ms
Vlock(min)(RMS) RMS minimum lock-in
voltage
measured on pins IF1A
and IF1B or IF2A and
IF2B; maximum IF gain;
negative modulation
mode W2[7]= 1 and PLL
set to overmodulation
mode W2[2]= 0 and
W2[1]=0
-30 70 μV
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileTcy(dah) digital acquisition help cycle
time
-64 - μs
tw(dah) digital acquisition help pulse
width - - μs
Ipul(acq)VIF VIF acquisition pulse current sink or source 21 - 33 μA
KO(VIF) VIF VCO steepness ΔfVIF/ ΔVLFVIF - 26 - MHz/V
KD(VIF) VIF phase detector
steepness
ΔIVPLL/ ΔϕVCO(VIF) -23 - μA/rad
Ioffset(VIF) VIF offset current −10 +1 μA
Video output 2 V; pin CVBS[7]Normal mode (sound carrier trap active) and sound carrier on
Vo(video)(p-p) peak-to-peak video output
voltage
positive or negative
modulation; see Figure8
W4[7]= 0; W7[4]=0 1.7 2.0 2.3 V
W4[7]= 1; W7[4]=0 1.7 2.0 2.3 V
W4[7]= 0; W7[4]=1 1.7 2.0 2.3 V
W4[7]= 1; W7[4]=1 - 2.0 - V
ΔVo(CVBS) CVBS output voltage
difference
difference between and B/G standard
W4[7]= 0; W7[4]=0 −240 - +240 mV
W4[7]= 1; W7[4]=0 −240 - +240 mV
W4[7]= 0; W7[4]=1 −240 - +240 mV
Vvideo/Vsync video voltageto sync voltage
ratio
2.0 2.33 2.75
Vsyncl sync level voltage W4[7]= 0; W7[4]=0 1.0 1.2 1.4 V
W4[7]= 1; W7[4]=0 0.9 1.2 1.5 V
W4[7]= 0; W7[4]=1 0.9 1.2 1.5 V
Vclip(video)u upper video clipping voltage VP− 1.2 VP− 1- V
Vclip(video)l lower video clipping voltage - 0.4 0.9 V output resistance [3] --30 Ω
Ibias(int) internal bias current (DC) for emitter-follower 1.5 2.0 - mA
Isink(o)(max) maximum output sink current AC and DC 1 - - mA
Isource(o)(max) maximum output source
current and DC 3.9 - - mA
ΔVo(CVBS) CVBS output voltage
difference dB gain control - - 0.5 dB dB gain control - - 0.1 dB
ΔVblt/VCVBS black level tilt to CVBS
voltage ratio
negative modulation - - 1 %
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileΔVblt(v)/VCVBS vertical black level tilt to
CVBS voltage ratio
worst case in L standard;
vision carrier modulated
by test line [Vertical
Interval Test Signal
(VITS)] only
--3 %
Gdif differential gain “ITU-T J.63 line 330” [8]
B/G standard - - 5 % standard - - 7 %
ϕdif differential phase “ITU-T J.63 line 330” [8]
B/G standard - 2 4 deg standard - 2 4 deg
(S/N)w weighted signal-to-noise ratio B/G standard; 50 % grey
video signal; unified
weighting filter
(“ITU-T J.61”);
see Figure19
[9] 53 57 - dB
(S/N)unw unweighted signal-to-noise
ratio
M/N standard; 50 IRE
grey video signal;
see Figure19 51 - dB
VPC(rsd)(RMS) RMS residual picture carrier
voltage
fundamental wave and
harmonics 25mV
ΔfPC(p-p) peak-to-peak picture carrier
frequency variation % residual carrier;% serration pulses; standard
[3] --12 kHz phase difference 0 % residual carrier;% serration pulses; standard;
L-gating=0%
[3] --3 %
αH(video) video harmonics suppression AC load: CL <20pF, >1kΩ
[10] 35 40 - dB
αsp spurious suppression [11] 40 --dB
PSRRCVBS power supply ripple rejection
on pin CVBS
fripple =70Hz;
video signal; grey level;
positive and negative
modulation; see Figure9 20 - dB
M/N standard inclusive Korea; see Figure20[12]
αripple(resp)f frequency response ripple 0.5 MHzto 2.5 MHz −1 - +1 dB
2.5 MHzto 3.6 MHz −2 - +2 dB
3.6 MHzto 3.8 MHz −3 - +2 dB
3.8 MHzto 4.2 MHz −16 - +2 dB
αSC1 first sound carrier attenuationf= fSC1= 4.5 MHz 38 - - dB
f=fSC1±60 kHz 29 - - dB
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileαSC2 second sound carrier
attenuation
f=fSC2= 4.724 MHz 25 - - dB
f=fSC2±60 kHz 16 - - dB
td(grp)CC color carrier group delay timef= 3.58 MHz; including
transmitter pre-correction;
see Figure21
[13] −75 −50 +75 ns
B/G standard; see Figure22[12]
αripple(resp)f frequency response ripple 0.5 MHzto 3.2 MHz −1 - +1 dB
3.2 MHzto 4.5 MHz −2 - +2 dB
4.5 MHzto 4.8 MHz −4 - +2 dB
4.8 MHzto5 MHz −12 - +2 dB
αSC1 first sound carrier attenuationf= fSC1= 5.5 MHz 35 - - dB
f=fSC1±60 kHz 26 - - dB
αSC2 second sound carrier
attenuation
f=fSC2= 5.742 MHz 25 - - dB
f=fSC2±60 kHz 16 - - dB
αSC(NICAM) NICAM sound carrier
attenuation
fcar(NICAM)= 5.85 MHz;
f=fcar(NICAM)± 250 kHz --dB attenuation f= f(N+1)ch=7 MHz 21 - - dB
f=f(N+1)ch± 750 kHz 5 - - dB
td(grp)CC color carrier group delay timef= 4.43 MHz; including
transmitter pre-correction;
see Figure23
[13] −75 −10 +75 ns standard; see Figure24[12]
αripple(resp)f frequency response ripple 0.5 MHzto 3.2 MHz −1 - +1 dB
3.2 MHzto 4.5 MHz −2 - +2 dB
4.5 MHzto5 MHz −4 - +2 dB MHzto 5.5 MHz −12 - +2 dB
αSC1 first sound carrier attenuationf= fSC1= 6.0 MHz 35 - - dB
f=fSC1±60 kHz 26 - - dB
αSC(NICAM) NICAM sound carrier
attenuation
fcar(NICAM)= 6.55 MHz;
f=fcar(NICAM)± 250 kHz --dB
td(grp)CC color carrier group delay timef= 4.43 MHz;
see Figure25
[13] −75 −15 +75 ns
D/K standard; see Figure26[12]
αripple(resp)f frequency response ripple 0.5 MHzto 3.1 MHz −1 - +1 dB
3.1 MHzto 4.5 MHz −2 - +2 dB
4.5 MHzto 4.8 MHz −4 - +2 dB
4.8 MHzto 5.1 MHz −6 - +2 dB
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileαSC1 first sound carrier attenuationf= fSC1= 6.5 MHz 35 - - dB
f=fSC1±60 kHz 26 - - dB
αSC2(us) second sound carrier
attenuation (upper side)
f=fSC2= 6.742 MHz 25 - - dB
f=fSC2±60 kHz 16 - - dB
αSC2(ls) second sound carrier
attenuation (lower side)
f=fSC2= 6.258 MHz 25 - - dB
f=fSC2±60 kHz 16 - - dB
αSC(NICAM) NICAM sound carrier
attenuation
fcar(NICAM)= 5.85 MHz;
f=fcar(NICAM)± 250 kHz --dB
td(grp)CC color carrier group delay timef= 4.28 MHz; including
transmitter pre-correction;
see Figure27
[13] −50 0 +100 ns standard; see Figure28[12]
αripple(resp)f frequency response ripple 0.5 MHzto 3.2 MHz −1 - +1 dB
3.2 MHzto 4.5 MHz −2 - +2 dB
4.5 MHzto 4.8 MHz −4 - +2 dB
4.8 MHzto 5.3 MHz −12 - +2 dB
αSC(NICAM) NICAM sound carrier
attenuation
fcar(NICAM)= 5.85 MHz;
f=fcar(NICAM)± 250 kHz --dB
αSC(AM) AM sound carrier attenuationf= fSC(AM)= 6.5 MHz 38 - - dB
f=fSC(AM)±30 kHz 29 - - dB
td(grp)CC color carrier group delay timef= 4.28 MHz; including
transmitter pre-correction;
see Figure29
−75 −5 +75 ns
Video output 1.1 V; pin CVBSTrap bypass mode and sound carrier off[12]
Vo(video)(p-p) peak-to-peak video output
voltage
see Figure8 - 1.1 - V
Vsyncl sync level voltage - 1.5 - V
Vclip(video)u upper video clipping voltage VP − 1.1 VP − 1- V
Vclip(video)l lower video clipping voltage - 0.4 0.9 V
Bvideo(−3dB) −3 dB video bandwidth AC load: CL <20pF, >1kΩ
68- MHz
(S/N)w weighted signal-to-noise ratio B/G standard; 50 % grey
video signal; unified
weighting filter
(“ITU-T J.61”);
see Figure19
[9] 54 --dB
(S/N)unw unweighted signal-to-noise
ratio
M/N standard; 50 IRE
grey video signal;
see Figure19
[9] 47 51 - dB
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Loop filter synthesizer; pin LFSYN1VLFSYN1 voltage on pin LFSYN1 1.0 - 3.5 V
Isource(o)PD(max) maximum phase detector
output source current
--65 μA
Isink(o)PD(max) maximum phase detector
output sink current
--65 μA VCO steepness - 3.75 - MHz/V phase detector steepness - 9 - μA/rad
Pin MPP1 operating as VIF AGC voltage monitorVmonitor(VIFAGC) VIFAGC monitor voltage [3] 0.5 - 4.5 V
VAGC AGC voltage see Figure 10; Vi(IF) set to mV (60 dBμV) 2.2 - 2.6 V mV (80 dBμV) 2.5 - 3.1 V
200 mV (106 dBμV) 3- 4V
Io(max) maximum output current sink or source 10 - - μA
tresp response time increasing VIF step;
negative modulation
[14]
normal mode - 4.3 - μs/dB
fast mode - 1.5 - μs/dB
increasing VIF step;
positive modulation;
normal mode
[14]- 130 - μs/dB
decreasing VIF step;
negative modulation
[14]
normal mode - 1.9 - ms/dB
fast normal mode - 0.08 - ms/dB
2nd mode - 0.25 - ms/dB
fast 2nd mode - 0.01 - ms/dB
decreasing VIF step;
positive modulation
[14]dB - 890 - ms
fast mode - 2.6 - ms/dB
normal mode - 143 - ms/dB
αth(fast)VIF VIF fast mode threshold L standard −10 −6 −2dB
ΔVVAGC(step) VIFAGC voltage difference
(step)
see Table11 - 40 - mV/bit
Pin MPP1 operating as open-collector output portVOL LOW-level output voltage I=2 mA (sink) - - 0.4 V
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileIsink(o) output sink current W7[3]=0 - - 3 mA
W7[3]=1 - - 10 μA
VOH HIGH-level output voltage - - VP+ 0.5V
VIFAGC; pin CIFAGCIch(max) maximum charge current L standard 75 100 125 μA
Ich(add) additional charge current L standard:inthe eventof
missing VITS pulses and
no white video content 100 - nA
Idch discharge current L standard; normal mode - 35 - nA standard; fast mode - 1.8 - μA
VIFAGC control; pin AGCVINIsink(i)(max) maximum input sink current [3] --1 μA
Isource(i)(max) maximum input source
current
[3] --1 μA
Vi(max) maximum input voltage [3] --VP V
VAGCVIN voltage on pin AGCVIN [3]1 - 3.5 V
ΔGVIF/ΔVAGCVIN change of VIF gain with
voltage on pin AGCVIN
VAGCVIN= 2.8V - −75 - dB/V
Tuner AGC; pin TAGCIntegral TAGC loop mode (W6[7:6]= 10); TAGCis current output; applicablefor negative modulation only; unmodulated VIF;
see Table 48 and Figure12
Vi(IF)(RMS) RMS IF input voltage at starting point of tuner
AGC takeover;
Isink(TAGC)= 100μA
W9[4:0]=0 0000 - 57.9 - dBμV
W9[4:0]=1 0000 - 78.7 - dBμV
W9[4:0]=1 1111 - 98.2 - dBμV
αacc(set)TOP TOP setting accuracy −2 - +2 dB
Isource source current TAGC charge current
normal mode 0.20 0.27 0.34 μA
fast mode activated by
internal level detector
710 13 μA
Isink sink current TAGC discharge current;
VTAGC =1V
400 500 600 μA
Δαacc(set)TOP/ΔT TOP setting accuracy
variation with temperature
W9[4:0]=1 0000 - - 0.02 dB/K load resistance [3] 50 --MΩ
Vsat(u) upper saturation voltage pin operating as current
output− 0.3- - V
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileVsat(l) lower saturation voltage pin operating as current
output - 0.3 V
αth(fast)AGC AGC fast mode threshold activated by internal fast
AGC detector; I2 C-bus
setting corresponds to
W9[4:0]=1 0000
[3] 6810 dB delay time before activating; Vi(IF)
below αth(fast)AGC 60 80 ms
TAGC loop based on VIF AGC (W6[7:6]= 11); TAGC is voltage output; applicable for TV mode: positive modulation and
optional for negative modulation); see Table 51; Figure 12 and Figure13
Vi(IF)(RMS) RMS IF input voltage at starting point of tuner
AGC takeover;
VTAGC= 3.5V
RTOP2 =22kΩ or
W10[5:0]=00 0000
-61 - dBμV
RTOP2 =10kΩ or
W10[5:0]=01 0000
-81 - dBμV
RTOP2 =0kΩ -96 - dBμV
W10[5:0]=01 1111 - 99 - dBμV
αacc(set)TOP2 TOP2 setting accuracy −6 - +6 dB
Δαacc(set)TOP2/ΔT TOP2 setting accuracy
variation with temperature
VTAGC= 3.5V - 0.03 0.07 dB/K output voltage no tuner gain reduction 4.5 - VP V
maximum tuner gain
reduction
0.2 - 0.6 V
ΔGslip(TAGC) TAGC slip gain offset tuner gain voltage from
0.6Vto 3.5V
358dB
TOP adjust 2; pin TOP2; IF based TAGC loop mode; see Figure13VTOP2 voltage on pin TOP2 (DC) pin open-circuit - 3.5 - V input resistance - 27 - kΩ
RTOP2 resistance on pin TOP2 adjustment of VIF AGC
based TAGC loop
W10[5]= 1; external
resistor operation - 22 kΩ
W10[5]= 0; forced2 C-bus operation
100 - - kΩ
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
AGC switch; pin AGCSWIVAGCSWI voltage on pin AGCSWI (DC) pin open-circuit - 0 - V
LOW-level input voltage;
see Table34
--1 V
HIGH-level input voltage;
see Table34 --V input resistance - 50 - kΩ
Pin CTAGCVCTAGC voltage on pin CTAGC [3] 0.2 - 0.55VP V leakage current sink [3] --10 nA
source [3] --10 nA
Control current or voltage monitor output; pin MPP2General
Vsat(u) upper saturation voltage VP− 0.8 VP− 0.5- V
Vsat(l) lower saturation voltage - 0.5 0.8 V
AFC (current output) output current sink or source;
see Figure 16 and
Figure17
[15][16]
100 kHz VIF deviation 80 - 160 μA
200 kHz VIF deviation 160 200 240 μA
1.5 MHz VIF deviation 160 - 240 μA
AFC TV mode
ΔIAFC/ΔfVIF change of AFC current with
VIF frequency
[16] 0.85 1.05 1.25 μA/kHz
fVIFacc(dig) digital accuracy of VIF
frequency
read-out via I2 C-bus;
R1[4:1]= f0; fref=4 MHz
[17] −20 - +20 kHz
fVIFacc(a) analog accuracy of VIF
frequency
IAFC=0 A; fref=4 MHz [17] −20 - +20 kHz
AFC radio mode
ΔIAFC/ΔfRIF change of AFC current with
RIF frequency
[16] 0.85 1.05 1.25 μA/kHz
fRIFacc(dig) digital accuracy of RIF
frequency
read-out via I2 C-bus;
R1[4:1]= f0; fref=4 MHz
[17] −10 - +10 kHz
fRIFacc(a) analog accuracy of RIF
frequency
IAFC=0 A; fref=4 MHz [17] −10 - +10 kHz
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileAGC or WAFP monitor (voltage output) voltage gain voltage on pin MPP2 to
internal control voltage;
see Table33 -dB
SIFAGC - 6 - dB AGC - 6 - dB
WAFP -6 -dB
TAGC -0 -dB
Io(max) maximum output current sink or source 350 - - μA
SIF amplifier; pins IF3A and IF3B or pins IF1A and IF1B or pins IF2A and IF2B input voltage - 1.95 - V
Ri(dif) differential input resistance - 2 - kΩ
Ci(dif) differential input capacitance - 3 - pF
Vi(SIF)(RMS) RMS SIF input voltage FM mode;−3 dB at
intercarrier output
pins OUT1A and OUT1B;
without FM AGC;
see Table22 60 100 μV mode;−3 dB at output pin AUD
-40 70 μV mode; +1 dB at
intercarrier output
pins OUT1A and OUT1B;
without FM AGC;
see Table22
150 190 - mV mode; +1 dB at output pin AUD 140 - mV
permissible overload - - 320 mV
GSIF(cr) control range SIF gain FM and AM mode 60 66 - dB
f−3dB(SIF)l lower SIF cut-off frequency - 7 - MHz
f−3dB(SIF)u upper SIF cut-off frequency - 80 - MHz
Buffered SIF; pins OUT2A and OUT2BVo(dif)(p-p) peak-to-peak differential
output voltage
W6[0]= 1; W4[7]=0;
fSIF≤45 MHz
W2[7]=1 - 1.0 - V
W2[7]= 0; AM=0% - 0.5 - V
W6[0]= 1; W4[7]=1;
fSIF≤60 MHz
W2[7]=1 - 0.5 - V
W2[7]= 0; AM=0% - 0.25 - V
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileRL(max) maximum load resistance single-ended to GND 1 - - kΩ
CL(max) maximum load capacitance single-ended to GND - - 5 pF
SIF AGC detector; pin MPP2; see Figure15tresp response time increasing or decreasing
SIF step of 20 dB; mode; fast AGC
increasing - 8 - ms
decreasing - 25 - ms
increasing or decreasing
SIF step of 20 dB; mode; slow AGC
increasing - 80 - ms
decreasing - 250 - ms
increasing or decreasing
SIF step of 20 dB; mode; normal AGC
increasing - 0.3 - ms
decreasing - 20 - ms
increasing or decreasing
SIF step of 20 dB; mode; fast AGC
increasing - 0.1 - ms
decreasing - 4 - ms
VAGC(SIF) SIF AGC voltage FM mode
VSIF= 100μV 1.5 - 2.4 V
VSIF=10 mV 2.6 - 3.4 V
VSIF= 140 mV 3.3 - VP V mode
VSIF= 100μV 1.5 - 2.4 V
VSIF=10 mV 2.9 - 3.9 V
VSIF= 140 mV 3.3 - VP V
Conversion synthesizer PLL; pin LFSYN2 (TSS mode)VLFSYN2 voltage on pin LFSYN2 1 - 3 V VCO steepness ΔfVCO/ ΔVLFSYN2 - 31 - MHz/V
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile phase detector steepness ΔILFSYN2/ ΔϕVCO;
see Table 59;
fVCO selection: MHz to 29.5 MHz - 32 - μA/rad MHz to 37.5 MHz - 38 - μA/rad MHz to 45.5 MHz - 47 - μA/rad MHz to 53.5 MHz - 61 - μA/rad MHz - 61 - μA/rad
Io(PD) phase detector output current sink or source;
fVCO selection: MHz to 29.5 MHz - 200 - μA MHz to 37.5 MHz - 238 - μA MHz to 45.5 MHz - 294 - μA MHz to 53.5 MHz - 384 - μA MHz - 384 - μA
ϕn(synth) synthesizer phase noise with 4 MHz crystal
oscillator reference;
fsynth=31 MHz;
fIF =36MHz
at 1 kHz [3] 89 99 - dBc/Hz
at 10 kHz [3] 89 99 - dBc/Hz
at 100 kHz [3] 98 102 - dBc/Hz
at 1.4 MHz [3] 115 119 - dBc/Hz
αsp spurious suppression multiple ofΔf= 500 kHz [3] 50 - - dBc leakage current synthesizer spurious
performance >50 dBc
[3] --10 nA
PSRR power supply ripple rejection residual spurious at
nominal differential output
voltage dependent on
power supply ripple at Hz; see Figure9
-50 - dB
Single reference QSS/TSS intercarrier mixer; pins OUT1A and OUT1BVOUT1A voltage on pin OUT1A (DC) 1.8 2.0 2.2 V
VOUT1B voltage on pin OUT1B (DC) 1.8 2.0 2.2 V
Ibias(int) internal bias current (DC) for emitter-follower 2.0 2.5 - mA
Isink(o)(max) maximum output sink current DC and AC 1.4 1.7 - mA
Isource(o)(max) maximum output source
current
DC and AC; with external
resistor to GND
3.0 - - mA
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile output resistance output active;
single-ended to GND
--25 Ω
output inactive; internal
resistance to GND 800 - Ω
Vo(RMS) RMS output voltage IF intercarrier
single-ended to GND;
SC1 on; SC2off 140 180 mV intercarrier
single-ended to GND; standard;
without modulation;on
W7[5]=0 45 70 90 mV
W7[5]=1 20 35 45 mV
f−3dB(ic)u upper intercarrier cut-off
frequency
internal sound band-pass
off 15 - MHz
αimage image rejection band-pass off; MHzto0 MHz 28 - dB
Vinterf(RMS) RMS interference voltage fundamental wave and
harmonics 25mV
AM intercarrier from pin EXTFILI to pins OUT1A and OUT1B gain IF intercarrier;L standard;
without modulation -dB
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobile
Band-pass mode center frequency QSS mode; selectionfor standard
M/N - 4.7 - MHz
B/G - 5.75 - MHz - 6.25 - MHz
D/K - 6.25 - MHz
L/L-accent - 6.05 - MHz
TSS mode; BP selection
recommended for
standard
M/N, B/G or I - 5.1 - MHz
D/K - 5.75 - MHz
L/L-accent - 6.95 - MHz
radio mode; selectionfor standard
M/N - 4.7 - MHz
B/G - 5.75 - MHz - 6.25 - MHz
D/K - 6.78 - MHz
RADIO - 10.7 - MHz
f−3dB(BP)u upper BP cut-off frequency M/N, B/G, I, D/K or
L/L-accent standard+ 0.5 fc+ 0.65fc+ 0.8 MHz
RADIO 10.7 fc+ 0.25fc+ 0.4 fc+ 0.55 MHz
f−3dB(BP)l lower BP cut-off frequency M/N, B/G, I, D/K or
L/L-accent standard− 0.5 fc− 0.65fc− 0.8 MHz
RADIO 10.7 fc− 0.25fc− 0.4 fc− 0.55 MHz
αstpb stop-band attenuation at fc± 1.5 MHz
M/N, B/G, I, D/K or
L/L-accent standard 30 - dB
RADIO 10.7 15 25 - dB
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobileαCC color carrier attenuation QSS mode; selectionfor standard
M/N; fCC= 3.58 MHz 15 23 - dB
B/G; fCC= 4.43 MHz 22 30 - dB
I; fCC= 4.43 MHz 20 28 - dB
D/K; fCC= 4.28 MHz 20 28 - dB
L/L-accent;
fCC= 4.28 MHz 28 - dB
TSS mode; selectionfor standard
M/N; fCC= 5.42 MHz 15 23 - dB
B/G; fCC= 6.57 MHz 22 30 - dB
I; fCC= 7.57 MHz 20 25 - dB
L/L-accent;
fCC= 8.72 MHz 28 - dB
External filter output; pin EXTFILOVEXTFILO voltageonpin EXTFILO (DC) 1.8 2.0 2.2 V
VEXTFILO(p-p) peak-to-peak voltage on
pin EXTFILO intercarrier; SC1 on;
SC2off
420 620 820 mV intercarrier;L standard;
without modulation
W7[5]=0 210 310 410 mV
W7[5]=1 105 155 205 mV
Io(max) maximum output current AC and DC 1 - - mA
PLL demodulatorfFMPLL FM PLL frequency see Table 18 and
Table21 4.5 - MHz 5.5 - MHz 6.0 - MHz 6.5 - MHz 10.7 - MHz PLL filter; pin LFFM
VLFFM voltage on pin LFFM fFMPLL= 4.5 MHz 1.5 1.9 3.3 V
fFMPLL= 5.5 MHz 1.5 2.2 3.3 V
fFMPLL= 6.0 MHz 1.5 2.35 3.3 V
fFMPLL= 6.5 MHz 1.5 2.5 3.3 V
fFMPLL= 10.7 MHz 1.5 2.4 3.3 V
Tcy(dah) digital acquisition help cycle
time
-64 - μs
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
NXP Semiconductors TDA9899
Multistandard hybrid IF processing including car mobiletw(dah) digital acquisition help pulse
width
-16 - μs
Io(dah) digital acquisition help output
current
sink or source
W3[4]= 0; W6[3]=0;
FM window
width= 237.5 kHz 18 22 μA
W3[4]= 1; W6[3]=0;
FM window
width= 475 kHz 36 44 μA
W3[4]= 0; W6[3]=1;
FM window
width=1 MHz 18 22 μA
W3[4]= 1; W6[3]=1;
FM window
width=1 MHz 36 44 μA
KD(FM) FM phase detector
steepness
ΔIFMPLL/ ΔϕVCO(FM)
W3[4]= 0; W6[3]=0;
FM window
width= 237.5 kHz - μA/rad
W3[4]= 1; W6[3]=0;
FM window
width= 475 kHz
-10 - μA/rad
W3[4]= 0; W6[3]=1;
FM window
width=1 MHz - μA/rad
W3[4]= 1; W6[3]=1;
FM window
width=1 MHz
-10 - μA/rad
KO(FM) FM VCO steepness ΔfFMPLL/ ΔVLFFM<10 MHz - 3.3 - MHz/V= 10.7 MHz - 5.9 - MHz/V
Ioffset(FM) FM offset current W6[3]= 0; W3[4]=0 −1.5 0 +1.5 μA
W6[3]= 0; W3[4]=1 −2.5 0 +2.5 μA
FM intercarrier input; pins EXTFMI and EXTFILI; see Figure14
|Zi| input impedance AC-coupled via 4pF - 20 - kΩ
Vi(FM)(RMS) RMS FM input voltage gain controlled operation;
W1[1:0]= 10 or
W1[1:0]= 11 or
W1[1:0]=01 - 300 mV
Vlock(min)(RMS) RMS minimum lock-in
voltage
W1[1:0]= 10 or
W1[1:0]= 11 or
W1[1:0]=01 - 1.5 mV
Table 55. Characteristics …continued =5V; Tamb =25 °C; seeT able 26 for input frequencies; B/G standard is used for the specification (fPC= 38.375 MHz;
fSC= 32.875 MHz; PC/ SC=13 dB; fAF= 400 Hz); input level Vi(IF)=10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1: 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for Lis3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0]= 0); not dual mode; measurements taken in test circuit of Figure 49; unless
otherwise specified.
