TDA8933BTW Fast Delivery |IC PHOENIX CO.,LIMITED

TDA8933BTW ,Class D Audio AmplifierGeneral descriptionThe TDA8933B is a high-efﬁciency class D ampliﬁer with low power dissipation.The ..
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TDA8933BTW
Class D Audio Amplifier
General descriptionThe TDA8933B is a high-efﬁciency class D ampliﬁer with low power dissipation.
The continuous time output power is 2×10 W in a stereo half-bridge application
(RL =8 Ω)or1×20Wina mono full-bridge application (RL =16 Ω). Dueto the low power
dissipation the device can be used without any external heat sink when playing music.
Due to the implementation of Thermal Foldback (TF) the device remains operating with
considerable music output power without the needforan external heat sink, evenfor high
supply voltages and/or lower load impedances.
The device has two full differential inputs driving two independent outputs. It can be used
in a mono full-bridge conﬁguration (Bridge-Tied Load (BTL)) or as stereo half-bridge
conﬁguration (Single-Ended (SE)). Features Operating voltage from 10 V to 36 V asymmetrical or ±5 V to ±18 V symmetrical Mono bridge-tied load (full-bridge) or stereo single-ended (half-bridge) application Application without heat sink using thermally enhanced small outline package High efﬁciency and low-power dissipation Thermal foldback to avoid audio holes Current limiting to avoid audio holes Full short circuit proof across load and to supply lines (using advanced current
protection) Internal or external oscillator (master-slave setting) that can be switched No pop noise Full differential inputs Applications Flat-panel television sets Flat-panel monitor sets Multimedia systems Wireless speakers Mini/micro systems Home sound sets
TDA8933B
Class D audio ampliﬁer
Rev. 01 — 23 October 2008 Preliminary data sheet
NXP Semiconductors TDA8933B
Class D audio ampliﬁer Quick reference data
[1] Rs is the total series resistance of an inductor and an ESR single-ended capacitor in the application.
[2] Output power is measured indirectly, based on RDSon measurement. Ordering information
Table 1. Quick reference data
General; Vp = 25 V, fosc = 320 kHz, Tamb = 25 °C unless speciﬁed otherwise supply voltage asymmetrical supply 10 25 36 V supply current Sleep mode - 0.6 1.0 mA
Iq(tot) total quiescent
current
Operating mode; no load; no
snubbers or ﬁlter connected 4050mA
Stereo SE channel; Rs < 0.1Ω[1]
Po(RMS) RMS output power continuous time output power per channel[2] =4 Ω; VP =17V
THD+N = 10 %, fi=1 kHz 7.5 8.5 - W =8 Ω; VP =25V
THD+N = 10 %, fi=1 kHz 9.3 10.3 - W
Mono BTL channel; Rs< 0.1Ω[1]
Po(RMS) RMS output power continuous time output power[2] =8 Ω; VP =17V
THD+N = 10 %, fi=1 kHz 15.4 17.1 - W =16 Ω; VP =25V
THD+N = 10 %, fi=1 kHz 18.9 20.6 - W
Table 2. Ordering information
TDA8933BTW HTSSOP32 plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposeddie pad
SOT549-1
NXP Semiconductors TDA8933B
Class D audio ampliﬁer Block diagram
NXP Semiconductors TDA8933B
Class D audio ampliﬁer Pinning information
7.1 Pinning
7.2 Pin description
Table 3. Pinning description
VSSD(HW) 1 negative digital supply voltage and handle wafer connection
IN1P 2 positive audio input for channel 1
IN1N 3 negative audio input for channel 1
DIAG 4 diagnostic output; open-drain
ENGAGE 5 engage input to switch between Mute mode and Operating mode
POWERUP 6 power-up input to switch between Sleep mode and Mute mode
CGND 7 control ground; reference for POWERUP , ENGAGE and DIAG
VDDA 8 positive analog supply voltage
VSSA 9 negative analog supply voltage
OSCREF 10 input internal oscillator setting (only master setting)
HVPREF 11 decoupling of internal half supply voltage reference
INREF 12 decoupling for input reference voltage
TEST 13 test signal input; for testing purpose only
IN2N 14 negative audio input for channel 2
IN2P 15 positive audio input for channel 2
VSSD(HW) 16 negative digital supply voltage and handle wafer connection
VSSD(HW) 17 negative digital supply voltage and handle wafer connection
DREF 18 decoupling of internal (reference) 5 V regulator for logic supply
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
[1] The exposed die pad has to be connected to VSSD(HW). Functional description
8.1 General
The TDA8933B is a mono full-bridge or stereo half-bridge audio power ampliﬁer using
class D technology. The audio input signal is converted into a PWM signal via an analog
input stage and a PWM modulator. To enable the output power Diffusion Metal Oxide
Semiconductor (DMOS) transistors to be driven, this digital PWM signal is applied to a
control and handshake block and driver circuits for both the high side and low side. And -order low-pass ﬁlter in the application converts the PWM signal to an analog audio
signal across the loudspeakers.
The TDA8933B contains two independent half bridges with full differential input stages.
The loudspeakers can be connected in the following conﬁgurations: Mono full-bridge: Bridge-Tied Load (BTL) Stereo half-bridge: Single-Ended (SE)
The TDA8933B contains circuits common to both channels such as the oscillator, all
reference sources, the mode functionality and a digital timing manager. The following
protections are built-in: thermal foldback and overtemperature, current and voltage
protections.
HVP2 19 half supply output voltage 2 for charging single-ended capacitor for
channel 2
VDDP2 20 positive power supply voltage for channel 2
BOOT2 21 bootstrap high-side driver channel 2
OUT2 22 Pulse Width Modulated (PWM) output channel 2
VSSP2 23 negative power supply voltage for channel 2
STAB2 24 decoupling of internal 11 V regulator for channel 2 drivers
STAB1 25 decoupling of internal 11 V regulator for channel 1 drivers
VSSP1 26 negative power supply voltage for channel 1
OUT1 27 PWM output channel 1
BOOT1 28 bootstrap high-side driver for channel 1
VDDP1 29 positive power supply voltage for channel 1
HVP1 30 half supply output voltage 1 for charging single-ended capacitor for
channel 1
OSCIO 31 oscillator input in slave conﬁguration or oscillator output in master
conﬁguration
VSSD(HW) 32 negative digital supply voltage and handle wafer connection
Exposed die
pad[1] -
Table 3. Pinning description …continued
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
8.2 Mode selection and interfacing
The TDA8933B can be switched to one of four operating modes using pins POWERUP
and ENGAGE: Sleep mode: with low supply current. Mute mode: the ampliﬁers are switchingto idle (50% duty cycle), but the audio signal the outputis suppressedby disabling the Vl-converter input stages. The capacitors pins HVP1 and HVP2 have been chargedto half the supply voltage (asymmetrical
supply only) Operating mode: the ampliﬁers are fully operational with an output signal Fault mode
Both pins POWERUP and ENGAGE refer to pin CGND.
Table 4 shows the different modes as a function of the voltages on the POWERUP and
ENGAGE pins.
[1] When thereare symmetrical supply conditions,the voltage appliedto pins POWERUP and ENGAGE must
never exceed the supply voltage (VDDA, VDDP1 or VDDP2). the transition between Mute mode and Operating modeis controlled viaa time constant,
the start-up will be pop-free since the DC output offset voltage is applied gradually to the
output. The bias current setting of the V/I-converters is related to the voltage on pin
ENGAGE. Mute mode: the bias current setting of the V/I-converters is zero (V/I-converters
disabled). Operating mode: the bias current is at maximum.
The time constant required to apply the DC output offset voltage gradually between Mute
mode and Operating mode can be generated by applying a capacitor on pin ENGAGE.
The value of the capacitor on pin ENGAGE should be 470 nF.
Table 4. Mode selection for the TDA8933B
Sleep < 0.8 V < 0.8 V undeﬁned
Mute 2 V to 6 V < 0.8 V > 2 V
Operating 2 V to 6 V 2.4 V to 6 V > 2 V
Fault 2 V to 6 V undeﬁned < 0.8 V
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
8.3 Pulse Width Modulation (PWM) frequency
The output signal of the ampliﬁer is a PWM signal with a carrier frequency of
approximately 320 kHz. Using a 2nd -order low-pass ﬁlter in the application results in an
analog audio signal across the loudspeaker. The PWM switching frequency canbe setby
an external resistor Rosc connected between pin OSCREF and VSSD(HW). The carrier
frequency canbe set between 300 kHz and 500 kHz. Usingan external resistorof39 kΩ,
the carrier frequency is set to a typical value of 320 kHz (see Figure4).
If two or more TDA8933B devices are used in the same audio application, it is
recommendedto synchronize the switching frequencyofall devices. See Section 14.6for
more information.
The valueof the resistor also sets the frequencyof the carrier and canbe calculated with
Equation1:
(1)
Where:
fosc = oscillator frequency (Hz)osc 12.45x109osc-------------------------=
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
Rosc = oscillator resistor (Ω) (on pin OSCREF)
Table 5 summarizes how to conﬁgure the TDA8933B in master or slave conﬁguration.
For device synchronization see Section 14.6.
8.4 Protections
The following protections are implemented in the TDA8933B: Thermal Foldback (TF) OverTemperature Protection (OTP) OverCurrent Protection (OCP) Window Protection (WP) Supply voltage protections UnderVoltage Protection (UVP) OverVoltage Protection (OVP) UnBalance Protection (UBP) Electro Static Discharge (ESD)
The behavior of the device under the different fault conditions differs according to the
protection activated and is described in the following sections.
8.4.1 Thermal Foldback (FT) the junction temperatureof the TDA8933B exceeds the threshold level(Tj> 140 °C), the
gain of the ampliﬁer is decreased gradually to a level where the combination of
dissipation (P) and the thermal resistance from junction to ambient (Rth(j-a)) results in a
junction temperature of around the threshold level.
Table 5. Master or slave conﬁguration
Master Rosc > 25 kΩ to VSSD(HW) output
Slave Rosc = 0 Ω; shorted to VSSD(HW) input
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
This means that the device will not switchoff completely, but remains operationalat lower
output power levels. With music output signals, this feature enables high peak output
powers while still operating without any external heat sink other than the copper area on
the Printed-Circuit Board (PCB).
If the junction temperature still increases due to external causes the OTP shuts down the
ampliﬁer completely.
8.4.2 OverTemperature Protection (OTP)
If the junction temperature Tj > 155 °C the power stage will shut down immediately.
8.4.3 OverCurrent Protection (OCP)
The OCP can distinguish between an impedance drop of the loudspeaker and a
low-ohmic short circuit.
If an impedance drop causes the output current to exceed 2 A, e.g. due to dynamic
behavior of the loudspeaker, the ampliﬁer will start limiting the current above 2 A.
Therefore the current limiting feature will avoid audio interruption (audio holes) due to a
loudspeaker impedance drop.a fault condition causes the output currentto exceed2A, likea short circuit between the
loudspeaker terminalsor from the loudspeaker terminalto the supply linesor ground, the
ampliﬁer is switched off and a timer of 100 ms is started. The DIAG is set low for the ﬁrst ms of the timer. The timer will keep the power stage disabled for at least 100 ms.
Every 100 ms the ampliﬁer will try to restart as long as the short circuit between the
loudspeaker terminals remains. The average power dissipation in the TDA8933B will be
low because the short circuit current will ﬂow only during a very short time every 100 ms.
If a short circuit occurs between a loudspeaker terminal and the supply lines or ground,
the activated WP will keep the power stage disabled (no restart every 100 ms). Restart
will take place after removing this short.
8.4.4 Window Protection (WP)
The window protection protects the ampliﬁer against the following fault conditions: During the start-up sequence, when pin POWERUP is switched from Sleep mode to
Mute mode. In the event of a short circuit at one of the output terminals to VDDP1,
VSSP1, VDDP2 or VSSP2 the start-up procedure is interrupted and the TDA8933B waits
for open circuit outputs. Because the checkis done before enabling the power stages
no large currents will ﬂow in the event of a short circuit. When the ampliﬁer is shut down completely due to activation of the OCP or because
of a short circuit to one of the supply lines, then during restart (i.e. after 100 ms) the
window protection will be activated. As a result the ampliﬁer will not start up until the
short circuit to the supply lines has been removed.
8.4.5 Supply voltage protection
If the supply voltage drops below 10 V the UnderVoltage Protection (UVP) circuit is
activated and the system will shut down directly. This switch-off will be silent and without
pop noise. When the supply voltage rises above the threshold level the power stage is
restarted after 100 ms.
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
If the supply voltage exceeds 36 V the OVP circuit is activated and the power stages will
shut down. It is enabled again as soon as the supply voltage drops below the threshold
level. The power stage is restarted after 100 ms.
Supply voltages > 40 V may damage the TDA8933B. T wo conditions should be
distinguished here: If the supply voltage is pumped to higher values by the TDA8933B application itself
(see also Section 14.8), the OVP is triggered and the TDA8933B is shut down. The
supply voltage will decrease and the TDA8933B is thus protected against any
overstress.Ifa supply voltage>40Vis causedby otherorby external causes the TDA8933B will
shut down, but the device can still be damaged since the supply voltage in this case
will remain > 40 V. The OVP protection is not a supply clamp.
An additional UnBalance Protection (UBP) circuit compares the positive analog supply
voltage VDDA with the negative analog supply voltage VSSA and is triggered if the
difference between them exceeds a certain level. This level depends on the sum of both
supply voltages. The UBP threshold levels can be deﬁned as follows: LOW-level threshold: VP(th)(ubp)l < 8/5 × VHVPREF HIGH-level threshold: VP(th)(ubp)h > 8/3 × VHVPREFa symmetrical supply the UBPis released when the unbalanceof the supply voltageis
within 6 % of its starting value.
Table 6 shows an overview of all protections and their effect on the output signal.
Table 6. Overview of protections for the TDA8933B
OTP no yes
OCP yes no yes no
UVP no yes
OVP no yes
UBP no yes
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
8.5 Diagnostic input and output
Except for TF, whenever one of the protections is triggered pin DIAG is activated to LOW
level (see Table 6). An internal current source will pull up the open-drain DIAG output to
approximately 2.5 V . This current source can deliver approximately 50 μA. The DIAG pin
refersto pin CGND. The diagnostic output signal during different short circuit conditionsis
illustrated in Figure 5. Using pin DIAG as input, a voltage < 0.8 V will put the device into
Fault mode.
8.6 Differential inputs
For a high common-mode rejection ratio and for maximum ﬂexibility in the application the
audio inputs are fully differential.By connecting the inputs anti-parallel the phaseof oneof
the two channels can be inverted so that the ampliﬁer can then operate as a mono BTL
ampliﬁer. The input conﬁguration for a mono BTL application is illustrated in Figure6.
In the SE conﬁguration it is also recommended to connect the two differential inputs in
anti-phase. This has advantagesfor the current handlingof the power supplyat low signal
frequencies and minimizes supply pumping (see also Section 14.8).
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
8.7 Output voltage buffers
When pin POWERUP is set HIGH the half-supply output voltage buffers are switched on
in asymmetrical conﬁguration. The start-up will then be pop-free because the device
starts switching when the capacitoron pin HVPREF and the SE capacitors are completely
charged.
Output voltage buffer pins: Pins HVP1 and HVP2: The time requiredfor charging the SE capacitor dependsonits
value. The half-supply voltage output is disabled when the TDA8933B is used in a
symmetrical supply application. Pin HVPREF: This output voltage reference buffer charges the capacitor on pin
HVPREF. Pin INREF: This output voltage reference buffer charges the input reference capacitor
on pin INREF , which applies the bias voltage for the inputs. Internal circuitry
Table 7. Internal circuitry
1VSSD(HW) IN1P IN1N INREF IN2N IN2P
001aad784
1, 16,
17, 32
VSSA
VDDA
001aad785
2, 15
3, 14
HVPREF
VSSA
NXP Semiconductors TDA8933B
Class D audio ampliﬁer DIAG ENGAGE POWERUP CGND
Table 7. Internal circuitry
001aaf607 20 %A
2.5 V
VSSA
VDDA
CGND
001aaf608
2 kΩ
Iref = 50 μA
2.8 V
VSSA
VDDA
CGND
001aad788
VSSA
VDDA
CGND
001aad789
VSSA
VDDA
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
8VDDA
9VSSA OSCREF HVPREF TEST
Table 7. Internal circuitry
001aad790
VSSD
VSSA
001aad791
VSSD
VDDA
001aad792
VSSA
VDDA
Iref
001aaf604
VSSA
VDDA
001aad795
VSSA
VDDA
NXP Semiconductors TDA8933B
Class D audio ampliﬁer DREF HVP2 HVP1 VDDP2 VSSP2 VSSP1 VDDP1 BOOT2 BOOT1 OUT2 OUT1
Table 7. Internal circuitry
001aag025
VSSD
VDD
001aag026
19, 30
VSSA
VDDA
001aad798
20, 29
23, 26
001aad799
21, 28
OUT1, OUT2
001aag027
22, 27
VSSP1,
VSSP2
VDDP1,
VDDP2
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
10. Limiting values
[1] VP = VDDP1 − VSSP1 = VDDP2 − VSSP2
[2] Measured with respect to pin INREF; Vx < VDD + 0.3V.
[3] Measured with respect to pin VSSD(HW); Vx < VDD + 0.3V.
[4] Measured with respect to pin CGND; Vx < VDD + 0.3V.
[5] VSS = VSSP1 = VSSP2; VDD = VDDP1 = VDDP2.
[6] Current limiting concept.
[7] Human Body Model (HBM); Rs = 1500 Ω; C= 100 pF. For pins 2, 3, 11, 14 and 15 Vesd = 1800V. STAB2 STAB1 OSCIO
Table 7. Internal circuitry
001aag028
24, 25
VSSP1,
VSSP2
VDDA
001aag029
VSSD
DREF
Table 8. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). supply voltage asymmetrical
supply[1]
−0.3 +40.1 V voltage on pin x
IN1P , IN1N, IN2P , IN2N [2] −5+5 V
OSCREF, OSCIO, TEST [3] VSSD(HW) − 0.3 5 V
POWERUP , ENGAGE,
DIAG
[4] VCGND − 0.3 6 V
all other pins [5] VSS − 0.3 VDD + 0.3V
IORM repetitive peak output
current
maximum output
current limiting
[6] 2- A junction temperature - 150 °C
Tstg storage temperature −55 +150 °C
Tamb ambient temperature −40 +85 °C power dissipation - 5 W
Vesd electrostatic discharge
voltage
human body
model
[7] −2000 +2000 V
machine model [8] −200 +200 V
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
[8] Machine Model (MM); Rs = 0 Ω; C = 200 pF; L = 0.75 μH.
11. Thermal characteristics
[1] Measured on a JEDEC high K-factor test board (standard EIA/JESO 51-7) in free air with natural convection.
[2] Measured on a two-layer application board (55 mm × 40 mm), 35 μm copper, FR4 base material in free air with natural convection.
[3] Measured on a three-layer application board (70 mm × 50 mm), 35 μm copper, FR4 base material in free air with natural convection.
[4] Strongly dependent on where the measurement is taken on the package.
12. Static characteristics
Table 9. Thermal characteristics
Rth(j-a) thermal resistance from
junction to ambient
free air natural convection
JEDEC test board [1]- 47 50 K/W
Two-layer application board [2]- 48 - K/W
Three-layer application
board
[3]- 30 - K/W
Ψj-lead thermal characterization
parameter from junction to
lead - 30 K/W
Ψj-top thermal characterization
parameter from junction to
top of package
[4]- - 2 K/W
Rth(j-c) thermal resistance from
junction to case
free-air natural convection - 4.0 - K/W
Table 10. Characteristics
VP = 25 V, fosc = 320 kHz and Tamb = 25 °C; unless speciﬁed otherwise.
Supply supply voltage asymmetrical supply 10 25 36 V
symmetrical supply ±5 ±12.5 ±18 V supply current Sleep mode - 0.6 1.0 mA
Iq(tot) total quiescent current Operating mode;no load,
no snubbers or ﬁlter
connected
-40 50 mA
Series resistance output switches
RDSon drain-source on-state
resistance
Tj = 25°C - 380 - mΩ
Tj = 125°C - 545 - mΩ
Power-up input: pin POWERUP[1] input voltage 0 - 6.0 V input current VI = 3 V - 1 20 μA
VIL LOW-level input
voltage - 0.8 V
VIH HIGH-level input
voltage - 6.0 V
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
Engage input: pin ENGAGE[1] output voltage 2.4 2.8 3.1 V input voltage 0 - 6.0 V output current VI = 3 V - 50 60 μA
VIL LOW-level input
voltage - 0.8 V
VIH HIGH-level input
voltage
2.4 - 6.0 V
Diagnostic output: pin DIAG[1] output voltage protection activated; see
Table6 - 0.8 V
Operating mode 2 2.5 3.3 V
Bias voltage for inputs: pin INREF
VO(bias) bias output voltage Reference to VSSA - 2.1 - V
Half-supply voltage
Pins HVP1 and HVP2 output voltage half-supply voltage to
charge SE capacitor
0.5VP − 0.2V 0.5VP 0.5VP+ 0.2VV output current VHVP1 =VHVP2 =VO− 1V - 50 - mA
Pin HVPREF output voltage half-supply reference
voltage in Mute mode
0.5VP − 0.2V 0.5VP 0.5VP+ 0.2VV
Reference voltage for internal logic: pin DREF output voltage reference to VSSA 4.5 4.8 5.1 V
Ampliﬁer outputs: pins OUT1 and OUT2
VO(offset) output offset voltage SE; with respect to HVPREF
Mute mode - - 15 mV
Operating mode - - 100 mV
BTL
Mute mode - - 20 mV
Operating mode - - 150 mV
Stabilizer output: pins STAB1, STAB2 output voltage Mute mode and
Operating mode; with
respectto pins VSSP1 and
VSSP2 11 12 V
Voltage protections
VP(uvp) undervoltage
protection supply
voltage
8.0 9.5 9.9 V
VP(ovp) overvoltage protection
supply voltage
36.1 38.5 40 V
Table 10. Characteristics …continued
VP = 25 V, fosc = 320 kHz and Tamb = 25 °C; unless speciﬁed otherwise.
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
[1] Measured with respect to pin CGND.
[2] Measured with respect to pin VSSD(HW).
13. Dynamic characteristics
VP(th)(ubp)l low unbalance
protection threshold
supply voltage
VP = 22 V;
VHVPREF =11V - 18 V
VP(th)(ubp)h high unbalance
protection threshold
supply voltage
VP = 22 V;
VHVPREF =11V - - V
Current protections
IO(ocp) overcurrent protection
output current
current limiting 2.0 2.5 - A
Temperature protection
Tact(th_prot) thermal protection
activation temperature
155 - 160 °C
Tact(th_fold) thermal foldback
activation temperature
140 - 150 °C
Oscillator reference: pin OSCIO[2]
VIH HIGH-level input
voltage
4.0 - 5.0 V
VIL LOW-level input
voltage - 0.8 V
VOH HIGH-level output
voltage
4.0 - 5.0 V
VOL LOW-level output
voltage - 0.8 V
Nslave(max) maximum number of
slaves
driven by one master 12 - - -
Table 10. Characteristics …continued
VP = 25 V, fosc = 320 kHz and Tamb = 25 °C; unless speciﬁed otherwise.
Table 11. Switching characteristics
VP = 25 V; Tamb = 25 °C; unless otherwise speciﬁed.
Internal oscillator
fosc oscillator frequency Rosc = 39kΩ - 320 - kHz
range 300 - 500 kHz
Timing PWM output: pins OUT1 and OUT2 rise time IO = 0A - 10 - ns fall time IO = 0A - 10 - ns
tw(min) minimum pulse width IO = 0A - 80 - ns
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
[1] RS is the total series resistance of an inductor and a ESR single ended capacitor in the application.
[2] Output power is measured indirectly; based on RDSon measurement.
[3] THD+N is measured in a bandwidth of 20 Hz to 20 kHz, AES17 brick wall.
[4] Vripple = 2 V (p-p); Ri = 0Ω.
[5] B = 20 Hz to 20 kHz, AES17 brick wall.
Table 12. SE characteristics
VP = 25 V, RL = 2 × 8 Ω, fi = 1 kHz, fosc = 320 kHz, RS < 0.1Ω[1] °C; unless otherwise speciﬁed.
Po(RMS) RMS output power continuous time output power per channel[2]
RL = 4 Ω; VP = 17 V
THD+N = 0.5 %, fi = 1 kHz 5.9 6.8 - W
THD+N = 0.5 %, fi = 100 Hz - 6.8 - W
THD+N = 10 %, fi = 1 kHz 7.5 8.5 - W
THD+N = 10 %, fi = 100 Hz - 8.5 - W
RL = 8 Ω; VP = 25 V
THD+N = 0.5 %, fi = 1 kHz 7.3 8.2 - W
THD+N = 0.5 %, fi = 100 Hz - 8.2 - W
THD+N = 10 %, fi = 1 kHz 9.3 10.3 - W
THD+N = 10 %, fi = 100 Hz - 10.3 - W
THD+N total harmonic
distortion-plus-noise
Po = 1 W [3]
fi = 1 kHz - 0.014 0.1 %
fi = 6 kHz - 0.05 0.1 %
Gv(cl) closed-loop voltage gain Vi =100 mV; no load 29 30 31 dB
|ΔGV| voltage gain difference - 0.5 1 dB
αcs channel separation Po = 1 W; fi = 1 kHz 70 80 - dB
SVRR supply voltage ripple
rejection
Operating mode [4]
fi = 100 Hz - 60 - dB
fi = 1 kHz 40 50 - dB
|Zi| input impedance differential 70 100 - kΩ
Vn(o) output noise voltage Operating mode; Ri = 0Ω [5]- 100 150 μV
Mute mode [5]- 70 100 μV
VO(mute) mute output voltage Mute mode; Vi = 1 V (RMS) - 100 - μV
CMRR common mode rejection
ratio
Vi(cm) = 1 V (RMS) - 75 - dB
ηpo output power efﬁciency VP = 17 V; RL = 4Ω;=8 W/channel 89 - %
VP = 25 V; RL = 8Ω;=10 W/channel 92 - %
NXP Semiconductors TDA8933B
Class D audio ampliﬁer
[1] RS is the total series resistance of an inductor and a ESR single ended capacitor in the application.
[2] Output power is measured indirectly; based on RDSon measurement.
[3] THD+N is measured in a bandwidth of 20 Hz to 20 kHz, AES17 brick wall.
[4] B = 22 Hz to 20 kHz, AES17 brick wall.
[5]
14. Application information
14.1 Output power estimation
The output power Po at THD+N = 0.5 %, just before clipping, for the SE and the BTL
conﬁgurations can be estimated using Equation 2 and Equation3.
Table 13. BTL characteristics
VP = 25 V, RL = 16 Ω, fi = 1 kHz, fosc = 320 kHz, RS < 0.1Ω[1] °C; unless otherwise speciﬁed.
Po(RMS) RMS output power continuous time output power[2]
RL = 8 Ω; VP = 17 V
THD+N = 0.5 %, fi = 1 kHz 11.9 13.7 - W
THD+N = 0.5 %, fi = 100 Hz - 13.7 - W
THD+N = 10 %, fi = 1 kHz 15.4 17.1 - W
THD+N = 10 %, fi = 100 Hz - 17.1 - W
RL = 16 Ω; VP = 25 V
THD+N = 0.5 %, fi = 1 kHz 14.9 16.5 - W
THD+N = 0.5 %, fi = 100 Hz - 16.5 - W
THD+N = 10 %, fi = 1 kHz 18.9 20.6 - W
THD+N = 10 %, fi = 100 Hz - 20.6 - W
THD+N total harmonic
distortion-plus-noise
Po = 1 W [3]
fi = 1 kHz - 0.01 0.1 %
fi = 6 kHz - 0.04 0.1 %
Gv(cl) closed-loop voltage gain 35 36 37 dB
|Zi| input impedance differential 35 50 - kΩ
Vn(o) output noise voltage Ri = 0Ω
Operating mode [4]- 100 150 μV
Mute mode [4]- 70 100 μV
VO(mute) mute output voltage Mute mode; Vi = 1 V (RMS) - 100 - μV
CMRR common mode rejection
ratio
Vi(cm) = 1 V (RMS) - 75 - dB
ηpo output power efﬁciency Po = 17 W; VP = 17 V; RL = 8Ω [5] 89 91 - %
Po = 21 W; VP = 25 V; RL = 16Ω 92 94 - %poo⋅o⋅ P+-----------------------=

Partno	Mfg	Dc	Qty	Available	Descript
TDA8933BTW	PHILIPS	N/a	156	avai	Class D Audio Amplifier
TDA8933BTW	NXP	N/a	926	avai	Class D Audio Amplifier