TDA8932BT-TDA8932BTW Fast Delivery |IC PHOENIX CO.,LIMITED

TDA8932BT ,Class-D audio amplifierApplicationsn Flat panel television setsn Flat panel monitor setsn Multimedia systemsn Wireless spe ..
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TDA8932BT-TDA8932BTW
Class-D audio amplifier
General descriptionThe TDA8932B is a high efﬁciency class-D ampliﬁer with low power dissipation.
The continuous time output poweris2×15Win stereo half-bridge application (RL =4Ω)
or 1×30 W in mono full-bridge application (RL =8 Ω). Due to the low power dissipation
the device can be used without any external heat sink when playing music. Due to the
implementation of thermal foldback, even for high supply voltages and/or lower load
impedances, the device continues to operate with considerable music output power
without the need for an external heat sink.
The device has two full-differential inputs driving two independent outputs. It can be used
in a mono full-bridge conﬁguration (BTL) or in a stereo half-bridge conﬁguration (SE). Features Operating voltage from 10 V to 36 V asymmetrical or±5 V to ±18 V symmetrical Mono-bridged tied load (full-bridge) or stereo single-ended (half-bridge) application Application without heat sink using thermally enhanced small outline package High efﬁciency and low-power dissipation Thermally protected and thermal foldback Current limiting to avoid audio holes Full short-circuit proof across load and to supply lines (using advanced current
protection) Switchable internal or external oscillator (master-slave setting) No pop noise Full-differential inputs Applications Flat panel television sets Flat panel monitor sets Multimedia systems Wireless speakers Mini and micro systems Home sound sets
TDA8932B
Class-D audio ampliﬁer
Rev. 04 — 18 December 2008 Product data sheet
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer Quick reference data
[1] Output power is measured indirectly; based on RDSon measurement.
[2] Two layer application board (55 mm × 45 mm), 35 μm copper, FR4 base material in free air with natural
convection. Ordering information
Table 1. Quick reference data=22 V; fosc= 320 kHz; Tamb =25 °C; unless otherwise speciﬁed.
Supplies supply voltage asymmetrical supply 10 22 36 V supply current Sleep mode - 145 195 μA
Iq(tot) total quiescent
current
Operating mode; no load, no
snubbers and no ﬁlter
connected 4050mA
Stereo SE channel; Rs< 0.1Ω[1]
Po(RMS) RMS output power continuous time output power
per channel;
THD+N=10%;fi=1 kHz =4 Ω; VP=22V 13.8 15.3 - W =8 Ω; VP=30V 14.0 15.5 - W
short time output power per
channel; THD+N=10%;=1 kHz
[2] =4 Ω; VP=29V 23.8 26.5 - W
Mono BTL; Rs< 0.1Ω[1]
Po(RMS) RMS output power continuous time output power;
THD+N=10 %; fi=1 kHz =4 Ω; VP=12V 15.5 17.2 - W =8 Ω; VP=22V 28.9 32.1 - W
short time output power;
THD+N = 10 %; fi=1 kHz
[2] =8 Ω; VP=29V 49.5 55.0 - W
Table 2. Ordering information
TDA8932BT SO32 plastic small outline package; 32 leads;
body width 7.5 mm
SOT287-1
TDA8932BTW HTSSOP32 plastic thermal enhanced thin shrink small outline
package; 32 leads; body width 6.1 mm; lead pitch
0.65 mm; exposed die pad
SOT549-1
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer Block diagram
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer Pinning information
7.1 Pinning
7.2 Pin description
Table 3. Pin description
VSSD(HW) 1 negative digital supply voltage and handle wafer connection
IN1P 2 positive audio input for channel 1
IN1N 3 negative audio input for channel 1
DIAG 4 diagnostic output; open-drain
ENGAGE 5 engage input to switch between Mute mode and Operating mode
POWERUP 6 power-up input to switch between Sleep mode and Mute mode
CGND 7 control ground; reference for POWERUP , ENGAGE and DIAG
VDDA 8 positive analog supply voltage
VSSA 9 negative analog supply voltage
OSCREF 10 input internal oscillator setting (only master setting)
HVPREF 11 decoupling of internal half supply voltage reference
INREF 12 decoupling for input reference voltage
TEST 13 test signal input; for testing purpose only
IN2N 14 negative audio input for channel 2
IN2P 15 positive audio input for channel 2
VSSD(HW) 16 negative digital supply voltage and handle wafer connection
VSSD(HW) 17 negative digital supply voltage and handle wafer connection
DREF 18 decoupling of internal (reference) 5 V regulator for logic supply
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
[1] The exposed die pad has to be connected to VSSD(HW). Functional description
8.1 General
The TDA8932B is a mono full-bridge or stereo half-bridge audio power ampliﬁer using
class-D technology. The audio input signal is converted into a Pulse Width Modulated
(PWM) signal viaan analog input stage and PWM modulator.To enable the output power
Diffusion Metal Oxide Semiconductor (DMOS) transistors to be driven, this digital PWM
signalis appliedtoa control and handshake block and driver circuitsfor both the high side
and low side. A 2nd-order low-pass ﬁlter converts the PWM signal to an analog audio
signal across the loudspeakers.
The TDA8932B contains two independent half-bridges with full differential input stages.
The loudspeakers can be connected in the following conﬁgurations: Mono full-bridge: Bridge Tied Load (BTL) Stereo half-bridge: Single-Ended (SE)
The TDA8932B contains common circuits to both channels such as the oscillator, all
reference sources, the mode functionality and a digital timing manager. The following
protections are built-in: thermal foldback, temperature, current and voltage protections.
HVP2 19 half supply output voltage 2 for charging single-ended capacitor for
channel 2
VDDP2 20 positive power supply voltage for channel 2
BOOT2 21 bootstrap high-side driver channel 2
OUT2 22 PWM output channel 2
VSSP2 23 negative power supply voltage for channel 2
STAB2 24 decoupling of internal 11 V regulator for channel 2 drivers
STAB1 25 decoupling of internal 11 V regulator for channel 1 drivers
VSSP1 26 negative power supply voltage for channel 1
OUT1 27 PWM output channel 1
BOOT1 28 bootstrap high-side driver channel 1
VDDP1 29 positive power supply voltage for channel 1
HVP1 30 half supply output voltage 1 for charging single-ended capacitor for
channel 1
OSCIO 31 oscillator input in slave conﬁguration or oscillator output in master
conﬁguration
VSSD(HW) 32 negative digital supply voltage and handle wafer connection
Exposed die
pad HTSSOP32 package only[1]
Table 3. Pin description …continued
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
8.2 Mode selection and interfacing
The TDA8932B supports four operating modes, selected using pins POWERUP and
ENGAGE: Sleep mode: with low supply current. Mute mode: the ampliﬁers are switching idle (50% duty cycle), but the audio signalat
the outputis suppressedby disabling the Vl-converter input stages. The capacitorson
pins HVP1 and HVP2 have been charged to half the supply voltage (asymmetrical
supply only). Operating mode: the ampliﬁers are fully operational with output signal. Fault mode.
Pins POWERUP and ENGAGE are referenced to pin CGND.
Table 4 shows the different modes as a function of the voltages on the POWERUP and
ENGAGE pins.
[1] In case of symmetrical supply conditions the voltage applied to pins POWERUP and ENGAGE must never
exceed the supply voltage (VDDA, VDDP1 or VDDP2). the transition between Mute mode and Operating modeis controlled viaa time constant,
the start-up will be pop free since the DC output offset voltage is applied gradually to the
output between Mute mode and Operating mode. The bias current setting of the
VI-converters is related to the voltage on pin ENGAGE: Mute mode: the bias current setting of the VI-converters is zero (VI-converters
disabled) Operating mode: the bias current is at maximum
The time constant required to apply the DC output offset voltage gradually between Mute
mode and Operating mode can be generated by connecting a 470 nF decoupling
capacitor to pin ENGAGE.
Table 4. Mode selection
Sleep < 0.8V < 0.8V don’t care
Mute 2 V to 6.0V[1] < 0.8V[1] > 2V
Operating 2 V to 6.0V[1] 2.4 V to 6.0V[1] >2V
Fault 2 V to 6.0V[1] don’t care < 0.8V
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
8.3 Pulse width modulation frequency
The output of the ampliﬁer is a PWM signal with a carrier frequency of approximately
320 kHz. Using a 2nd-order low-pass ﬁlter in the application results in an analog audio
signal across the loudspeaker. The PWM switching frequency can be set by an external
resistor Rosc connected between pins OSCREF and VSSD(HW). The carrier frequency can
be set between 300 kHz and 500 kHz. Using an external resistor of 39 kΩ, the carrier
frequency is set to an optimized value of 320 kHz (see Figure 5).
If two or more TDA8932B devices are used in the same audio application, it is
recommendedto synchronize the switching frequencyofall devices. This canbe realized
by connecting all OSCIO pins together and conﬁgure one of the TDA8932B in the
application as clock master, while the other TDA8932B devices are conﬁgured in slave
mode.
Pin OSCIOisa 3-state inputor output buffer. Pin OSCIOis conﬁguredin master modeas
an oscillator output and in slave mode as an oscillator input. Master mode is enabled by
applyinga resistor while slave modeis enteredby connecting pin OSCREF directlyto pin
VSSD(HW) (without any resistor).
The value of the resistor also sets the frequency of the carrier which can be estimated by
the following formula:
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
(1)
Where:
fosc= oscillator frequency (Hz)
Rosc= oscillator resistor (on pin OSCREF) (Ω)
Table 5 summarizes how to conﬁgure the TDA8932B in master or slave conﬁguration.
For device synchronization see Section 14.6 “Device synchronization”.
8.4 Protection
The following protection is included in the TDA8932B: Thermal Foldback (TF) OverTemperature Protection (OTP) OverCurrent Protection (OCP) Window Protection (WP) Supply voltage protection: UnderVoltage Protection (UVP) OverVoltage Protection (OVP) UnBalance Protection (UBP) ElectroStatic Discharge (ESD)
The reaction of the device to the different fault conditions differs per protection.
Table 5. Master or slave conﬁguration
Master Rosc> 25 kΩ to VSSD(HW) output
Slave Rosc=0 Ω; shorted to VSSD(HW) inputosc 12.45 109×
Rosc----------------------------=
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
8.4.1 Thermal Foldback (TF) the junction temperatureof the TDA8932B exceeds the threshold level(Tj> 140 °C) the
gainof the ampliﬁeris decreased graduallytoa level where the combinationof dissipation
(P) and the thermal resistance from junction to ambient [Rth(j-a)] results in a junction
temperature around the threshold level.
This means that the device will not completely switch off, but remains operationalat lower
output power levels. Especially with music output signals this feature enables high peak
output power while still operating without any external heat sink other than the
printed-circuit board area. the junction temperature still increases dueto external causes, the OTP shuts down the
ampliﬁer completely.
8.4.2 OverTemperature Protection (OTP)
If the junction temperature Tj> 155 °C, then the power stage will shut down immediately.
8.4.3 OverCurrent Protection (OCP)
When the loudspeaker terminals are short-circuited or if one of the demodulated outputs
of the ampliﬁer is short-circuited to one of the supply lines, this will be detected by the
OCP.
If the output current exceeds the maximum output current (IO(ocp)>4 A), this current will limitedby the ampliﬁerto4A while the ampliﬁer outputs remain switching (the ampliﬁer
is NOT shutdown completely). This is called current limiting.
The ampliﬁer can distinguish between an impedance drop of the loudspeaker and a
low-ohmic short-circuit across the load or to one of the supply lines. This impedance
threshold depends on the supply voltage used: In caseofa short-circuit across the load, the audio ampliﬁeris switchedoff completely
and after approximately 100 ms it will try to restart again. If the short-circuit condition
is still present after this time, this cycle will be repeated. The average dissipation will
be low because of this low duty cycle. In caseofa shortto oneof the supply lines, this will trigger the OCP and the ampliﬁer
will be shut down. During restart the window protection will be activated. As a result
the ampliﬁer will not start until 100 ms after the short to the supply lines is removed. In case of impedance drop (e.g. due to dynamic behavior of the loudspeaker) the
same protection willbe activated. The maximum output currentis again limitedto4A,
but the ampliﬁer will NOT switch off completely (thus preventing audio holes from
occurring). The result will be a clipping output signal without any artifacts.
8.4.4 Window Protection (WP)
The WP checks the PWM output voltage before switching from Sleep modeto Mute mode
(outputs switching) and is activated: During the start-up sequence, when pin POWERUP is switched from Sleep mode to
Mute mode. In the event of a short-circuit at one of the output terminals to VDDP1,
VSSP1, VDDP2 or VSSP2 the start-up procedure is interrupted and the TDA8932B waits
for open-circuit outputs. Because the checkis done before enabling the power stages,
no large currents will ﬂow in the event of a short-circuit.
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer When the ampliﬁer is completely shut down due to activation of the OCP because a
short-circuit to one of the supply lines is made, then during restart (after 100 ms) the
window protection will be activated. As a result the ampliﬁer will not start until the
short-circuit to the supply lines is removed.
8.4.5 Supply voltage protection
If the supply voltage drops below 10 V, the UnderVoltage Protection (UVP) circuit is
activated and the system will shut down directly. This switch-off will be silent and without
pop noise. When the supply voltage rises above the threshold level, the system is
restarted again after 100 ms.
If the supply voltage exceeds 36 V the OverVoltage Protection (OVP) circuit is activated
and the power stages will shut down.Itis re-enabledas soonas the supply voltage drops
below the threshold level. The system is restarted again after 100 ms.
It should be noted that supply voltages >40 V may damage the TDA8932B. Two
conditions should be distinguished: If the supply voltage is pumped to higher values by the TDA8932B application itself
(see also Section 14.3), the OVP is triggered and the TDA8932B is shut down. The
supply voltage will decrease and the TDA8932B is protected against any overstress. If a supply voltage >40 V is caused by other or external causes, then the TDA8932B
will shut down, but the device can still be damaged since the supply voltage will
remain >40 V in this case. The OVP protection is not a supply voltage clamp.
An additional UnBalance Protection (UBP) circuit compares the positive analog supply
voltage (VDDA) and the negative analog supply voltage (VSSA) and is triggered if the
voltage difference between them exceeds a certain level. This level depends on the sum
of both supply voltages. The unbalance threshold levels can be deﬁned as follows: LOW-level threshold: VP(th)(ubp)l<8⁄5× VHVPREF HIGH-level threshold: VP(th)(ubp)h>8⁄3× VHVPREFa symmetrical supply the UBPis released when the unbalanceof the supply voltageis
within 6 % of its starting value.
Table 6 shows an overview of all protection and the effect on the output signal.
Table 6. Protection overview
OTP no yes
OCP yes no yes no
UVP no yes
OVP no yes
UBP no yes
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
8.5 Diagnostic input and output
Whenever a protection other than TF is triggered, pin DIAG is forced LOW level (see
Table 6). An internal reference supply will pull-up the open-drain DIAG output to
approximately 2.4V . This internal reference supply can deliver approximately 50 μA.
Pin DIAG refers to pin CGND. The diagnostic output signal during different short
conditionsis illustratedin Figure6. Using pin DIAGas input,a voltage< 0.8V will put the
device into Fault mode.
8.6 Differential inputs
For a high common-mode rejection ratio and a maximum of ﬂexibility in the application,
the audio inputs are fully differential. By connecting the inputs anti-parallel, the phase of
oneof the two channels canbe inverted,so that the ampliﬁer can operateasa mono BTL
ampliﬁer. The input conﬁguration for a mono BTL application is illustrated in Figure7.
In SE conﬁguration it is also recommended to connect the two differential inputs in
anti-phase. This has advantagesfor the current handlingof the power supplyat low signal
frequencies and minimizes supply pumping (see also Section 14.8).
8.7 Output voltage buffers
When pin POWERUP is set HIGH, the half supply output voltage buffers are switched on asymmetrical supply conﬁguration. The start-up willbe pop free since the device starts
switching when the capacitor on pin HVPREF and the SE capacitors are completely
charged.
Output voltage buffers:
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer Pins HVP1 and HVP2: The time requiredfor charging the SE capacitor dependsonits
value. The half supply voltage output is disabled when the TDA8932B is used in a
symmetrical supply application. Pin HVPREF: This output voltage reference buffer charges the capacitor on pin
HVPREF. Pin INREF: This output voltage reference buffer charges the input reference capacitor
on pin INREF . Pin INREF applies the bias voltage for the inputs. Internal circuitry
Table 7. Internal circuitry
1VSSD(HW) VSSD(HW) VSSD(HW) VSSD(HW) IN1P IN1N INREF IN2N IN2P DIAG
001aad784
1, 16,
17, 32
VSSA
VDDA
001aad785
2, 15
3, 14
HVPREF
VSSA
001aaf607 20 %A
2.5 V
VSSA
VDDA
CGND
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer ENGAGE POWERUP CGND
8VDDA
Table 7. Internal circuitry …continued
001aaf608
2 kΩ
Iref = 50 μA
2.8 V
VSSA
VDDA
CGND
001aad788
VSSA
VDDA
CGND
001aad789
VSSA
VDDA
001aad790
VSSD
VSSA
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
9VSSA OSCREF HVPREF TEST DREF
Table 7. Internal circuitry …continued
001aad791
VSSD
VDDA
001aad792
VSSA
VDDA
Iref
001aaf604
VSSA
VDDA
001aad795
VSSA
VDDA
001aag025
VSSD
VDD
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer HVP2 HVP1 VDDP2 VSSP2 VSSP1 VDDP1 BOOT2 BOOT1 OUT2 OUT1 STAB2 STAB1 OSCIO
Table 7. Internal circuitry …continued
001aag026
19, 30
VSSA
VDDA
001aad798
20, 29
23, 26
001aad799
21, 28
OUT1, OUT2
001aag027
22, 27
VSSP1,
VSSP2
VDDP1,
VDDP2
001aag028
24, 25
VSSP1,
VSSP2
VDDA
001aag029
VSSD
DREF
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
10. Limiting values
[1] VP = VDDP1 − VSSP1 = VDDP2 − VSSP2.
[2] Measured with respect to pin INREF; Vx < VDD + 0.3 V.
[3] Measured with respect to pin VSSD(HW); Vx < VDD + 0.3 V.
[4] Measured with respect to pin CGND; Vx < VDD + 0.3 V.
[5] VSS = VSSP1 = VSSP2; VDD = VDDP1 = VDDP2.
[6] Current limiting concept.
[7] Human Body Model (HBM); Rs= 1500 Ω; C = 100 pF
For pins 2, 3, 11, 14 and 15 Vesd= ±1800 V.
[8] Machine Model (MM); Rs=0 Ω; C = 200 pF; L = 0.75 μH.
11. Thermal characteristics
Table 8. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). supply voltage asymmetrical supply [1] −0.3 +40 V voltage on pin x
IN1P , IN1N, IN2P , IN2N [2] −5+5 V
OSCREF, OSCIO, TEST [3] VSSD(HW) − 0.35 V
POWERUP , ENGAGE,
DIAG
[4] VCGND − 0.3 6 V
all other pins [5] VSS − 0.3 VDD + 0.3V
IORM repetitive peak output
current
maximum output
current limiting
[6] 4- A junction temperature - 150 °C
Tstg storage temperature −55 +150 °C
Tamb ambient temperature −40 +85 °C power dissipation - 5 W
Vesd electrostatic discharge
voltage
HBM [7] −2000 +2000 V [8] −200 +200 V
Table 9. Thermal characteristics
SO32 package
Rth(j-a) thermal resistance from junction
to ambient
free air natural convection
JEDEC test board [1]- 41 44 K/W
2 layer application board [2]- 44 - K/W
Ψj-lead thermal characterization
parameter from junction to lead - 30 K/W
Ψj-top thermal characterization
parameter from junctionto topof
package
[3]- - 8 K/W
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
[1] Measured on a JEDEC high K-factor test board (standard EIA/JESD 51-7) in free air with natural convection.
[2] Two layer application board (55 mm × 45 mm), 35 μm copper, FR4 base material in free air with natural convection.
[3] Strongly depends on where the measurement is taken on the package.
[4] Two layer application board (55 mm × 40 mm), 35 μm copper, FR4 base material in free air with natural convection.
12. Static characteristics
HTSSOP32 package
Rth(j-a) thermal resistance from junction
to ambient
free air natural convection
JEDEC test board [1]- 47 50 K/W
2 layer application board [4]- 48 - K/W
Ψj-lead thermal characterization
parameter from junction to lead - 30 K/W
Ψj-top thermal characterization
parameter from junctionto topof
package
[3]- - 2 K/W
Rth(j-c) thermal resistance from junction
to case
free air natural convection - 4.0 - K/W
Table 9. Thermal characteristics …continued
Table 10. Static characteristics=22 V; fosc= 320 kHz; Tamb =25 °C; unless otherwise speciﬁed.
Supply supply voltage asymmetrical supply 10 22 36 V
symmetrical supply ±5 ±11 ±18 V supply current Sleep mode; no load - 145 195 μA
Iq(tot) total quiescent current Operating mode; no load, no
snubbers and no ﬁlter connected 4050mA
Series resistance output power switches
RDSon drain-source on-state
resistance =25°C - 150 - mΩ= 125°C - 234 - mΩ
Power-up input: pin POWERUP[1] input voltage 0 - 6.0 V input current VI =3V - 1 20 μA
VIL LOW-level input voltage 0 - 0.8 V
VIH HIGH-level input voltage 2 - 6.0 V
Engage input: pin ENGAGE[1] output voltage open pin 2.4 2.8 3.1 V input voltage 0 - 6.0 V output current VI=0V - 50 60 μA
VIL LOW-level input voltage 0 - 0.8 V
VIH HIGH-level input voltage 2.4 - 6.0 V
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
Diagnostic output: pin DIAG[1] output voltage protection activated; see Table6 - - 0.8 V
Operating mode 2 2.5 3.3 V
Bias voltage for inputs: pin INREF
VO(bias) bias output voltage with respect to pin VSSA - 2.1 - V
Half supply voltage
Pins HVP1 and HVP2 output voltage half supply voltage to charge SE
capacitor
0.5VP−
0.5VP 0.5VP +
0.2 output current VHVP1 = VO− 1V;
VHVP2 =VO− 1V
-50 - mA
Pin HVPREF output voltage half supply reference voltage in
Mute mode
0.5VP−
0.5VP 0.5VP +
Reference voltage for internal logic: pin DREF output voltage 4.5 4.8 5.1 V
Ampliﬁer outputs: pins OUT1 and OUT2
|VO(offset)| output offset voltage SE; with respect to pin HVPREF
Mute mode - - 15 mV
Operating mode - - 100 mV
BTL
Mute mode - - 20 mV
Operating mode - - 150 mV
Stabilizer output: pins STAB1 and STAB2 output voltage Mute mode and Operating mode;
with respect to pins VSSP1 and
VSSP2 11 12 V
Voltage protection
VP(uvp) undervoltage protection
supply voltage
8.0 9.2 9.9 V
VP(ovp) overvoltage protection
supply voltage
36.1 37.4 40 V
VP(th)(ubp)l low unbalance protection
threshold supply voltage
VHVPREF = 11V - - 18 V
VP(th)(ubp)h high unbalance protection
threshold supply voltage
VHVPREF = 11V 29 - - V
Current protection
IO(ocp) overcurrent protection
output current
current limiting 4 5 - A
Temperature protection
Tact(th_prot) thermal protection activation
temperature
155 - 160 °C
Table 10. Static characteristics …continued=22 V; fosc= 320 kHz; Tamb =25 °C; unless otherwise speciﬁed.
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
[1] Measured with respect to pin CGND.
[2] Measured with respect to pin VSSD(HW).
13. Dynamic characteristics
Tact(th_fold) thermal foldback activation
temperature
140 - 150 °C
Oscillator reference; pin OSCIO[2]
VIH HIGH-level input voltage 4.0 - 5 V
VIL LOW-level input voltage 0 - 0.8 V
VOH HIGH-level output voltage 4.0 - 5 V
VOL LOW-level output voltage 0 - 0.8 V
Nslave(max) maximum number of slaves driven by one master 12 - - -
Table 10. Static characteristics …continued=22 V; fosc= 320 kHz; Tamb =25 °C; unless otherwise speciﬁed.
Table 11. Switching characteristics=22 V; Tamb =25 °C; unless otherwise speciﬁed.
Internal oscillator
fosc oscillator frequency Rosc=39kΩ - 320 - kHz
range 300 - 500 kHz
Timing PWM output: pins OUT1 and OUT2 rise time IO =0A - 10 - ns fall time IO =0A - 10 - ns
tw(min) minimum pulse width IO =0A - 80 - ns
Table 12. SE characteristics=22 V; RL =2×4 Ω; fi=1 kHz; fosc= 320 kHz; Rs< 0.1Ω[1] =25 °C; unless otherwise speciﬁed.
THD+N total harmonic
distortion-plus-noise =1W [2]=1 kHz - 0.015 0.05 %=6 kHz - 0.08 0.10 %
Gv(cl) closed-loop voltage gain Vi= 100 mV; no load 29 30 31 dB
|ΔGv| voltage gain difference - 0.5 1 dB
αcs channel separation Po=1 W; fi=1 kHz 70 80 - dB
SVRR supply voltage rejection ratio Operating mode [3]= 100Hz - 60 - dB=1 kHz 40 50 - dB
|Zi| input impedance differential 70 100 - kΩ
Vn(o) output noise voltage Operating mode; Rs =0Ω [4]- 100 150 μV
Mute mode [4]- 70 100 μV
VO(mute) mute output voltage Mute mode; Vi=1 V (RMS) and=1 kHz 100 - μV
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
[1] Rs is the series resistance of inductor and capacitor of low-pass LC ﬁlter in the application.
[2] THD+N is measured in a bandwidth of 20 Hz to 20 kHz, AES17 brick wall.
[3] Maximum Vripple=2V (p-p); Rs=0Ω.
[4]B=20 Hz to 20 kHz, AES17 brick wall.
[5] Output power is measured indirectly; based on RDSon measurement.
Two layer application board (55 mm × 45 mm), 35 μm copper, FR4 base material in free air with natural convection.
CMRR common mode rejection ratio Vi(cm)=1 V (RMS) - 75 - dB
ηpo output power efﬁciency Po =15W =22V; RL =4Ω 90 92 - % =30V; RL =8Ω 91 93 - %
Po(RMS) RMS output power continuous time output power per
channel
[5] =4 Ω; VP =22V
THD+N= 0.5 %; fi=1 kHz 10.9 12.1 - W
THD+N= 0.5 %; fi= 100Hz - 12.1 - W
THD+N=10 %; fi=1 kHz 13.8 15.3 - W
THD+N=10 %; fi= 100Hz - 15.3 - W =8 Ω; VP =30V
THD+N= 0.5 %; fi=1 kHz 11.1 12.3 - W
THD+N= 0.5 %; fi= 100Hz - 12.3 - W
THD+N=10 %; fi=1 kHz 14.0 15.5 - W
THD+N=10 %; fi= 100Hz - 15.5 - W
short time output power per channel [5] =4 Ω; VP =29V
THD+N= 0.5% 19.0 21.1 - W
THD+N=10% 23.8 26.5 - W
Table 12. SE characteristics …continued=22 V; RL =2×4 Ω; fi=1 kHz; fosc= 320 kHz; Rs< 0.1Ω[1] =25 °C; unless otherwise speciﬁed.
Table 13. BTL characteristics=22 V; RL =8 Ω; fi=1 kHz; fosc= 320 kHz; Rs< 0.1Ω[1] =25 °C; unless otherwise speciﬁed.
THD+N total harmonic
distortion-plus-noise =1W [2]=1 kHz - 0.007 0.1 %=6 kHz - 0.05 0.1 %
Gv(cl) closed-loop voltage gain 35 36 37 dB
SVRR supply voltage rejection ratio Operating mode [3]= 100Hz - 75 - dB= 1000Hz 70 75 - dB
sleep; fi= 100Hz [3] -80 - dB
|Zi| input impedance differential 35 50 kΩ
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
[1] Rs is the series resistance of inductor and capacitor of low-pass LC ﬁlter in the application.
[2] THD+N is measured in a bandwidth of 20 Hz to 20 kHz, AES17 brick wall.
[3] Maximum Vripple=2 V (p-p); Rs=0Ω.
[4]B=20 Hz to 20 kHz, AES17 brick wall.
[5] Output power is measured indirectly; based on RDSon measurement.
Two layer application board (55 mm × 45 mm), 35 μm copper, FR4 base material in free air with natural convection.
Vn(o) output noise voltage Rs =0Ω
Operating mode [4]- 100 150 μV
Mute mode [4]- 70 100 μV
VO(mute) mute output voltage Mute mode; Vi=1 V (RMS) and=1 kHz 100 - μV
CMRR common mode rejection ratio Vi(cm)=1 V (RMS) - 75 - dB
ηpo output power efﬁciency Po=15 W; VP=12 V and RL =4Ω 88 90 - %=30 W; VP=22 V and RL =8Ω 90 92 - %
Po(RMS) RMS output power continuous time output power [5] =4 Ω; VP =12V
THD+N= 0.5 %; fi=1 kHz 11.8 13.2 - W
THD+N= 0.5 %; fi= 100Hz - 13.2 - W
THD+N=10 %; fi=1 kHz 15.5 17.2 - W
THD+N=10 %; fi= 100Hz - 17.2 - W =8 Ω; VP =22V
THD+N= 0.5 %; fi=1 kHz 23.1 25.7 - W
THD+N= 0.5 %; fi= 100Hz - 25.7 - W
THD+N=10 %; fi=1 kHz 28.9 32.1 - W
THD+N=10 %; fi= 100Hz - 32.1 - W
short time output power [5] =4 Ω; VP =15V
THD+N= 0.5% 18.5 20.6 - W
THD+N=10% 23.9 26.6 - W
RL =8 Ω; VP =29V
THD+N= 0.5% 36.0 40.0 - W
THD+N=10% 49.5 55.0 - W
Table 13. BTL characteristics …continued=22 V; RL =8 Ω; fi=1 kHz; fosc= 320 kHz; Rs< 0.1Ω[1] =25 °C; unless otherwise speciﬁed.
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
14. Application information
14.1 Output power estimation
The output power Po at THD+N= 0.5 %, just before clipping, for the SE and BTL
conﬁguration can be estimated using Equation 2 and Equation3.
SE conﬁguration:
(2)
BTL conﬁguration:
(3)
Where:= supply voltage VDDP1 − VSSP1 (V) or VDDP2 − VSSP2 (V)= load impedance (Ω)
RDSon= on-resistance power switch (Ω)= series resistance output inductor (Ω)
RESR= equivalent series resistance SE capacitor (Ω)
tw(min)= minimum pulse width (s); 80 ns typical
fosc= oscillator frequency (Hz); 320 kHz typical with Rosc=39 kΩ
The output power Po at THD+N=10 % can be estimated by:
(4)
Figure 8 and Figure 9 show the estimated output power at THD+N= 0.5 % and
THD+N=10 % as a function of the supply voltage for SE and BTL conﬁgurations at
different load impedances. The output power is calculated with: RDSon= 0.15 Ω (at =25 °C), Rs= 0.05 Ω, RESR= 0.05 Ω and IO(ocp)=4 A (minimum).o 0.5%()LL R DSon Rs R ESR++ + ---------------------------------------------------------- 1t wmin()– fosc× ()× VP×L× -------------------------------------------------------------------------------------------------------------------------------------------=o 0.5%()LL 2+ R DSon Rs+ ()× ------------------------------------------------------ 1t wmin()– fosc× ()× VP×L× --------------------------------------------------------------------------------------------------------------------------------------= o10%() 1.25 Po 0.5%()×=
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
NXP Semiconductors TDA8932B
Class-D audio ampliﬁer
14.2 Output current limiting
The peak output current IO(max)is internally limited abovea levelof4A (minimum). During
normal operation the output current should not exceed this threshold level of 4A
otherwise the output signal is distorted. The peak output current in SE or BTL
conﬁgurations can be estimated using Equation 5 and Equation6.
SE conﬁguration:
(5)
BTL conﬁguration:
(6)
Where:= supply voltage VDDP1 − VSSP1 (V) or VDDP2 − VSSP2 (V)= load impedance (Ω)
RDSon= on-resistance power switch (Ω)= series resistance output inductor (Ω)
RESR= equivalent series resistance SE capacitor (Ω)
Example:Ω speakerin the BTL conﬁguration canbe useduptoa supply voltageof18V without
running into current limiting. Current limiting (clipping) will avoid audio holes but it causes
a comparable distortion like voltage clipping.
14.3 Speaker conﬁguration and impedance
For a ﬂat frequency response (second-order Butterworth ﬁlter) it is necessary to change
the low-pass ﬁlter components Llc and Clc according to the speaker conﬁguration and
impedance. Table 14 shows the practical required values.
14.4 Single-ended capacitor
The SE capacitor forms a high-pass ﬁlter with the speaker impedance. So the frequency
response will roll-off with 20 dB per decade below f-3dB (3 dB cut-off frequency).O max()
0.5 VP×L R DSon Rs RESR++ + ---------------------------------------------------------- 4A≤≤O max()PL 2+ R DSon Rs+ ()× ------------------------------------------------------ 4A≤≤
Table 14. Filter component values 4 22 680 33 470 47 330
BTL 4 10 1500 15 1000 22 680

Partno	Mfg	Dc	Qty	Available	Descript
TDA8932BT	NXP	N/a	5359	avai	Class-D audio amplifier
TDA8932BTW	NXP	N/a	21	avai	Class-D audio amplifier