TDA8920BJ ,2 X 100 W class-D power amplifierGeneral descriptionThe TDA8920B is a high efficiency class-D audio power amplifier with very lowdissi ..
TDA8920BJ ,2 X 100 W class-D power amplifierApplications■ Television sets■ Home-sound sets■ Multimedia systems■ All mains fed audio systems■ Ca ..
TDA8920BJ ,2 X 100 W class-D power amplifierBlock diagramV V V VDDP2 DDP1DDA2 DDA1 STABI PROT3 (20) 10 (4) 18 (12) 13 (7) 23 (16) 14 (8)15 (9)B ..
TDA8920BJ ,2 X 100 W class-D power amplifier
TDA8920BTH ,2 X 100 W class-D power amplifierFeatures■ Zero dead time switching■ Advanced current protection: output current limiting■ Smooth st ..
TDA8920CTH ,2 x 110 W class-D power ampliferApplicationsn DVDn Mini and micro receivern Home Theater In A Box (HTIAB) systemn High-power speake ..
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TDA8920BJ-TDA8920BTH
2 X 100 W class-D power amplifier
General descriptionThe TDA8920B is a high efficiency class-D audio power amplifier with very low
dissipation. The typical output power is 2× 100 W.
The device is available in the HSOP24 power package and in the DBS23P through-hole
power package. The amplifier operates over a wide supply voltage range from
±12.5Vto ±30 V and consumes a very low quiescent current.
Features Zero dead time switching Advanced current protection: output current limiting Smooth start-up: no pop-noise due to DC offset High efficiency Operating supply voltage from ±12.5 Vto ±30V Low quiescent current Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied
Load (BTL) Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in Bridge-Tied Load (BTL) High output power High supply voltage ripple rejection Internal switching frequency can be overruled by an external clock Full short-circuit proof across load and to supply lines Thermally protected.
Applications Television sets Home-sound sets Multimedia systems All mains fed audio systems Car audio (boosters).
TDA8920B × 100 W class-D power amplifier
Philips Semiconductors TDA8920B Quick reference data Ordering information
Table 1: Quick reference data
General; VP= ±27 V supply voltage ±12.5 ±27 ±30 V
Iq(tot) total quiescent
supply current
no load; no filter; no RC-snubber
network connected
-50 65 mA
Stereo single-ended configuration output power RL =3 Ω; THD=10 %; VP= ±27V - 110 - W =4 Ω; THD=10 %; VP= ±27V - 86 - W
Mono bridge-tied load configuration output power RL =6 Ω; THD=10 %; VP= ±27V - 210 - W
Table 2: Ordering informationTDA8920BTH HSOP24 plastic, heatsink small outline package; 24 leads; low
stand-off height
SOT566-3
TDA8920BJ DBS23P plastic DIL-bent-SIL power package; 23 leads (straight
lead length 3.2 mm)
SOT411-1
Philips Semiconductors TDA8920B Block diagram
Philips Semiconductors TDA8920B Pinning information
7.1 Pinning
7.2 Pin description
Table 3: Pin descriptionVSSA2 1 18 negative analog supply voltage for channel2
SGND22 19 signal ground for channel2
VDDA2 3 20 positive analog supply voltage for channel2
IN2M 4 21 negative audio input for channel2
IN2P 5 22 positive audio input for channel2
MODE 6 23 mode selection input: Standby, Muteor Operating mode
OSC 7 1 oscillator frequency adjustment or tracking input
IN1P 8 2 positive audio input for channel1
IN1M 9 3 negative audio input for channel1
VDDA1 10 4 positive analog supply voltage for channel1
Philips Semiconductors TDA8920B Functional description
8.1 GeneralThe TDA8920B is a two channel audio power amplifier using class-D technology.
The audio input signalis converted intoa digital Pulse Width Modulated (PWM) signal via
an analog input stage and PWM modulator. To enable the output power transistors to be
driven, this digital PWM signal is applied to a control and handshake block and driver
circuits for both the high side and low side. In this way a level shift is performed from the
low power digital PWM signal(at logic levels)toa high power PWM signal which switches
between the main supply lines. 2nd-order low-pass filter converts the PWM signaltoan analog audio signal across the
loudspeakers.
The TDA8920B one-chip class-D amplifier contains high power D-MOS switches, drivers,
timing and handshaking between the power switches and some control logic. For
protection a temperature sensor and a maximum current detector are built-in.
The two audio channelsof the TDA8920B contain two PWMs, two analog feedback loops
and two differential input stages. It also contains circuits common to both channels such
as the oscillator, all reference sources, the mode functionality and a digital timing
manager.
The TDA8920B contains two independent amplifier channels with high output power, high
efficiency, low distortion and a low quiescent current. The amplifier channels can be
connected in the following configurations:
Mono Bridge-Tied Load (BTL) amplifier
Stereo Single-Ended (SE) amplifiers.
SGND1 11 5 signal ground for channel1
VSSA1 12 6 negative analog supply voltage for channel1
PROT 13 7 decoupling capacitor for protection (OCP)
VDDP1 14 8 positive power supply voltage for channel1
BOOT1 15 9 bootstrap capacitor for channel1
OUT1 16 10 PWM output from channel1
VSSP1 17 11 negative power supply voltage for channel1
STABI 18 12 decoupling of internal stabilizer for logic supply
n.c. 19 - not connected
VSSP2 20 13 negative power supply voltage for channel2
OUT2 21 14 PWM output from channel2
BOOT2 22 15 bootstrap capacitor for channel2
VDDP2 23 16 positive power supply voltage for channel2
VSSD 24 17 negative digital supply voltage
Table 3: Pin description …continued
Philips Semiconductors TDA8920BThe amplifier system can be switched in three operating modes with pin MODE:
Standby mode; with a very low supply current
Mute mode; the amplifiers are operational; but the audio signal at the output is
suppressed by disabling the VI-converter input stages
Operating mode; the amplifiers are fully operational with output signal.
To ensure pop-noise free start-up the DC output offset voltage is applied gradually to the
output between Mute mode and Operating mode. The bias current setting of the VI
converters is related to the voltage on the MODE pin; in Mute mode the bias current
setting of the VI converters is zero (VI converters disabled) and in Operating mode the
bias current is at maximum. The time constant required to apply the DC output offset
voltage gradually between mute and operating can be generated via an RC-network on
the MODE pin. An example of a switching circuit for driving pin MODE is illustrated in
Figure 4. If the capacitor C is left out of the application the voltage on the MODE pin will
be applied with a much smaller time-constant, which might result in audible pop-noises
during start-up (depending on DC output offset voltage and used loudspeaker).
In order to fully charge the coupling capacitors at the inputs, the amplifier will remain
automatically in the Mute mode before switching to the Operating mode. A complete
overview of the start-up timing is given in Figure5.
Philips Semiconductors TDA8920B
Philips Semiconductors TDA8920B
8.2 Pulse width modulation frequencyThe output signal of the amplifier is a PWM signal with a carrier frequency of
approximately 317 kHz. Usinga 2nd-order LC demodulation filterin the application results
in an analog audio signal across the loudspeaker. This switching frequency is fixed by an
external resistor ROSC connected between pin OSC and VSSA. An optimal setting for the
carrier frequency is between 300 kHz and 350 kHz.
Using an external resistor of 30 kΩ on the OSC pin, the carrier frequency is set to
317 kHz. twoor more class-D amplifiers are usedin the same audio application,itis advisableto
have all devices operating at the same switching frequency by using an external clock
circuit.
8.3 ProtectionsThe following protections are included in TDA8920B:
OverTemperature Protection (OTP)
OverCurrent Protection (OCP)
Window Protection (WP)
Supply voltage protections:
UnderVoltage Protection (UVP)
OverVoltage Protection (OVP)
UnBalance Protection (UBP).
The reaction of the device on the different fault conditions differs per protection:
8.3.1 OverTemperature Protection (OTP)If the junction temperature Tj> 150 °C, then the power stage will shut-down immediately.
The power stage will start switching again if the temperature drops to approximately
130 °C, thus there is a hysteresis of approximately 20 °C.
8.3.2 OverCurrent Protection (OCP)When the loudspeaker terminals are short-circuited or if one of the demodulated outputs
of the amplifier is short-circuited to one of the supply lines, this will be detected by the
OverCurrent Protection (OCP).If the output current exceeds the maximum output current8A, this current willbe limitedby the amplifierto8A while the amplifier outputs remain
switching (the amplifier is NOT shut-down completely).
The amplifier can distinguish between an impedance drop of the loudspeaker and
low-ohmic short across the load. In the TDA8920B this impedance threshold (Zth)
depends on the supply voltage used.
Whena shortis made across the load causing the impedanceto drop below the threshold
level (< Zth) then the amplifier is switched off completely and after a time of 100 ms it will
tryto restart again.If the short circuit conditionis still present after this time this cycle will
be repeated. The average dissipation will be low because of this low duty cycle.
Philips Semiconductors TDA8920B caseofan impedance drop (e.g. dueto dynamic behaviorof the loudspeaker) the same
protection will be activated; the maximum output current is again limited to 8 A, but the
amplifier will NOT switch-off completely (thus preventing audio holes from occurring).
Result will be a clipping output signal without any artefacts.
See also Section 13.6 for more information on this maximum output current limiting
feature.
Philips Semiconductors TDA8920B
8.3.3 Window Protection (WP)During the start-up sequence, when pin MODE is switched from standby to mute, the
conditions at the output terminals of the power stage are checked. In the event of a
short-circuit at one of the output terminals to VDD or VSS the start-up procedure is
interrupted and the system waitsfor open-circuit outputs. Because the testis done before
enabling the power stages, no large currents will flow in the event of a short-circuit. This
system is called Window Protection (WP) and protects for short-circuits at both sides of
the output filter to both supply lines. When there is a short-circuit from the power PWM
output of the power stage to one of the supply lines (before the demodulation filter) it will
alsobe detectedby the start-up safety test. Practical useof this test feature canbe found
in detection of short-circuits on the printed-circuit board.
Remark: This testis operational during (every) start-up sequenceata transition between
Standby and Mute mode. However when the amplifier is completely shut-down due to
activationof the OverCurrent Protection (OCP) becausea shortto oneof the supply lines
is made, then during restart (after 100 ms) the window protection will be activated. As a
result the amplifier will not start-up until the short to the supply lines is removed.
8.3.4 Supply voltage protectionsIf the supply voltage drops below ±12.5 V, the UnderVoltage Protection (UVP) circuit is
activated and the system will shut-down correctly. If the internal clock is used, this
switch-off will be silent and without pop noise. When the supply voltage rises above the
threshold level, the system is restarted again after 100 ms. If the supply voltage exceeds
±33 V the OverVoltage Protection (OVP) circuit is activated and the power stages will
shut-down.Itis re-enabledas soonas the supply voltage drops below the threshold level.
So in this case no timer of 100 ms is started.
An additional UnBalance Protection (UBP) circuit compares the positive analog (VDDA)
and the negative analog (VSSA) supply voltages and is triggered if the voltage difference
between them exceeds a certain level. This level depends on the sum of both supply
voltages. An expression for the unbalanced threshold level is as follows:
Vth(ub)≈ 0.15× (VDDA +VSSA).
When the supply voltage difference drops below the threshold level, the system is
restarted again after 100 ms.
Example: With a symmetrical supply of ±30 V, the protection circuit will be triggered if the
unbalance exceeds approximately 9 V; see also Section 13.7. Table 4 an overview is given of all protections and the effect on the output signal.
[1] Hysteresis of 20 degrees will influence restart timing depending on heatsink size.
Table 4: Overview protections TDA8920BOTP Y Y[1] N[1]
OCP N[2] Y[2] N[2] Y[3] YN
UVP Y N Y
OVP YYN
UBP Y N Y
Philips Semiconductors TDA8920B[2] Only complete shut-downof amplifierif short-circuit impedanceis below thresholdof1Ω.Inall other cases
current limiting: resulting in clipping output signal.
[3] Fault condition detected during (every) transition between standby-to-mute and during restart after
activation of OCP (short to one of the supply lines).
8.4 Differential audio inputsFora high common mode rejection ratio anda maximumof flexibilityin the application, the
audio inputs are fully differential.By connecting the inputs anti-parallel the phaseof oneof
the channels can be inverted, so that a load can be connected between the two output
filters. In this case the system operates as a mono BTL amplifier and with the same
loudspeaker impedance an approximately four times higher output power can be
obtained.
The input configuration for a mono BTL application is illustrated in Figure6.
In the stereo single-ended configuration it is also recommended to connect the two
differential inputsin anti-phase. This has advantagesfor the current handlingof the power
supply at low signal frequencies.
Limiting values[1] Current limiting concept. See also Section 13.6.
Table 5: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). supply voltage - ±30 V
IORM repetitive peak current in
output pin
maximum output
current limiting
[1] 8- A
Tstg storage temperature −55 +150 °C
Tamb ambient temperature −40 +85 °C junction temperature - 150 °C
Philips Semiconductors TDA8920B
10. Thermal characteristics[1] See also Section 13.5.
11. Static characteristics
Table 6: Thermal characteristicsRth(j-a) thermal resistance from junctionto ambient [1]
TDA8920BTH in free air 35 K/W
TDA8920BJ in free air 35 K/W
Rth(j-c) thermal resistance from junction to case [1]
TDA8920BTH 1.3 K/W
TDA8920BJ 1.3 K/W
Table 7: Static characteristicsVP = ±27 V; fosc = 317 kHz; Tamb = 25 °C; unless otherwise specified.
Supply supply voltage [1] ±12.5 ±27 ±30 V
Iq(tot) total quiescent supply current no load, no filter; no
snubber network connected
-50 65 mA
Istb standby supply current - 150 500 μA
Mode select input; pin MODE input voltage [2] 0- 6V input current VI= 5.5V - 100 300 μA
Vstb input voltage for Standby mode [2][3]0 - 0.8 V
Vmute input voltage for Mute mode [2][3] 2.2 - 3.0 V
Von input voltage for Operating mode [2][3] 4.2 - 6 V
Audio inputs; pins IN1M, IN1P, IN2P and IN2M DC input voltage [2] -0 -V
Amplifier outputs; pins OUT1 and OUT2VOO(SE)(mute) mute SE output offset voltage - - 15 mV
VOO(SE)(on) operating SE output offset voltage [4]- - 150 mV
VOO(BTL)(mute) mute BTL output offset voltage - - 21 mV
VOO(BTL)(on) operating BTL output offset voltage [4]- - 210 mV
Stabilizer output; pin STABIVo(stab) stabilizer output voltage mute and operating;
with respectto VSSP1 12.5 15 V
Philips Semiconductors TDA8920B[1] The circuit is DC adjusted at VP= ±12.5 Vto ±30V.
[2] With respect to SGND (0V).
[3] The transition between Standby and Mute mode contain hysteresis, whilethe slopeofthe transition between Mute and Operating mode
is determined by the time-constant on the MODE pin; see Figure7.
[4] DC output offset voltageis appliedtothe output duringthe transition between Mute and Operating modeina gradual way. The slopeof
the dV/dt caused by any DC output offset is determined by the time-constant on the MODE pin.
12. Dynamic characteristics
12.1 Switching characteristics
Temperature protectionTprot temperature protection activation - 150 - °C
Thys hysteresis on temperature protection - 20 - °C
Table 7: Static characteristics …continuedVP = ±27 V; fosc = 317 kHz; Tamb = 25 °C; unless otherwise specified.
Table 8: Switching characteristicsVDD= ±27 V; Tamb =25 °C; unless otherwise specified.
Internal oscillatorfosc typical internal oscillator frequency ROSC= 30.0kΩ 290 317 344 kHz
fosc(int) internal oscillator frequency range 210 - 600 kHz
External oscillator or frequency trackingVOSC high-level voltage on pin OSC SGND+ 4.5 SGND+5 SGND+6 V
VOSC(trip) trip level for tracking on pin OSC - SGND+ 2.5- V
ftrack frequency range for tracking 210 - 600 kHz
Philips Semiconductors TDA8920B
12.2 Stereo and dual SE application[1] RsL is the series resistance of inductor of low-pass LC filter in the application.
[2] Output power is measured indirectly; based on RDSon measurement. See also Section 13.3.
[3] Total harmonic distortion is measured in a bandwidth of 22 Hz to 20 kHz, using AES17 20 kHz brickwall filter. Maximum limit is
guaranteed but may not be 100 % tested.
[4] Vripple =Vripple(max)=2V (p-p); Rs=0Ω.
[5]B=22Hzto20 kHz, using AES17 20 kHz brickwall filter.
[6]B=22Hzto22 kHz, using AES17 20 kHz brickwall filter; independent ofRs.
[7] Po=1 W; Rs=0 Ω; fi=1 kHz.
[8] Vi =Vi(max)=1V (RMS); fi=1 kHz.
Table 9: Stereo and dual SE application characteristics= ±27 V; RL =4 Ω; fi=1 kHz; fosc= 317 kHz; RsL< 0.1Ω[1] =25 °C; unless otherwise specified. output power RL =3 Ω; VP= ±27V [2]
THD= 0.5 % - 87 - W
THD= 10 % - 110 - W =4 Ω; VP= ±27V [2]
THD= 0.5 % - 69 - W
THD= 10 % - 86 - W =6 Ω; VP= ±27V [2]
THD= 0.5 % - 48 - W
THD= 10 % - 60 - W =8 Ω; VP= ±27V [2]
THD= 0.5 % - 36 - W
THD= 10 % - 45 - W
THD total harmonic distortion Po =1W [3]=1 kHz - 0.02 0.05 %=6 kHz - 0.03 - %
Gv(cl) closed loop voltage gain 29 30 31 dB
SVRR supply voltage ripple rejection operating [4]= 100Hz - 55 - dB=1 kHz 40 50 - dB
mute; fi= 100Hz [4] -55 - dB
standby; fi= 100Hz [4] -80 - dB
Zi input impedance 45 68 - kΩ
Vn(o) noise output voltage operating =0Ω [5]- 210 - μV
mute [6]- 160 - μV
αcs channel separation [7] -70 - dB
ΔGv channel unbalance - - 1 dB
Vo(mute) output signal in mute [8]- 100 - μV
CMRR common mode rejection ratio Vi(CM)=1V (RMS) - 75 - dB
Philips Semiconductors TDA8920B
12.3 Mono BTL application[1] RsL is the series resistance of inductor of low-pass LC filter in the application.
[2] Output power is measured indirectly; based on RDSon measurement. See also Section 13.3.
[3] Total harmonic distortion is measured in a bandwidth of 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter. Maximum limit is
guaranteed but may not be 100 % tested.
[4] Vripple =Vripple(max)=2V (p-p); Rs=0Ω.
[5]B=22Hzto20 kHz, using an AES17 20 kHz brickwall filter.
[6]B=22Hzto20 kHz, using an AES17 20 kHz brickwall filter; independent ofRs.
[7] Vi =Vi(max)=1 V (RMS); fi=1 kHz.
13. Application information
13.1 BTL applicationWhen using the power amplifier in a mono BTL application the inputs of both channels
must be connected in parallel and the phase of one of the inputs must be inverted (see
Figure 6). In principle the loudspeaker can be connected between the outputs of the two
single-ended demodulation filters.
Table 10: Mono BTL application characteristics= ±27 V; RL =8 Ω; fi=1 kHz; fosc= 317 kHz; RsL< 0.1Ω[1] =25 °C; unless otherwise specified. output power RL =6 Ω; VP= ±27V [2]
THD= 0.5 % - 174 - W
THD= 10 % - 210 - W =8 Ω; VP= ±27V [2]
THD= 0.5 % - 138 - W
THD= 10 % - 173 - W
THD total harmonic distortion Po =1W [3]=1 kHz - 0.02 0.05 %=6 kHz - 0.03 - %
Gv(cl) closed loop voltage gain 35 36 37 dB
SVRR supply voltage ripple rejection operating [4]= 100Hz - 80 - dB=1 kHz 70 80 - dB
mute; fi= 100Hz [4] -80 - dB
standby; fi= 100Hz [4] -80 - dB
Zi input impedance 22 34 - kΩ
Vn(o) noise output voltage operating =0Ω [5]- 300 - μV
mute [6]- 220 - μV
Vo(mute) output signal in mute [7]- 200 - μV
CMRR common mode rejection ratio Vi(CM)=1V (RMS) - 75 - dB
Philips Semiconductors TDA8920B
13.2 MODE pinFor pop-noise free start-up an RC time-constant must be applied on the MODE pin. The
bias-current settingof the VI-converter inputis directly relatedto the voltageon the MODE
pin.In turn the bias-current settingof theVI convertersis directly relatedto the DC output
offset voltage. Thus a slow dV/dt on the MODE pin results in a slow dV/dt for the DC
output offset voltage, resulting in pop-noise free start-up. A time-constant of 500 ms is
sufficient to guarantee pop-noise free start-up (see also Figure4, 5 and 7).
13.3 Output power estimationThe achievable output powers in several applications (SE and BTL) can be estimated
using the following expressions:
SE:
(1)
Maximum current (internally limited to 8 A):
(2)
BTL:
(3)
Maximum current (internally limited to 8 A):
(4)
Variables:= load impedance
fosc= oscillator frequency
tmin= minimum pulse width (typical 150 ns)= single-sided supply voltage (so, if supply is ±30 V symmetrical, then VP =30V)
Po(1%)= output power just at clipping
Po(10%)= output power at THD= 10 %
Po(10%)= 1.24× Po(1%).
13.4 External clockWhen usingan external clock the following accuracyof the duty cycleof the external clock
has to be taken into account: 47.5 %<δ< 52.5 %. o1%()LL 0.4+-------------------- VP 1tmin fosc×– ()××L× -----------------------------------------------------------------------------------------=o 1%()LL 0.8+-------------------- 2VP 1tminfosc×– ()××L× ---------------------------------------------------------------------------------------------=
Philips Semiconductors TDA8920BIf two or more class-D amplifiers are used in the same audio application, it is strongly
recommended that all devices run at the same switching frequency. This can be realized
by connecting all OSC pins together and feed them from an external central oscillator.
Usingan external oscillatoritis necessaryto force pin OSCtoa DC-level above SGNDfor
switching from the internal to an external oscillator. In this case the internal oscillator is
disabled and the PWM willbe switchedon the external frequency. The frequency rangeof
the external oscillator must be in the range as specified in the switching characteristics;
see Section 12.1.
In an application circuit:
Internal oscillator: ROSC connected between pin OSC and VSSA
External oscillator: connect the oscillator signal between pins OSC and SGND; delete
ROSC and COSC.
13.5 Heatsink requirementsIn some applications it may be necessary to connect an external heatsink to the
TDA8920B. Limiting factor is the 150 °C maximum junction temperature Tj(max) which
cannotbe exceeded. The expression below shows the relationship between the maximum
allowable power dissipation and the total thermal resistance from junction to ambient:
(5)
Pdissis determinedby the efficiency (η)of the TDA8920B. The efficiency measuredin the
TDA8920B as a function of output power is given in Figure 21.The power dissipation can
be derived as function of output power (see Figure 20).
The derating curves (given for several values of the Rth(j-a)) are illustrated in Figure8. maximum junction temperature Tj= 150 °C is taken into account. From Figure 8 the
maximum allowable power dissipation for a given heatsink size can be derived or the
required heatsink size can be determined at a required dissipation level.thja–()j max() T amb–diss ------------------------------------=
