TDA7535013TR ,DELTA/SIGMA CASCADE 20 BIT STEREO DACABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Power supplies Digital -0.5 to +4.6 VDDAnalog ..
TDA7540B ,Am/FM Tuner with Stereodecoder and IssFunctional description of the multipath-detector . . 304.3.4 Quality detector . . . 314.3. ..
TDA7540N ,AM/FM car radio tuner IC with stereo decoder and intelligent selectivity system (ISS)electrical characteristics . . . . . . . 25Table 10. Address organization . . . . . 39Ta ..
TDA7541 ,AM/FM car radio tuner IC w stereo decoder and intelligent selectivity systemAbsolute maximum ratings . 10Table 5. Globals 10Table 6. FM section . . . . . ..
TDA7541B ,AM/FM car radio tuner IC w stereo decoder and intelligent selectivity systemAbsolute maximum ratings . 10Table 5. Globals 10Table 6. FM section . . . . . ..
TDA7541W ,AM/FM car radio tuner IC w stereo decoder and intelligent selectivity systemFeatures – IF counter for FM and AM with search stop signal FM part– Quality detector for level, d ..
THS4062IDG4 ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dual 8-SOIC maximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
THS4062IDGN ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dualblock diagramNull128IN− −6OUT3IN+ +Figure 1. THS4061 − Single ChannelVCC281IN− −11OUT31IN++62IN−−72 ..
THS4081CD ,175-MHz Low-Power Voltage-Feedback Amplifiermaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
THS4081CDGN ,175-MHz Low-Power Voltage-Feedback Amplifier SLOS274D − DECEMBER 1999 − REVISED JUNE 2001T ..
THS4081CDGNR ,175-MHz Low-Power Voltage-Feedback Amplifiermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V . . . ..
THS4081CDR ,175-MHz Low-Power Voltage-Feedback Amplifier SLOS274D − DECEMBER 1999 − REVISED JUNE 2001T ..
TDA7535013TR
DELTA/SIGMA CASCADE 20 BIT STEREO DAC
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TDA7535December 2003 20-bit resolution single ended output Analog reconstruction third order Chebyshev filterI2 S input data format On chip PLL System clock: 64 Fs 2 output channels 0.9 VRMS single ended output dynamic 3.3V power supply Reset Sampling rate 36KHz to 48KHz
DESCRIPTIONThe TDA7535 is a stereo, digital-to-analog converter
designed for audio application, including digital inter-
polation filter, a third order multibit Delta-Sigma DAC,
a third order Chebyshev's reconstruction filter and a
differential to single ended output converter. This de-
vice is fabricated in highly advanced CMOS, where
high speed precision analog circuits are combined
with high density logic circuits. The TDA7535, ac-
cording to standard audio converters, can accept any2 S data format.
The TDA7535 is available in SO-14 package. The to-
tal power consumption is less than 75mW.
TDA7535 is suitable for a wide variety of applications
where high performance are required. Its low cost
and single 3.3V power supply make it ideal for sever-
al applications, such as CD players, MPEG audio,
MIDI applications, CD-ROM drives, CD-Interactive,
digital radio applications and so on. An evaluation
board is available to perform measurement and to
make listening tests.
DELTA/SIGMA CASCADE 20 BIT STEREO DAC
BLOCK DIAGRAM
TDA7535 2/8
ABSOLUTE MAXIMUM RATINGSWarning: Operation at or beyond these limit may result in permanent damage to the device. Normal operation is not guaranteed at these
extremes.
THERMAL DATANote:1. In still air
PIN CONNECTIONS (Top view)
PIN FUNCTION
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TDA7535
RECOMMENDED DC OPERATING CONDITIONS
POWER CONSUMPTION
GENERAL INTERFACE ELECTRICAL CHARACTERISTICSNote:1. The leakage currents are generally very small, <1nA. The value given here, 1mA, is the maximum that can occur after an Electro-
static Stress on the pin. Human Body Model.
LOW VOLTAGE CMOS INTERFACE DC ELECTRICAL CHARACTERISTICS
DAC ELECTRICAL CHARACTERISTICS Vdd = 3.3V; Tamb = 25°C; Input signal frequency = sinus wave generated by Audio Precision Sys.2; Input
Signal Amplitude = see notes; Noise Integration Bandwidth = 20Hz to 22KHz (A- weighted)
TDA7535 4/8
Note1: It is the ratio between the maximum input signal and the integration of the in-band noise after deducing the power of signal funda-
mental. It depends on the input signal amplitude. In this case 0dB means full scale digital, 1kHz frequency used.
Note 2: It is the ratio of the rms value of the signal fundamental component at 0dB (full scale digital) to the rms value of all of the harmonic
components in the band.
Note 3: measured using the SNR at -60dB input signal, with 60dB added to compensate for small input signal.
Note 4: Left channel on with 0dB/1kHz input signal, Right channel on with DC input signal.
Figure 1. I2 S interface Diagram
DAC ELECTRICAL CHARACTERISTICS (continued)Vdd = 3.3V; Tamb = 25°C; Input signal frequency = sinus wave generated by Audio Precision Sys.2; Input
Signal Amplitude = see notes; Noise Integration Bandwidth = 20Hz to 22KHz (A- weighted)
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TDA7535
Figure 2. I2 S Timings(1) SCK clock defines the Fs, being the Sample Rate. This input clock needs a jitter below ~212psRMS(2) FSYNC switches inside the time window as specified w.r.t. to falling edge of SCK
Figure 3. Power Up & Reset Sequence2 S bit clock (SCK) must be present 20ms before reset release to allow PLL locking.
TDA7535 6/8
Figure 4. Frequency response
Figure 5.
