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TDA7344PSTMN/a192avaiDIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX
TDA7344SSGS-THOMSONN/a3500avaiDIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX


TDA7344S ,DIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIXELECTRICAL CHARACTERISTICS Ω(refer to the test circuit Tamb =25°C, VS = 9V, RL = 10K ,R = 600Ω, all ..
TDA7345 ,DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIXELECTRICAL CHARACTERISTICS Ω(refer to the test circuit Tamb =25°C, VS = 9V, RL = 10K ,ΩR = 600 , al ..
TDA7345D ,DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIXABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Operating Supply Voltage 11 VST Operating Ambi ..
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TDA7345D ,DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIXELECTRICAL CHARACTERISTICS (refer to the test circuit T = 25°C, V = 9V, R = 10KΩ,amb S LR = 600Ω, ..
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TDA7344P-TDA7344S
DIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX
TDA7344
DIGITAL CONTROLLED AUDIO PROCESSOR
WITH SURROUND SOUND MATRIX STEREO INPUT
VOLUME CONTROLIN 1.25dB STEP
TREBLE AND BASS CONTROL
THREE SURROUND MODES ARE AVAIL-
ABLE: MOVIE, MUSIC AND SIMULATED
FOUR SPEAKER ATTENUATORS:4 INDEPENDENT SPEAKERS CONTROL 1.25dBSTEPS FOR BALANCEFACILITY INDEPENDENTMUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL BUS
DESCRIPTION

The TDA7344isa volume tone (bass and treble)
balance (Left/Right) processor for quality audio
applicationsin car radio and Hi-Fi systems. reproduces surround sound by using phase
shifters anda signal matrix. Controlof all the
functionsis accomplishedby serial bus.
The AC signal settingis obtainedby resistor net-
works and switches combined with operational
amplifiers.
Thanksto the used BIPOLAR/CMOSTechnology,
Low Distortion, Low Noise and DC stepping are
obtained.
February 1997
PIN CONNECTIONS
ORDERING NUMBERS:
TDA7344P (PQFP44)
TDA7344S (SDIP42)
PQFP44
(10X 10)
SDIP42

1/20
BLOCK DIAGRAM
TDA7344

2/20
TEST CIRCUIT
THERMAL DATA
Symbol Description Value Unit

Rth j-pins Thermal Resistance Junction-pins Max. 85 °C/W
QUICK REFERENCE DATA
Symbol Parameter Min. Typ. Max. Unit
Supply Voltage 7 9 10.5 V
VCL Max. input signal handling 2 Vrms
THD Total Harmonic DistortionV= 1Vrmsf= 1KHz 0.02 0.1 %
S/N Signalto Noise RatioVout= 1Vrms (made= OFF) 106 dB Channel Separationf= 1KHz 70 dB
Volume Control 1.25dBstep -78.75 0 dB
Treble Control (2db step) -14 +14 dB
Bass Control (2db step) -14 +14 dB
Balance Control 1.25dB step (LCH, RCH) -38.75 0 dB
Mute Attenuation 90 dB
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
Operating Supply Voltage 11 V
Tamb Operating Ambient Temperature -10to85 °C
Tstg Storage Temperature Range -55to +150 °C
TDA7344

3/20
ELECTRICAL CHARACTERISTICS (referto the test circuit Tamb =25°C,VS= 9V,RL= 10KΩ,= 600Ω, all controls flat(G= 0),Effect Ctrl= -6dB, MODE= OFF;f= 1KHz
unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit

SUPPLY Supply Voltage 7 9 10.5 V Supply Current 20 25 35 mA
SVR Ripple Rejection LCH /RCHout, Mode= OFF 60 80 dB
INPUT STAGE
RII Input Resistance 35 50 65 KΩ
VCL Clipping Level THD= 0.3%;Linor Rin 2 2.5 Vrms
THD= 0.3%; Rin+Lin(2) 3.0 Vrms
CRANGE Control Range 19.68 dB
AVMIN Min. Attenuation -1 0 1 dB
AVMAX Max. Attenuation 18.68 19.68 20.68 dB
ASTEP Step Resolution 0.11 0.31 0.51 dB
VDC DC Steps adjacentatt. step -3 0 3 mV
VOLUME CONTROL
CRANGE Control Range 70 75 dB
AVMIN Min. Attenuation -1 0 1 dB
AVMAX Max. Attenuation 70 75 dB
ASTEP Step Resolution Av=0to -40dB 0.5 1.25 1.75 dB Attenuation Set Error Av=0to -20dB= -20to -60dB
-1.5 1.5 Tracking Error 2dB
VDC DC Steps adjacent attenuation steps
From 0dBtoAv max
BASS CONTROL (1) Control Range Max. Boost/cut +11.5 +14 +16 dB
BSTEP Step Resolution 1 2 3 dB Internal Feedback Resistance 32 44 56 KΩ
TREBLE CONTROL (1) Control Range Max. Boost/cut +13 +14 +15 dB
TSTEP Step Resolution 0.5 2 1.5 dB
EFFECT CONTROL
CRANGE Control Range -21 -6 dB
SSTEP Step Resolution 1 dB
TDA7344

4/20
ELECTRICAL CHARACTERISTICS (continued)
SURROUND SOUND MATRIX
Symbol Parameter Test Condition Min. Typ. Max. Unit

GOFF In-phase Gain (OFF) Mode OFF, Input signalof
1kHz, 1.4 Vp-p,Rin→ Rout
Lin→ Lout
-1.5 0 1.5 dB
DGOFF LR In-phase Gain Difference
(OFF)
Mode OFF, Input signalof
1kHz, 1.4 Vp-p
(Rin→ Rout),(Lin→ Lout)
-1.5 0 1.5 dB
GMOV1 In-phase Gain (Movie1) Moviemode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
Rin→ Rout,Lin→ Lout
7dB
GMOV2 In-phase Gain (Movie2) Moviemode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
Rin→ Rout,Lin→ Lout
8dB
DGMOV LR In-phase Gain Diffrence
(Movie)
Moviemode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
(Rin→ Rout)–(Lin→ Lout)
0dB
GMUS1 In-phase Gain (Music1) Music mode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
(Rin→ Rout)–(Lin→ Lout)
6dB
GMUS2 In-phase Gain (Music2) Music mode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
Rin→ Rout,Lin→ Lout
7.5 dB
DGMUS LR In-phase Gain Difference
(Music)
Music mode, Effect Ctrl= -6dB
Input signalof 1kHz, 1.4 Vp-p
(Rin→ Rout)–(Lin→ Lout)
0dB
LMON1 SimulatedL Output1 Simulated Mode,EffectCtrl= -6dB
Input signalof 250Hz,
1.4 Vp-p,Rin andLin→ Lout
4.5 dB
LMON2 SimulatedL Output2 Simulated Mode,EffectCtrl= -6dB
Input signalof 1kHz,
1.4 Vp-p,Rin andLin→ Lout4.0 dB
LMON3 SimulatedL Output3 Simulated Mode, EffectCtrl=-6dB
Input signalof 3.6kHz,
1.4 Vp-p,Rin andLin→ Lout
7.0 dB
RMON1 SimulatedR Output1 Simulated Mode,EffectCtrl= -6dB
Input signalof 250Hz,
1.4 Vp-p,Rin andLin →Rout4.5 dB
RMON2 SimulatedR Output2 Simulated Mode,EffectCtrl= -6dB
Input signalof 1kHz,
1.4 Vp-p,Rin andLin →Rout
3.8 dB
RMON3 SimulatedR Output3 Simulated Mode,EffectCtrl= -6dB
Input signalof 3.6kHz,
1.4 Vp-p,Rin andLin→ Rout
–20 dB
RLP1 Low Pass Filter Resistance 7.5 10 12.5 KΩ
RPS1 Phase Shifter1 Resistance 13.5 17.95 22.5 kΩ
RPS2 Phase Shifter2 Resistance 0.3 0.4 0.5 KΩ
RPS3 Phase Shifter3 Resistance 13.6 18.08 22.6 KΩ
RPS4 Phase Shifter4 Resistance 13.6 18.08 22.6 KΩ
RHPF High Pass Filter Resistance 45 60 75 KΩ
RLPF LP Pin Impedance 7.5 10 12.5 KΩ
TDA7344

5/20
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Test Condition Min. Typ. Max. Unit

SPEAKER ATTENUATORS
Crange Control Range 35 37.5 40 dB
SSTEP Step Resolution 0.5 1.25 1.75 dB Attenuationset error -1.5 1.5 dB
AMUTE Output Mute Attenuation 80 90 dB
VDC DC Steps adjacentatt. steps
from0to mute
SPEAKER ATTENUATORS AUX
Crange Control Range 70 75 dB
SSTEP Step Resolution Av=0to -40dB 0.5 1.25 1.75 dB Attenuationset error Av=0to 20dB -1.5 0 1.5 dB= -20to -60dB -3 0 2 dB
VDC DC Steps adjacentatt. steps -3 0 3 mV
AMUTE Output Mute Attenuation 80 90 dB
AUDIO OUTPUTS
VOCL Clipping Level d= 0.3% 2 2.5 Vrms
ROUT Output resistance 100 200 300 Ω
VOUT DC Voltage Level 4.2 4.5 4.8 V
GENERAL
NO(OFF) Output Noise (OFF) BW= 20Hzto 20KHz
OutputR andL
Output AUXR andL
μVrms
μVrms
NO(MOV) Output Noise (Movie) Mode =Movie,= 20Hzto 20KHz
Rout and Lout measurement μVrms
NO(MUS) Output Noise (Music) Mode= Music,= 20Hzto 20KHz,
Rout and Lout measurement μVrms
NO(MON) Output Noise (Simulated) Mode= Simulated,= 20Hzto 20KHz
Rout and Lout measurement μVrms Distorsion Av=0;Vin= 1Vrms 0.02 0.1 % Channel Separation 60 70 dB
BUS INPUTS
VIL Input Low Voltage 1V
VIH Input High Voltage 3 V
IIN Input Current -5 +5 μA Output Voltage SDA
Acknowledge= 1.6mA 0.4 0.8 V
Note:
(1)Bassand Trebleresponse: Thecenter frequencyandthe resonance qualitycanbe choosenby
the external circuitry.A standardfirst order bass responsecanbe realizedbya standard feedbacknetwork.
(2)The peack voltageofthetwo inputsignals mustbe less then VS:
(Lin+ Rin)peak•AVin
TDA7344
6/20
2C BUS INTERFACEData transmission from microprocessorto the
TDA7344 and viceversa takes place through the wiresI2C BUS interface, consistingof the two
lines SDA and SCL (pull-up resistorsto positive
supply voltage mustbe connected).
Data Validity shownin fig.3, the dataon the SDA line must stable during the high periodof the clock. The
HIGH and LOW stateof the data line can only
change when the clock signal on the SCL lineis
LOW.
Start and Stop Conditions shownin fig.4a start conditionisa HIGHto
LOW transitionof the SDA line while SCLis
HIGH. The stop conditionisa LOWto HIGH tran-
sitionof the SDA line while SCLis HIGH.
Byte Format
Every byte transferredon the SDA line must con-
tain8 bits. Each byte mustbe followedby an ac-
knowledge bit. The MSBis transferred first.
Acknowledge
The master (μP) putsa resistive HIGH levelon the
SDA line during the acknowledge clock pulse (see
fig. 5). The peripheral (audioprocessor) that ac-
knowledges hasto pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAlineis stable LOW duringthis clock pulse.
The audioprocessor which has been addressed
hasto generatean acknowledge after the recep-
tionof each byte, otherwise the SDA line remains the HIGH level during the ninth clock pulse
time.In this case the master transmitter can gen-
erate the STOP informationin orderto abort the
transfer.
Transmission without Acknowledge
Avoidingto detect the acknowledgeof the audio-
processor, the μP can usea simpler transmission:
simplyit waits one clock without checking the
slave acknowledging, and sends the new data.
This approachof courseis less protected from
misworking and decreases the noise immunity.
Figure3:
Data Validityon theI2 CBUS
Figure4:
Timing DiagramofI2 CBUS
Figure5: Acknowledgeon theI2 CBUS
TDA7344

7/20
INTERFACE FEATURES Dueto the fact that the MSBis usedto select the byte transmittedisa subaddress (func-
tion)ora data (value), betweena start and
stop condition,is possibleto receive, how
many subaddressesand datasas wanted. The subaddress (function)is fixed untila new
subaddressis transmitted, so the TDA7344
can receive how many dataas wantedfor the
selected subaddress (without the need fora
new start condition)If TDA7344 receivesa subaddress with the
LSB=1 the incremental busis selected,soit
entersina loop condition that means that
every acknowledge will increase automat-
ically the subaddress (function) andit re-
ceives the data relatedto the new subad-
dress.
EXAMPLES
NO INCREMENTAL BUS
TDA7344 receivesa start condition, the correct
chip address,a subaddress with the LSB=0 (no
incremental bus), N-datas (all these datas con-
cern the subaddress selected),a new subad-
dress, N-data,a stop condition.it can receiveina single transmission how
many subaddress are necessary, and for each
subaddresshow many data are necessary. INCREMENTAL BUS
TDA7344 receivesa start condition, the correct
chip addressa subaddress with the LSB=1 (in-
cremental bus): nowitisina loop condition with autoincreaseof the subaddress.
The first data thatit receives doesn’t concern the
subaddress sended but the next one, the second
one concerns the subaddress sended plus twoin
the loop etc, andat the endit receives the stop
condition. the pictures there are some examples:= start CHIP ADDRESS 80 (HEX) 82 (HEX)
ACK= acknowledge=1 incremental bus,B=0no incremental bus= stop
SOFTWARE SPECIFICATION

InterfaceProtocol
The interface protocol comprises: start condition(s) chip address byte, containing the TDA7344
address (the 8thbitof the byte mustbe 0). The
TDA7344 must always acknowledgeat the end each transmitted byte. subaddress (function) bytes (identifiedby the
MSB=0) sequenceof dates and subaddresses (N
bytes+ achnowledge. The dates are identified MSB=1, subaddressesby MSB=0) stop condition (P) one subaddress, withn data concerning that subaddress (no incremental bus)
ACK= Achnowledge= Start= Stop
TDA7344

8/20
MSB LSB SUBADDRESS A1 A2 A3 B
0000 X X X B VOLUME ATTENUATION&
LOUDNESS
0100 X X X B SURROUND& OUT&
EFFECT CONTROL
0010 X X X B BASS
0110 X X X B TREBLE
0001 X X X B ATT SPEAKERR
0101 X X X B ATT SPEAKERL
0011 X X X B ATT. ROUT AUX
01110 X X B ATT. LOUT AUX
01111 X X B INPUT STAGE CONTROL=1 yes incremental bus;=0 no incremental bus;= indifferent 0,1
The first byte select the function,itis identifiedby the MSB=0
DATA BYTES

FUNCTION SELECTION
FIRST BYTE (subaddress) one subaddress, (with incrementalbus), withn data (data1 that concerns subaddress +1, data2
that concerns subaddress+2 etc.) more subaddress with more data
TDA7344

9/20
VOLUME ATTENUATION
MSB LSB 1.25dB STEPS
000 0 0 0 1 -1.25 0 1 0 -2.50 0 1 1 -3.75 1 0 0 -5.00 1 0 1 -6.25 1 1 0 -7.50 1 1 1 -8.75dB STEPS 000 0 001 -10 010 -20 011 -30 100 -40 101 -50 110 -60 111 -70
SELECTION LOUDNESS
ON OFF
ATT AUX OUT1 AND2
MSB LSB 1.25dB STEPS
000 0 0 0 1 -1.25 0 1 0 -2.50 0 1 1 -3.75 1 0 0 -5.00 1 0 1 -6.25 1 1 0 -7.50 1 1 1 -8.75dB STEPS 000 0 001 -10 010 -20 011 -30 100 -40 101 -50 110 -60 111 -70
MUTE
OFF ON
VALUE SELECTION

The second byte select the value,itis identifiedby the MSB=1
TDA7344

10/20
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