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TDA7317
FIVE BANDS DIGITAL CONTROLLED GRAPHIC EQUALIZER
TDA7317FIVE BANDS DIGITAL CONTROLLED GRAPHIC EQUALIZER
VOLUME CONTROL IN 0.375dB STEP
FIVE BANDS STEREO GRAPHIC EQUAL-
IZER
CENTER FREQUENCY, BANDWIDTH, MAX
BOOST/CUT DEFINED BY EXTERNAL COM-
PONENTS
±14dB CUT/BOOST CONTROL IN 2dB/STEP
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL BUS
VERY LOW DISTORTION
VERY LOW NOISE AND DC STEPPING BY
USE OF A MIXED BIPOLAR/CMOS TECH-
NOLOGY
DESCRIPTIONThe TDA7317 is a monolithic, digitally controlled
graphic equalizer realized in BiCMOS mixed technol-
ogy. The stereo signal, before any filtering, can be at-
tenuated up to -17.625dB in 0.375dB step.
All the functions can be programmed via serial
bus making easy to build a μP controlled system.
Signal path is designed for very low noise and distor-
tion.
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
PIN CONNECTION
ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VS = 9V, RL = 10KΩ, Rg = 600Ω, f = 1KHz VIN =
1Vrms, all controls in flat position (AV = 0dB) unless otherwise specified).
SUPPLY
TDA7317
ELECTRICAL CHARACTERISTICS (continued)INPUT
VOLUME CONTROL
GRAPHIC EQUALIZER
AUDIO OUTPUTS
BUS INPUTS
ADDRESS PIN (Internal 50KΩ pull down resistor)
NOTE: The input is grounded thru the 2.2μP capacitors
TDA7317
DEVICE DESCRIPTION
The TDA7317 is a five bands, digitally controlled
stereo Graphic Equalizer.
The device is intended for high quality audio ap-
plication in Hi-Fi, TV and car radio systems where
feature like low noise and THD are key factors. A
mixed Bipolar Cmos Technology allows:
Cmos analog switches for pop free commuta-
tions, high frequency op.amp. (GWB = 10MHz)
and high linearity polisilicon resistor for THD =
0.01 (at Vin = 1Vrms) and a S/N ratio of 102dB.
The internal Block Diagram is shown on page 1.
The first stage is a volume control. The control
range is 0 to -17.625dB with 0.375dBstep.
The very high resolution (0.375dB step) allows
the implementation of closed loop amplitude con-
trol system completely free from any acustical ef-
fect (stepping variation and pumping effect).
The volume control is followed by a serial five
bands equalizer. Each filtering cell is the biquad
cell shown in fig. 1
The internal resistor string is fixing the boost/cut
value while the buffer makes the Q (quality factor)
and central frequency, set by external compo-
nents, fully indipendent from the internal resistors.
Each filtering cell is realized using only 4 external
components (2 capacitors and 2 resistors) allow-
ing a flexible selection of centre frequency fo, Q
factor and gain. Here below the basic formulae
and the key features of each band pass filter are
reported:
fo = center frequency
Gv = gain/loss at the center frequency fo
Gv = 20log(Av)
Q = fo
f2 − f1
where f2, f1 = 3dB Bandwidth limits.
Av = (R2 ⋅ C2 ) + (R2 ⋅ C1 ) + (R1 ⋅ C1 )
(R2 ⋅ C1 ) + (R2 ⋅ C2 )
Q = √ (R1 ⋅ C1 ⋅ R2 ⋅ C2 )
(R2 ⋅C1 ) + (R2 ⋅ C2 )
fo = 1
2π ⋅ √ (R1 ⋅ R2 ⋅ C1 ⋅ C2)
If C1 is fixed, then:
C2 = Q2
Av − 1 − Q2 ⋅ C1
R2 = 1
2 π ⋅ C1 ⋅ fo ⋅ (Av −1 ) ⋅ Q
(Av − 1 − Q2)
R1 = (Av − 1)2
Av − 1 − Q2 ⋅ R2
Likewise, the components’values can be deter-
mined by fixing one of the other three parameters.
Referring to fig. 1 the suggested R2 value should
be higher than 2KΩ in order to have a good THD
(internal op. amp. current limit).
Viceversa the R1 value should be equal or lower
than 51KΩ in order to keep the "click"(DC step)
very low.
A typical application is shown by fig. 2
Fig. 1
TDA7317
Figure 2: Application Circuit The five bands graphic equalizer is used in con-
junction with a TDA7318 (or another audioproces-
sor of the SGS-THOMSON 731X family).
The audioprocessor bass and treble tone can fur-
nish two extra filter bands.
Application requiring higher number of external
equalizer bands could be implemented by cas-
cading 2 or more TDA7317 devices. In fact the
dedicated ADDR pin allows 2 addresses selec-
tion. Anyway, the address of the graphic equalizer
is different from the audioprocessor one.
For example 11 bands are implemented by use of
2 TDA7317 plus an audioprocessor (TDA731X
family).
In case one filtering cell is not needed, a short cir-
cuit must be provided between the P1xy and
P2xy pins.
TDA7317
