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TG2006F ,GaAs Linear Integrated Circuit GaAs Monolithic 1.9 GHz Band Power Amplifier PHS, Digital Cordless TelecommunicationElectrical Characteristics (V = 3 V, V = (Note2), f = 1.9 GHz, Ta = 25°C, Z = Z = 50 Ω, 1/2 duty op ..
TG2200AF ,RF Cell PacksFEATURES0 LOW INSERTION LOSS : Loss=0.5dB (Typ.)0 HIGH ISOLATION : |SL=25dB (Typ.). CUNIRUL VULIAGI ..
TG2204F ,1.9GHz BAND ANTENNA SWITCH (PHS DIGITAL CORDLESS TELEPHONE)FEATURESo LOWINSERTION LOSS : Loss=0.5dB(Typ.)O HIGHTISOLATION : |SL=25dB(Typ.)O (ONTROI \IOITAGF . ..
TDA5201
ASK Single Conversion Receiver
Wireless Components
ASK Single Conversion Receiver
TDA 5201 Version 1.5
Specification July 2004
Edition 07.04
Published by Infineon Technologies AG,
Balanstraße 73,
81541 München© InfineonTechnologiesAG July 2004.
All Rights Reserved.
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InfineonTechnologiesAG.A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-
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fail, it is reasonable to assume that the health of the user may be endangered.
Product Info
Product Info
General DescriptionThe IC is a very low power consump-
tion single chip ASK Single Conver-
sion Receiver for receive frequencies
between 310 and 350MHz. The
Receiver offers a high level of integra-
tion and needs only a few external
components. The device contains a
low noise amplifier (LNA), a double
balanced mixer, a fully integrated
VCO, a PLL synthesiser, a crystal
oscillator, a limiter with RSSI genera-
tor, a data filter, a data comparator
(slicer) and a peak detector. Addition-
ally there is a power down feature to
save battery life.
Features-Low supply current
(Is = 4.6mA typ.)Supply voltage range 5V ±10%Power down mode with very low
supply current (50nA typ)Fully integrated VCO and PLL
SynthesiserRF input sensitivity < –110dBmSelectable frequency ranges
around 315 MHz and 345 MHzSelectable reference frequencyLimiter with RSSI generation,
operating at 10.7MHz2nd order low pass data filter with
external capacitorsData slicer with self-adjusting
threshold
Application-Keyless Entry SystemsRemote Control SystemsFire Alarm SystemsLow Bitrate Communication
Systems
Ordering Informationavailable on tape and reel
Table of ContentsTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12.1Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2.2Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2.3Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2.4Package Outlines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
3.1Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
3.2Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
3.3Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.4Functional Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4.1Low Noise Amplifier (LNA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4.2Mixer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4.3PLL Synthesizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4.4Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.4.5Limiter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.4.6Data Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.4.7Data Slicer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.4.8Peak Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.4.9Bandgap Reference Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
4.1Choice of LNA Threshold Voltage and Time Constant. . . . . . . . . . . . . . . . . . . . . . . . . . . .2
4.2Data Filter Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
4.3Quartz Load Capacitance Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
4.4Quartz Frequency Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4.5Data Slicer Threshold Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
5.1Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
5.1.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
5.1.2Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
5.1.3AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
5.2Test Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
5.3Test Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
5.4Bill of Materials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
5.5Appendix - Noise Figure and Gain Circles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Product Description2.1Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.2Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.4Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
Product Description
2.1OverviewThe IC is a very low power consumption single chip ASK Superheterodyne
Receiver (SHR) for the frequency bands 315 and 345MHz. The SHR offers a
high level of integration and needs only a few external components. The device
contains a low noise amplifier (LNA), a double balanced mixer, a fully integrated
VCO, a PLL synthesiser, a crystal oscillator, a limiter with RSSI generator, a
data filter, a data comparator (slicer) and a peak detector. Additionally there is
a power down feature to save battery life.
2.2ApplicationKeyless Entry SystemsRemote Control SystemsFire Alarm SystemsLow Bitrate Communication Systems
2.3FeaturesLow supply current (Is = 4.6mA typ.)Supply voltage range 5V ±10%Power down mode with very low supply current (50nA typ.)Fully integrated VCO and PLL SynthesiserRF input sensitivity < –110dBmSelectable receive frequency bands 315 and 345MHzSelectable reference frequencyLimiter with RSSI generation, operating at 10.7MHz2nd order low pass data filter with external capacitorsData slicer with self-adjusting threshold
2.4
Functional Description3.1Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
3.2Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.3Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-9
3.4Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
Functional Description
3.1Pin ConfigurationPin_Configuration_5201_V1.4.wmf
Figure 3-1IC Pin Configuration
Functional Description
3.2Pin Definition and Function
Functional Description
Functional Description
Functional Description
Functional Description
Functional Description
Functional Description
3.3Functional Block DiagramFunction_5200.wmf
Figure 3-2Main Block Diagram
Functional Description
3.4Functional Blocks
3.4.1Low Noise Amplifier (LNA)The LNA is an on-chip cascode amplifier with a voltage gain of 15 to 20dB. The
gain figure is determined by the external matching networks situated ahead of
LNA and between the LNA output LNO (Pin 6) and the Mixer Inputs MI and MIX
(Pins 8 and 9). The noise figure of the LNA is approximately 2dB, the current
consumption is 500µA. The gain can be reduced by approximately 18dB. The
switching point of this AGC action can be determined externally by applying a
threshold voltage at the THRES pin (Pin 23). This voltage is compared internally
with the received signal (RSSI) level generated by the limiter circuitry. In case
that the RSSI level is higher than the threshold voltage the LNA gain is reduced
and vice versa. The threshold voltage can be generated by attaching a voltage
divider between the 3VOUT pin (Pin 24) which provides a temperature stable
3V output generated from the internal bandgap voltage and the THRES pin as
described in Section 4.1. The time constant of the AGC action can be deter-
mined by connecting a capacitor to the TAGC pin (Pin 4) and should be chosen
along with the appropriate threshold voltage according to the intended operat-
ing case and interference scenario to be expected during operation. The opti-
mum choice of AGC time constant and the threshold voltage is described in
Section 4.1.
3.4.2MixerThe Double Balanced Mixer downconverts the input frequency (RF) in the
range of 310-350MHz to the intermediate frequency (IF) at 10.7MHz with a vol-
tage gain of approximately 21dB by utilising either high- or low-side injection of
the local oscillator signal. In case the mixer is interfaced only single-ended, the
unused mixer input has to be tied to ground via a capacitor. The mixer is fol-
lowed by a low pass filter with a corner frequency of 20MHz in order to suppress
RF signals to appear at the IF output (IFO pin). The IF output is internally con-
sisting of an emitter follower that has a source impedance of approximately
330Ω to facilitate interfacing the pin directly to a standard 10.7MHz ceramic filter
without additional matching circuitry.
3.4.3PLL SynthesizerThe Phase Locked Loop synthesizer consists of a VCO, an asynchronous
divider chain, a phase detector with charge pump and a loop filter and is fully
implemented on-chip. The VCO is including spiral inductors and varactor
diodes. The FSEL pin (Pin11) has to be left open. The tuning range of the VCO
was designed to guarantee over production spread and the specified tempera-
ture range a receive frequency range between 310 and 350MHz depending on
whether high- or low-side injection of the local oscillator is used. The oscillator
signal is fed both to the synthesiser divider chain and to a divider that is dividing
Functional Descriptionthe signal by 2 before it is applied to the downconverting mixer. Local oscillator
high side injection has to be used for receive frequencies between approxi-
mately 310 and 330 MHz, low side injection for receive frequencies between
330 and 350MHz - see also Section 4.4..
3.4.4Crystal OscillatorThe on-chip crystal oscillator circuitry allows for utilisation of quartzes both in
the 5 and 10MHz range as the overall division ratio of the PLL can be switched
between 64 and 128 via the CSEL (Pin 16 ) pin according to the following table.
The calculation of the value of the necessary quartz load capacitance is shown
in Section 4.3, the quartz frequency calculation is expained in Section 4.4.
3.4.5LimiterThe Limiter is an AC coupled multistage amplifier with a cumulative gain of
approximately 80dB that has a bandpass-characteristic centred around
10.7MHz. It has an input impedance of 330 Ω to allow for easy interfacing to a
10.7MHz ceramic IF filter. The limiter circuit acts as a Receive Signal Strength
Indicator (RSSI) generator which produces a DC voltage that is directly propor-
tional to the input signal level as can be seen in Figure 4-2. This signal is used
to demodulate the ASK receive signal in the subsequent baseband circuitry and
to turn down the LNA gain by approximately 18dB in case the input signal
strength is too strong as described in Section 3.4.1 and Section 4.1.
3.4.6Data FilterThe data filter comprises an OP-Amp with a bandwidth of 100kHz used as a
voltage follower and two 100kΩ on-chip resistors. Along with two external
capacitors a 2nd order Sallen-Key low pass filter is formed. The selection of the
capacitor values is described in Section 4.2.
Functional Description
3.4.7Data SlicerThe data slicer is a fast comparator with a bandwidth of 100 kHz. This allows
for a maximum receive data rate of approximately 120kBaud. The maximum
achievable data rate also depends on the IF Filter bandwidth and the local oscil-
lator tolerance values. Both inputs are accessible. The output delivers a digital
data signal (CMOS-like levels) for the detector. The self-adjusting threshold on
pin 20 its generated by RC-term or peak detector depending on the baseband
coding scheme. The data slicer threshold generation alternatives are described
in more detail in Section 4.5.
3.4.8Peak DetectorThe peak detector generates a DC voltage which is proportional to the peak
value of the receive data signal. An external RC network is necessary. The out-
put can be used as an indicator for the signal strength and also as a reference
for the data slicer. The maximum output current is 500µA.
3.4.9Bandgap Reference CircuitryA Bandgap Reference Circuit provides a temperature stable reference voltage
for the device. A power down mode is available to switch off all subcircuits which
is controlled by the PWDN pin (Pin 27) as shown in the following table. The sup-
ply current drawn in this case is typically 50nA.
Applications4.1Choice of LNA Threshold Voltage and Time Constant. . . . . . . . . . . .4-2
4.2Data Filter Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4
4.3Quartz Load Capacitance Calculation . . . . . . . . . . . . . . . . . . . . . . . .4-5
4.4Quartz Frequency Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6
4.5Data Slicer Threshold Generation . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7
Applications
4.1Choice of LNA Threshold Voltage and Time ConstantIn the following figure the internal circuitry of the LNA automatic gain control is
shown.
LNA_autom.wmf
Figure 4-1LNA Automatic Gain Control Circuitry
The LNA automatic gain control circuitry consists of an operational transimped-
ance amplifier that is used to compare the received signal strength signal
(RSSI) generated by the Limiter with an externally provided threshold voltage
Uthres. As shown in the following figure the threshold voltage can have any
value between approximately 0.8 and 2.8V to provide a switching point within
the receive signal dynamic range.
This voltage Uthres is applied to the THRES pin (Pin 23) The threshold voltage
can be generated by attaching a voltage divider between the 3VOUT pin
(Pin 24) which provides a temperature stable 3V output generated from the
internal bandgap voltage and the THRES pin. If the RSSI level generated by the
Limiter is higher than Uthres, the OTA generates a positive current Iload. This
yields a voltage rise on the TAGC pin (Pin 4). Otherwise, the OTA generates a
negative current. These currents do not have the same values in order to
achieve a fast-attack and slow-release action of the AGC and are used to
charge an external capacitor which finally generates the LNA gain control volt-
age.
