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TC9298F
LCD DRIVER WITH ON-CHIP KEY INPUT
TOSHIBA TC9298F/FB
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC9298F, TC9298FB
LCD DRIVER WITH ON-CHIP KEY INPUT
TC9298F and TC9298FB is an LCD driver with on-chip key TC9298F
input, which is controlled using serial data.
FEATURES
It Supports switching between 1/4 and 1/8 duty and 1/3
and 1/4 bias.
0 Displays up to 176 segments in 1/4 duty mode; up to QFP64-P-1414-0.80A
320 segments in 1/8 duty mode. TC9298FB
o All display segments can be turned on or off. Outputs
from the S40 to S43 pins can be switched between
segment output and LED driver output.
It Supports input from 28 keys as standard. Externally
connecting diodes supports input from up to 56 keys.
o Four-wire configuration employed for connecting to the
controller.
QFP64-P-1212-0.65
Weight
QFP64-P-1414-0.80A: 1.10g (Typ.)
QFP64-P-1212-0.65 : 0.45g (Typ.)
1 2001-06-19
TOSHIBA TC9298F/FB
PIN CONNECTION
Ln V m N '" O tyt CO rs tD ID V m N F C)
m m m M m m N N N N N N N N N N
US v, m V3 V) VT v, v, V) (D v, V3 V3 v, m V)
"r'Tr'Tr'Tr'Tr'Tr'Tr'TrTr'tr'Tr'Tr'Tr'Tr'Trt
00 Ps KO ln V m N '- C) Gh 00 Ps ED Ln V M
V V V V V V V V V m m m m m m on
$35!: 49 . 32 U519
LCD driver out ut
$37!: 50 p 31 asu,
$38!: 51 30 5317
539: 52 29 El516
S40/OT3E 53 28 asus
541/017: 54 General-purpose 27 :514
s /OT1 55 26 S13
42 E output TOP VIEW as
543/0T0I: 56 QFP 64PIN 25 12
GNDE 57 24 5311
oscl: 58 23 5510
VDDI: 59 22 359
WI: 60 21 Elsa
DOUTE 61 20 as;
'3an 62 Serial interface 19 ass
cm 63 18 ass
CEE 64 0 Key IIO 17 D54
I II 0 F N M V Ln ©
F N m 'ct Ln u: Ps co m P F F F F '- F
UUUUUUDUUUUUDUUU
F'i--Cf'r'i-'j(-''f,-'l2ig9ri'i's91''i'i1'
U U U U U U U U
2, l": R ii,
(A (/3 (A (A
2 2001-06-19
TOSHIBA TC9298F/FB
BLOCK DIAGRAM
o F N m
tltlt.'.t.'. mcpe
r~m
53555533 q sr,hiiri"-,irj?,'s
Ct0000000 mmmmwm
. General- ur ose out ut/
Common output Segment driver output p p p
control data latch
Segment data latch
LCD timing
Serial interface
40-bit serial data shift register
Oscillator/divider circuit OSC
56-bit key data latch Key scan timing
3 2001-06-19
TOSHIBA
TC9298F/FB
PIN FUNCTION
SYMBOL
PIN NAME
FUNCTION
REMARKS
Power pin
Ground pin
Power is applied to these pins. Normally 5V
is supplied. Power-on reset resets system at
power on or VDD<2.0V (typical).
Key scan I/O pins
Key scan signal I/O pins. Data can be
input from 28 keys (standard) by a key
matrix with other key scan I/O pins.
Connecting external diodes enables data to
be input from up to 56 keys.
At a fixed cycle, a pin is set to output and
the other pins are set to input. The pin set
to output outputs high level ; the others
are pulled down to low level by built-in
pull-down resistors.
Common output pins
So/COMS
$3/COM8
Segment output pins
/common output pins
Common signal output pins for LCD.
When set to 1/4 duty, can display up to
176 segments by a key matrix of COM1 to
COM4 and So to S43 ; when set to 1/8
duty, can display up to 320 segments by a
key matrix of COM1 to COM8 and S4 to
When set to 1/8 duty, So to S3 are used
as COMS to COM8.
Segment output pins
S40 / 0T3
S43 / 0T0
Segment output pins
/genera|-purpose
output pins
Segment signal output pins for LCD.
When set to 1/4 duty, can display up to
176 segments by a key matrix of COM1 to
COM4 and So to S43 ; when set to 1/8
duty, can display up to 320 segments by a
key matrix of COM1 to COM8 and S4 to
S40 to S43 are also used as general-
purpose output pins.
When set to general-purpose output, $40
to S43 output CMOS outputs.
CR oscillator pin
Connecting C and R generates the system
clock. The oscillation frequency is
expressed as follows :
fosc'=.1.41/(C-R)[Hz]
For example, where C=0.01PF and
R=27kQ
fosce.5.22kHz
2001 -06-1 9
TOSHIBA
TC9298F/FB
SYMBOL
PIN NAME
FUNCTION
REMARKS
Reset input pin
Reset signal input pin for device system
reset.
While the 'ttjr input is at low level, stops
the oscillator, resetting all internal data. At
the same time, fixes the LCD output pins
to low level.
Since the power-on reset circuit is
incorporated, for normal use, connect the
RST pin to VDD.
Data output pin
Data input pin
Clock input pin
Chip enable input
Serial interface pins.
Used to transfer to and from the
controller, display data, key input data,
and data for controlling these data.
While the CE pin is at low level, disables
data transfer. Setting the CE pin to high
level inputs or outputs data to or from the
DIN/DOUT pin in sync with the clock input
to the CK pin.
All input pins incorporate Schmitt circuits.
The DOUT pin is N-channel open drain
output.
2001 -06-1 9
2001 -06-1 9
0 THE CONTENTS OF ADDRESS DATA
CAN BE
DUTY OMITTED
ADDRESS
Do D1 Dz D3 04 05 05 Dy
Da~D11 D12~D15 016~Dza 029~039
$9 to 50 display data
57 56 Ss~So
COM4 I COM3 I comz I COM1 com | COMB I com I com
COMA, 3, 2, 1 COM4, 3, 2, 1 COM4, 3, 2, 1
$19 to 510 display data
S19 513
517 S16 S15~51o
cow Icoma I com: I com com I com I com I com
COM4. 3. 2, 1 COMd, 3, 2. 1 COM4, 3, 2, 1
$29 to 520 display data
$39 to 530 display data
543 to S40 display data
Input prohibited
58 to 54 display data
S7 55~S4
COMB I am I COM6 I COMS I com I COMB I COMZ I com
COM8, 7, 6, 5, 4, 3, 2, 1 COM8~COM1
$13 to 59 display data
s12 S11~59
COMB I com I come; I COM5 I com I COM3 I COMZ I com
COMB, 7, 6, S, 4, 3, 2, 1 COM8~COM1
$13 to 514 display data
$23 to 519 display data
$23 to $24 display data
533 to 529 display data
538 to 534 display data
OPOv-Ov-
.-ettDm-.-
C9CP---e
OOOOOO
'Ntrt%ttfturps
543 to $39 display data
Segment/ general-purpose output
switching
543/01'oI542/on IS41IOT2 IS4o/0T3
Input prohibited
Display control General-purpose output control
LT I BL I OP 0T0 I on I 012 I 0T3
Input prohibited
Key data output
KON I K01 I K02 I K03 I K04 I K05 I Kos I K07 I
K08~K11 I K12~K1s I K12~K15 defined
Expanded key data output
KON I K29 I K30 I K31 I K32 I K33 I K34 I K35 I
K36~K39 I K40~K43 IK44~K56 defined
TC9298F/FB - 6
TOSHIBA
TC9298F/FB
TOSHIBA TC9298F/FB
DESCRIPTION OF OPERATION
l. Display and Control Data Input Format
It The display and control data input timing is as follows.
I/s min 2ps min I/s min 1,us min
CK -L - - -
Ips min
LSB MSB
DIN 1si3c3c3giie3e2iii,eu3oSksSie2kuish Ds CCCEs)(E)(E)a)(E9)C
Timing ca: be omitted Input:ddress 1,115 max
Display - - - - E
data - - -
* Don't care
0 Set all display data bits for outputting the segments to be used.
0 The display data for outputting unused segments need not be set, but only on the LSB
0 At input the DOUT pin goes to high impedance.
(Example) At 1/4 duty, if the address for setting the data is set to OH, segment output pins
from so to S8 are used and S9 is not, the S9 display data can be omitted as shown
below.
CE .... I-
"LrLrLrLfifVLfVlllnlllLf"
A0 A1 A2 A3 D4 D5 De D7 D8 ... D37 D38 D39
DIN Iololol o Is8c4lsiscals8c2ls8c1ls7c4l ... ls0c3ls0c2ls0c1l
7 2001-06-19
TOSHIBA TC9298F/FB
(1) Display Control Data Bit
This bit sets the display on/off. In accordance with the setting, the waveform corresponding
to display on/off is output to a segment output pin. Setting the bit to 1 outputs display on
waveform; setting the bit to 0, display off waveform.
First specify an address from 0H~4H at 1/4 duty or an address from 0H~7H at 1/8 duty,
then set the data for each segment in sequence, starting from the segment's upper bit.
If any segments remain unused, the data settings can be omitted from the highest segment
output pins.
0 Display off
1 Display on
(Note) After a reset these data are undefined.
(2) Duty Control Bit (DUTY)
The DUTY bit controls the switching between 1/4 and 1/8 duty. Setting this bit to 0 selects
1/4 duty; to 1 selects 1/8 duty.
Selecting 1/4 duty switches the S0/COM5-S3/COM8 pins to segment output pins SO~S3.
Selecting 1/8 duty switches the S0/COMr-S3/COM8 pins to common output pins
COMFCOM8.
To set the data, specify the address as 8H.
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7
Address8Hl0l0l0l1l IOIOIDUTYI I I I I
(Note) 0 1/4 DUTY, 1/3 BIAS
1 1/8 DUTY,1/4 BIAS
(Note) After a reset these data are cleared to 0.
8 2001-06-19
TOSHIBA TC9298F/FB
(3) Bias Resistance Control Bit (RBIAS)
This bit controls the resistance (RBIAS) value for generating the bias voltage.
At 1/4 duty and 1/3 bias, writing 0 to the bit sets RBIAS=4kQ, while writing 1 to the bit
sets RBIAS = 2kf1.
At 1/8 duty and 1/4 bias, writing 0 to the bit sets RBIAS=2kQ, while writing 1 to the bit
sets RBIAS=1kQ.
To set the data, specify the address as 9H.
If setting RBIAS to 0 increases the noise on the LCD driver output waveform and adversely
affects the display, set RBIAS to 1 to reduce the noise.
AddressQHI10AI 0 IA 0 I2A13IRB|A5I I I I I I I I
DUTY LCD DRIVER MODE RBIAS RBIAS RESISTANCE (TYP.)
0 1/4 DUTY 0 4kQ (x3)
1/3 BIAS 1 2kQ (x3)
1 1/8 DUTY 0 2kf1 (x4)
1/4 BIAS 1 1k!) (x4)
DUTY -
Frame signal I:
(Configuration of Bias Circuit)
l; RBIAS
Bias output
£1 1:1
(Note) After a reset these data are cleared to 0.
9 2001-06-19
TOSHIBA TC9298F/FB
(4) All-on/All-off Control Bits (BL/LT)
The BL/LT bits turn each display to alI-on or all-off. Setting both bits to O outputs standard
display data to each segment output pin. Setting BL to 1 outputs the display off waveform to
all the segment output pins. Setting BL to 1 outputs the display on waveform to all the
segment output pins.
When all-on or alI-off is set, the previous display data are held. There is no need to set the
display data again. New data can also be set during the all-on or all-off states.
To set the data, specify the address as 9H.
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7
Address 9H 1 0 0 1 LT BL
LT BL DISPLAY
(Note 1) Standard display
All on
1 All off (Note 2)
(Note 1) After a reset these data are cleared to 0.
(Note 2) When BL and LT are both set to 1, BL takes priority.
(5) Operation Control Bit (OP)
The OP bit starts/stops the LCD driver and key scan functions.
Setting OP to 0 stops the oscillation and fixes the LCD driver output pins and the key scan
input/output pins to Low.
After operations are turned off, the previous data of all data bits are held. New data can also
be set while the operations are off.
A reset clears the OP bit to 0 and turns off the LCD driver and key scanner operations. While
the operations are off, initialize the control data and display data.
To set the data, specify the address as 9H.
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7
Address 9H I 1 I 0 I 0 I 1 I I I I OP I I I I I
(Note) 0 Operations off
1 Operations on
(Note) After a reset these data are cleared to 0.
10 2001-06-19
TOSHIBA TC9298F/FB
(6) External Clock Input Control Bit (EX-OSC)
The EX-OSC bit selects oscillator operation or external clock input.
Setting this bit to 0 operates the oscillator circuit with external CR.
Setting the bit to 1 sets the OSC pin as a CMOS input pin with Schmitt circuit and inputs an
external clock as the system clock. Use this pin at such times as when using an output clock
from a microcontroller.
To set the data, specify the address as 8H.
A0 A1 A2 A3 Do D1 D2 D3 D4 D5 D6 D7
AddressSHI 0 I 0 I 0 I 1 IEX-OSCI o I 0 I I I I I I
(Note) 0 CR oscillation
1 External clock
(Note) After a reset these data are cleared to 0.
(7) Segment/GeneraI-Purpose Output Switching Bits (S43/OT0~S40/0T3) and
General-Purpose Output Control Bits (OT0--OT3)
The segment/general-purpose output switching bits switch between segment output and
general-purpose output. Setting 0 selects segment output; setting 1 selects general-purpose
output. When segment output is selected, a display on/off waveform corresponding to the
display data is output. When general-purpose output is selected, the general-purpose output
control bit sets the output status.
Setting the general-purpose output control bit to 0 outputs Low. Setting the bit to 1 outputs
When segment output is selected, the corresponding general-purpose output control data are
invalid. When general-purpose output is selected, the corresponding segment output display
data are invalid.
To set the segment/general-purpose output switching bits, specify the address as 8H.
To set the general-purpose output control bits, specify the address as 9H.
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7
Address 8H I o I 0 I o I 1 I I 0 I 0 I IS36/OT3 I S37/OT2 I S38/OT1 IS39/OTOI
(Note) 0 Segment output
1 General-purpose output
A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7
AddressQHI 1 I o I o I 1 I I I I I 0T3 I 0T2 I 0T1 I 0T0 I
(Note) 0 "L" output
1 "H" output
(Note) After a reset these data are cleared to O.
11 2001-06-19
TOSHIBA TC9298F/FB
(8) Key Data Bits (KON, K01~K56)
These are the key data bits of the key matrix. The KON bit shows whether the key input is
on or off. The K01~K55 bits, each corresponding to a key, show which key is being pressed.
Key input sets KON to 1. No key input sets KON to 0. A key input corresponding to K01--K56
sets the relevant Kor-k56 bit to 1. No key input corresponding to K01~K55 sets the relevant
K01--K56 bit to 0.
KON bit
0 No key input
1 Key input
K0--K56 bits
0 No key input
1 Key input
(Note) After a reset these data are undefined.
12 2001-06-19
TOSHIBA TC9298F/FB
2. Data Output Mode (Key Data)
(1)The key data are output at the following timing.
ck-Ll-Ll/lv/f-LI 1rLrLrLrLC--LrLrLrLt
DIN nnaamum A3 CCC.""--."
u JV J
Timing can be omitted Output address Ips max("L" level) By pulI-up resistors
("H" level)
DOUT (High impedance) Do D1 D2 D3 D4 D5 D24 @%@W
Shift register preset KON K01 /K29 K28/K56
(2) Structure of key matrix
One of two matrices can be selected for the key matrix .' a matrix with up to 28 keys without
any external components, or a matrix with up to 56 keys with external diodes.
Structure of key matrix
(Structure 1) (Structure 2)
KTo KT1 KT2 KT3 KT4 KT5 KT6 KT7
(,yisiy,iyiy),
KTo KT1 KT2 KT3 KT4 KT5 KT6 KT7
9 Q (:5)
$919191
‘ Q Q Q
Co?, GP
When a key is input, KON is set to 1.
Setting the CE pin to 1 then to 0 after address input sets the DOUT pin to output. With
DOUT in an output state, the KON bit can be monitored by halting the timing.
If there are any unnecessary key data, the key data output can be stopped by setting
the CE pin to 0.
13 2001-06-19
TOSHIBA TC9298F/FB
(3) The keys are scanned at the following timing.
Key input I I
KTO n n
m TI TI TI TI
kT? TI TI - _l-l TI
KON I |—
Key data / X \
When OP is set to l, the keys are scanned. The key scan cycle is 32 times the oscillation cycle
(6.4ms @fosc=5kHz). The key data are also updated at this timing. The actual data become valid
and updated one cycle after each key scan cycle.
14 2001-06-19
TOSHIBA TC9298F/FB
3. The output waveforms of the LCD driver are as shown below.
tt 1/4Duty, 1/3Bias (COM1, COM3 system on)
ft=foscl32 [Hz] (When fosc--5kHz,fr=156.25Hz)
VDD-H. .
COM1 213-- -
COM2 2/3--
. VDD--
COM4 2/3--
1/3---
SEG. 2/3--
1/3.... -
GND-. .
o 1/8Duty, 1/4Bias (COM1, COM3 system on)
ft=foscl64[Hz] (When fosc--5KHz, fT=78.125Hz)
VDD.... .
3/4.-.. .
1/4----
VDD....
3/4....
. 1/4.... .. .. ....
GND" ....
VDD....
.' 3/4....
1/4--- _.
SEG, 1/2 _.. -
GND- .
15 2001-06-19
TOSHIBA TC9298F/FB
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VDD - 0.3--6.0 V
Input Voltage 1 VIN1 - 0.3--VDD +0.3 V
Input Voltage 2 Wm -0.3-6.0 (it) V
Power Dissipation PD 300 mW
Operating Temperature Topr -40--85 "C
Storage Temperature Tstg - 65--150 "C
(Note) DIN, CK, CE pins
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VDD =2.7 to 5.5V, Ta = -40 to 85°C)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN TYP. MAX UNIT
Operating Supply
V - - 2.7 . . V
Voltage DD 5 0 5 5
Power-on Reset
Voltage VRST - - 1.5 2.0 2.5 V
- VDD = 5V, fosc = 5kHz, No load - o 7 1 5
1/3 BIAS, RBIAS=4kQ (typ.) . .
Operating Supply I 1/3 BIAS, RBIAS=2kQ (typ.) . . mA
Current DDI VDD= 5v, fosc= 5kHz, No load 0 9 2 0
1/4 BIAS, RBIAS=2kQ (typ.) . .
1/4 BIAS, RBIAS=1kQ (typ.) . .
Stand-by Current IDD2 - VDD=5V, OP= "o" - 150 300 PA
VIH1 - KTo KT3 x0.6 VDD
-- VDD
" " V - R T -- V
H Level IH2 s x0.8 DD
Input VDD
Voltage le3 - DIN, CK, CE x0.8 5.5 v
V - - --
ILI KTo KT3 0 x0.1
"L'' Level VDD
VILZ - RST, DIN, CK, CE 0 -- x0.2
Schmitt Voltage VSCH - VDD=5V, DIN, CK, CE - 1.0 - v
Input "H" Level IIH - VIN=VDD, "r1S't', DIN, CK, CE - - $1.0
Leakage PA
Current "L" Level IIL - lhN=0V, RiT, DIN, CK, CE - - 11.0
16 2001-06-19
TOSHIBA TC9298F/FB
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN TYP. MAX UNIT
1/4 Level 1/1/4 - VDD=5V, COM1-COM8 "ll/YI/a vDo1/.c./loD
1/3 Level v1/3 - VDD=5V, COM1-COM4, 50-543 “30"501/3 VDD1/i0VI33D
Output - 1/2 VDD 1/2 VDD
Voltage 1/2 Level V1/2 - VDD - 5V, S4 S43 -0.3 1/2 VDD + 0.3 V
2/3 Level 1/2/3 - 1/DD=5V, COM1-COM4, S0-S43 Z/Eov'gDz/3 VDD ”:0ng
3/4 Level 1/3/4 - 1/DD=5V, COM1-COM8 3/EOVEDs/4 VDD ”:0ng
" n VDD = 5V, VOH =4.5V, KTO-KT7, - -
o t t H Level IOH - COM1-COM8, 50-543, OTo-OT3 0.5 3.0 -
C32; VDD=5V, v0L=o.5v, KTO-KT7, mA
"L" Level IOL - COM1-COM8, 50-543, OTo-OT3, 0.5 3.0 -
Off Leakage Current ILO - VOUT=5.5V, DOUT - - $1.0 PA
Pull-down Resistance RIN - KTo-KT7 75 150 300 k0
Oscillation Frequency fosc - - - 5 20 kHz
2001 -06-1 9
TOSHIBA TC9298F/FB
EXAMPLE FOR APPLICATION CIRCUIT
LCD Display
I I I ll ll I I I ll ll ll I I I ll
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
- 49 32
" 50 31
I 51 30
I 52 29 _
I 53 28 a-
- 54 27 a-
E - 55 26 a-
- 56 25 CT-
. 57 TOP VIEW 24 CI-
pf I 58 23 D—
- I 59 22 D—
J , 60 21 El—
DOUT - 61 20 El—
DIN , 62 19 El—
CK - 63 18 El—
CE - 64 17 El—
o, 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
T T 'l'il't,
¥§+§+Q
53+9+§+
Q®+fi+€+¢§
:s2,i7,iei
:+i:+:+:i+
:+:!+.§+:n+
5:21-26;
(-origirW Key
-r)-Extended Key
2001 -06-1 9
TOSHIBA TC9298F/FB
PACKAGE DIMENSIONS
QFP64-P-1414-0.80A Unit I mm
14.0i0.2
14.0:02
17 2:0 2
o.35¢0.1 E,
01:01 2-7in
8 1MAX
<———>l
o’ - 2:,
A 70.8i0.2
Weight : 1.10g (Typ.)
19 2001-06-19
TOSHIBA TC9298F/FB
PACKAGE DIMENSIONS
QFP64-P-1212-0.65 Unit : mm
14.thr.0.2
‘ 12.0i0.2 _
g 'lfiiilfWiRflfifififififm ' "
',?ij- 3:332 _
. CEE] I
T" 23:! E
ily, i
cu. N.
i? a R
3'33 C).,) c?
:13 N) xt
E 'r T""
j:f:lil I
1.125TYP
Weight : 0.45g (Typ.)
13.0:02 _ ,_
20 2001-06-19
TOSHIBA TC9298F/FB
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
21 2001-06-19
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www.loq.com
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