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TC9279F
Summ-Delta Modulation system DA converter with built-in 8 times over sampling digital filter
TOSHIBA
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC9279F, TC9279P
TC9279F/P
E-A MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMES
OVER SAMPLING DIGITAL FILTER
The TC9279F and TC9279P are a second-order E-d
modulation system 1-bit DA converter incorporating an
8-times oversampling digital filter, dynamic digital bass
boost function for use with compressor operations and
an analog filter developed for digital audio equipment.
Because the IC is small package (SOP20, DIP20) and
includes the digital de-emphasis filter, it is possible to
constitute reducing the size and cost of the DA
converter.
FEATURES
0 Built-in 8-times oversampling digital filter
0 Low voltage operations (3.3V) possible
0 Built-in digital de-emphasis filter
TC9279F
TC9279P
SOP20-P-300-1.27
DlPZO-P-300-2.54A
It DA converter oversampling ratio(OSR) is 192 fs Weight
. SOP20-P-300-1.27 : 0.48g (Typ.)
It Sampling frequency : 32 kHz, 48 kHz DIP20-P-300-2.54A : 1.49 (Typ.)
0 Characteristics of the digital filter and DA Converter are as follows:
Digital Filter (fs = 48 kHz)
Digital Pass-Band Transient Stop-Band
Filter Ripple Band Width Suppression
Standard Operation 8fs i0.11dB 21.7 k--25.5 kHz -26dB or less
DA Converter (VDD = 5.0V)
Noise .
OSR Distortion S/N Ratio
Standard Operation 192 fs -90di? (Typ.) 100 dB (Typ.)
1 2001-06-19
TOSHIBA TC9279F/P
PIN CONNECTION BLOCK DIAGRAM
LRCK BCK DATA F-s EMP MCK VDX xo XI GNDX
TC9279F, TC9279P © G 1D ls) G? l
VDD Ill U 20 a LRCK INTERFACE q DIGITAL FILTER CIRCUIT IL OSCILLATOR
T1 E 2 19 a BCK CIRCUIT DE-EMPHASIS FILTER CIRCUIT CIRCUIT
GNDA E 3 18 El DATA L I l
RO I: 4 17 [IF
R-o E S 16 a EMP Su MODULATION CIRCUIT GEEEMAZEOR
V% I 6 15 a MCK
LO E 7 ME] VDX l l—l
LO E 8 13 l xo TEST OUTPUT OUTPUT
GNDA Es 120 XI l CIRCUIT CIRCUIT “Kr CIRCUIT 'f
GNDD 10 11 , GNDX l l l
Ci) co 3 CD (1) co Q 9
VDD T1 GNDA RO R0 VDA LO LO GNDA GNDD
PIN FUNCTION
PIN No. SYMBOL I/O FUNCTION & OPERATION REMARKS
1 VDD - Digital block power supply pin
2 T1 I Test pin. Normally, use at "L".
3 GNDA - Analog GND pin for DA converter (R-channel)
4 RO 0 R-channel data forward output pin.
5 -iTt5 0 R-channel data reverse output pin.
6 VDA - Analog power supply pin for DA converter.
7 m 0 L-channel data reverse output pin.
8 LO o L-channel data forward output pin.
9 GNDA - Analog GND pin for DA converter (L-channel)
10 GNDD - Digital GND pin
11 GNDX - Crystal oscillator GND pin
12 XI I Crystal oscillator connection pin. Connecting a crystal $7
13 XO o oscillator, the system clock (384 fs) is generated. XI XO
14 VDX - Crystal oscillator power supply pin.
15 MCK o System clock output pin (384fs).
16 EMP I De-emahaums filter ON /£)Ff switching pm.
ON at H and OFF at L .
17 cs I Sampling frequency mode selection pin "H" = 32 kHz,
"L" = 48 kHz.
18 DATA I Audio data input pin
19 BCK I Bit clock input pin
20 LRCK I LR clock input pin
2001 -06-1 9
TOSHIBA TC9279F/P
DESCRIPTION OF BLOCK OPERATION
1. Crystal Oscillation Circuit and Timing Generator
The clock required for internal operations is generated by connecting a crystal and condensers as
shown in the diagram below.
The IC will also operate when a system clock is input from an external source through the XI pin
(pin 15). However, in this situation, due consideration must be given to the fact that waveform
characteristics, such as jitter and rising/falling characteristics of the system clock, significantly affect
the DA converter's noise distortion and the S/N ratio.
To internal circuit
-il) (l:)"?)
GNDX XI xo va MCK
ll 16.9344MHZ
E ch CL = 10~33 pF
Use a crystal with a low Cl value and favorable start-up characteristics.
Fig.1 Crystal Oscillation Circuit Configuration (when in the 384 fs mode)
The timing generator generates the clocks and process timing signals required for such functions as
digital filtering and de-emphasis filtering.
2. Data Input Circuit
DATA and the LRCK are loaded to the LSI internal shift registers on the BCK signal rising edge. It is
consequently necessary for the DATA and LRCK signals to be synchronized and input on the BCK
signal falling edge as indicated in the timing example below. Also, DATA has been designed so that
the 16 bits before the change point of LRCK are regarded as valid data, the data.
BCK supports only 32 fs.
BCK l:l5lfllElElalfllElElElalMill5llglglglllllglfl
16bit 16bit
Fig.2 Example of Input Timing Chart
3 2001-06-19
TOSHIBA TC9279F/P
3. Digital Filter
The 8-times oversampling IIR digital filter eliminates the noise returned from outside the bandwidth
during standard operations.
TabIe-1 Basic Characteristics of Digital Filter
Pre-band Transient .
Ripple Band Width Attenuation
Standard Operation 0.011 dB 21.7 k--25.5 kHz - 26 dB
The characteristics of the digital filter frequencies are shown below.
- 10.00
- 20.00
- 3000
- 40.00
- 50.00
Gain (d3)
Gain (d3)
- 60.00
- 70.00
- 80.00
- 90.00
- 100.0
0 1fs 2fs 3fs 4fs
Frequency (kHz) Frequency (kHz)
Fig.3 Digial Filter Frequency Characteristics
4. De-emphasis filer
The built-in IIR type de-emphasis filter circuit is available for two kinds of sampling frequency, fs of
32 kHz and 48 kHz.
The de-emphasis ON/OFF is controlled by EMP pin, and fs selection is controlled by 'T; pin.
Digitization of the de-emphasis filter has eliminated the necessity for external parts such as resistor,
capacitor, analog switch, etc.
Further, to reduce the characteristicerror of the de-emphasis filter, coefficients have been adjusted.
The construction and characteristics of the de-emphasis filter are shown below.
The digitalization of the de-emphasis filter eliminates the need for such external components as
resistors, condensers and analog switches. In addition to this, the coefficients are aligned to reduce
error in the de-emphasis filter characteristics.
The filter structure and characteristics are shown below.
Input data
IGGw)I
(b + b Z-I) 1 1
Transfer function : H(Z) = "'0'_''1c'' /T1 /T2
(1 - a12-1) T1: 50ps, T2 = 15ps
Fig.4 IIR Digital De-emphasis Filter Fig.5 Filter Characteristics
4 2001-06-19
TOSHIBA TC9279F/P
5. DA Conversion Circuit
The IC incorporates a second-order E-d modulation DA converter for two channels (simultaneous
output type). The internal structure of this is shown in Fig.6.
X Z =I' Z
Data ( )n . Q ( ) Output data
(Bit-stream 1-bit DA conversion data)
Second-order E-n converter : Y(2) = X(Z) + (1 - 2-1)2Q(Z)
Fig.6. E-d modulation DA converter
The E-sl modulation clock has been designed to operate at 192 fs. The noise shaping characteristics
are shown in Fig.7.
NOISE POWER (d8)
0 500k IM
Frequency (Hz)
Fig.7 Noise Shaping Characteristics
6. Data Output Circuit
In this circuit, output data waveform is shaped, and forward and reverse signals of bit stream data
are output to the outside through a buffer.
By differentiating these forward signal and the reverse signal in the external analog circuit, DA
conversion output of low distortion and high S/N ratio can be obtained.
Bit Stream 1 bit Inside
conversion data
l To D: CD Analog otuput
Buffer
l:hift resister VDA
(XI/2)
Fig.8 Construction of Data Output Circuit
5 2001-06-19
TOSHIBA TC9279F/P
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Power Supply Voltage VDA -0.3--6.0 V
Input Voltage Vin -0.3--VDD + 0.3 V
TC9279F 200
Po er Dissi ation P mW
IN I 'p I TC9279F D 300
Operating Temperature Topr -35--85 "C
Storage Temperature Tstg - 55--150 ''C
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta = 25°C, VDD = VDX = VDA = 5V)
DC CHARACTERISTICS
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Operating Supply [le T - 35 85°C 4.5 5 5.5 v
Voltage (1) DX a - - . .
. VDD Ta = -15~55°C
egliztlgiziumly VDX - (Operation frequency ) 3.3 3.5 5.5 V
g VDA L12MHzS fem: 18.5MHz
Power Dissipation IDD - XI = 18.4 MHz - 12 20 mA
Input "H" Level VIH VDD x 0.7 - VDD V
Voltage "L" Level " o - VDD x 0.3
Input "H" Level 'IH
- - 1 - 1 A
Current "L" Level 'IL 0 0 #
AC CHARACTERISTICS (Oversampling ratio = 192 fs)
Table Harmonic THD + 1 1 kHz sine wave, full-scale input -90 -80 dB
Distortion + Noise 1 N1 VDD = VDX = VDA = 5V
Table Harmonic THD + 1 1 kHz sine wave, full-scale input -86 -78 dB
Distortion + Noise 2 N2 VDD = VDX = VDA = 3.5V
S/N Ratio S/N 1 90 100 - dB
1 kHz sine wave
. DR 1 - B
Dynamic Range -60dB input conversion 90 95 d
Cross-talk CT 1 1 kHz 'Pt wave - -95 -90 dB
full-scale input
Operating Frequency fopr - VDD = VDA = VDX 2 4.5V 12 - 18.5 MHz
In t Fre en fLR LRCK d t c cle - 509f 30 48 - kHz
pu qu Cy fBCK - u y y - " 1.0 1.536 - MHz
Rise Time tr 0 0 - - 15
Fall Time tf - LRCK, BCK (10% 90%) - - 15 ns
Delay Time td - BCK Edge -oLRCK, DATA - - 40 ns
6 2001-06-19
TOSHIBA TC9279F/P
It Test circuit 1 : With the use of an application circuit example 2
DATA LOUT 20KHz Distortion
S G BCK Application circuit example-2 factor
LRCK ROUT Ideal LPF gauge
1 MCK l
SG : Anritsu : MG-22A or equivalent
LPF : Shibasoku : Built-in 725C distortion factor gauge filter
Distortion : Shibasoku : 725C or equivalent
DISTORTION FACTOR
PARAMETER GAUGE FILTER SETTING A weight : IEC-A or equivalent
MEASURED A WEIGHT
THD + N, CT OFF
S/N, DR ON
It AC Characteristics Stipulated Point (Input signal stipulation : LRCK, BCK, DATA)
10% 90% 10% 90%
50% . l I
BCK -y'-N-C
50% tr
DATA X X ... X X X
7 2001-06-19
TOSHIBA TC9279F/P
APPLICATION CIRCUIT EXAMPLE-1 (+5V Single Power Supply Used)
it-C) GNDX GNDD D-t
Clock iryyt--C XI GNDA D-t t-C GND1 L” cy
(384fs) LL
_ C x0 Lo D-CD LI a VCC D-tr t'iiy
n. - H U _ LO D-ee-bt L-ch Analog OUT
50V -C VDX E LO 50v b, 1kQ
C MCK cn vDA Y-tr t-t GND4 CD NC D-
Ps o 1,le1
EMPH 0 C EMP 'il m u-C GNDS 2 var CY
:Z/mc F_S I8 RO E _ RO Cy-tta-e R-ch Analog OUT
AOUT C DATA GNDA D-t RI GND D-t J I'
BCK C BCK T1 D-t t-C) GND8 A RI+ CY
CHCK —O LRCK /\ VDD D-u, ANALOG FILTER IC
APPLICATION CIRCUIT EXAMPLE-2 " 5V Two Power Su I Used)
IVCC E
H sGNDX GNDD Y-t t ' g
clcgkp,1spyut--C XI GNDA D-t 33 pF t
_ C xo LO 33 m 33 k0 18kg _f é l, - 1kg L-ch Analog our
39 PF 10,5 I
- 18kQ c; . a
sm/VDX u. 33 k5) 33 km 33pF "rr'c,j, t/i, 'ty Ji?,,'
C MCK f??. VDA D-tr 5.0V JLFl‘“
EMPH W0 EMP m RO
Jr'-f..?, FS I- RC
AOUT "-'C) DATA GNDA D-t
BCK —C BCK T1 D-t
CHCK -C) LRCK A VDD D-o .
(Cautions)
0 Quality of crystaloscillation waveform largely affect S/N ratio and noise distortion.
Further, this is also true when system clock is input externally through the XI pin of pin
o Suppress the input signals grige (LRCK, BCK, DATA) as small as possible.
0 The wiring between the output pin of the TC9279F/P and the input pin of analog filter
amplifier must be wired as short as possible.
0 The condencer between VDA and GNDA shall be connected as close to the pin as
possible.
8 2001-06-19
TOSHIBA
PACKAGE DIMENSIONS
SOP20-P-300-1.27
'ihiiripas/s1r------r--""
: 5.3:02
7 3:0 3
lrlhrlrleljljljrL___.._...a._,
0.685TYP =
13.3MAX
0.4 i0.1 *
Weight : 0.48g (Typ.)
ti?, E
tip-dr."
T"",, 1-
TC9279F/P
Unit : mm
(300mil)
(3-15—0255
-. I 0.23:0.2
2001 -06-1 9
TOSHIBA TC9279F/P
PACKAGE DIMENSIONS
DlP20-P-300-2.54A Unit : mm
0—01 5°
Y'"---''--'''-'''''',-?
25.1 MAX
24.6:02 d
3.13:0.3
0.87TYP
Weight : 1.49 (Typ.)
10 2001-06-19
TOSHIBA TC9279F/P
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
11 2001-06-19
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