TC9203F ,PLL MOTOR CONTROL FOR FDDWmvnweDemm mom comm m runT09203P/nsmp/r m c‘ms m designed tor contro1lini;the mom! or elvecially m ..
TC9203P ,PLL MOTOR CONTROL FOR FDDWmvnweDemm mom comm m runT09203P/nsmp/r m c‘ms m designed tor contro1lini;the mom! or elvecially m ..
TC9205M , 5-Port 10/100/1000 Smart Ethernet Switch
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TC9210P ,ELECTRONIC VOLUME CONTROL ICTOSHIBA TC9210,11PT(‘Q71nP T(‘Q711P"it'-"""'"' qNIIt'ttilIm-q .-TC921OP and TC9211P are electronic ..
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TDA7295S ,80Vapplicationscan be delivered to very low impedance loads, so(Home Stereo, self powered loudspeakers ..
TDA7296 ,70V-60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BYTDA7296®70V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BYVERY HIGH OPERATING VOLTAGE RANGEMULTIPOWER B ..
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TDA7297D ,10W+10W DUAL BRIDGE AMPLIFIERTDA7297D10W+10W DUAL BRIDGE AMPLIFIER1
TDA7297D13TR ,10W+10W DUAL BRIDGE AMPLIFIERFEATURES Figure 1. Package■ TECHNOLOGY BI20II■ WIDE SUPPLY VOLTAGE RANGE (6.5 - 18V)■ OUTPUT POWER ..
TC9203-TC9203F-TC9203P
PLL MOTOR CONTROL FOR FDD
_---- FQQZIBP/F
PU, MOTOR CONTROL FOR coo
T129203”? are EIHDB LSI designed for controlling: le
the motor of especially for Disk Spindle Drive (FED). I,?,,-,.-,,-, h r
B-bit D/A converter system has been employed foe r-, ea. Ch
each of the speed control system (AFC) and the phase 3 E3
control system thPC) and realize a wide reduction of 3
external parts and free adjustment mutnr control I 8
aystern. 19.25102 [Y
nasim N m 4'is
. Crystal can be used up to BHHz. and crystal. " ti "iii/
_ yt C5
reference dividing frequency selected from three , 7
Irrasitiott of IIS, 1/6 and 1/12 correspond to 3,5 and E
3.5 Inch POD, ii
. Lack range can he selected from two pasitinn of tht 'Ejryo.VsJlif
[EEG and URL
Package width and length do not
. External oscillator makes possible fine adjustment includu mold proLrutritrn.
. Allowable mold protrusion i: lhl 5mm.
at speed.
J KDEC -
ank detection output and reverse rotation signal
T0tmt " DiP16-P-ly00A
('utput are provided.
. Surface mnunl: is available with TCS203F. Unit in mm
I 10.3:02
'lLlUUUULlLfl
rmxmun RATINGS (Ta--gr'C) tl g Ct
_ H a "ii
ct1ARAcTERiSTTc swam. EATING UNIT 2 , g
Supply Voltage vnn -u.3~?.n v I ll g ll il [1%. V
Input: Voltage l'IN -o, 1-vmpr0.t ll irsCrql G.43tog Em
Pawcr Dissipation PD 300 ou h
Operating Temperature Tgpr -30~?5 "c J ii?
Storage Temperature Tstr, -55-125 "c 1 "gs'.
rm C0rl1lECT1ONS ii
WIDE 1 151131313 Pnthage width and length do not
rrre lsjcPDUT include mold pralrusinn.
xTES ujch Allowable mold protrusion Lt 015mm.
u1[¢ JTmn JEDEC -
Nzrs 12pur TOSHIBA 80PT6-P-300
WINCH love;
hmc'f 103211,wa
"'cO 931w-
TDBH’IEA ttEtrWtlt3Tgtlrtt2N
TOSHIBA CORPORATION
BLOCK DIAGRAM
CRYSTAL
OSCILLATOR
AMPLIFIER
XT N1 N2 CPOUT
CRYSTAL
REFERENCE
DIVIDER
SCHMITT FG
CIRCUIT
SYNCHRONOUSE
CIRCUIT
SPEED MONITOR
& REVERSAL
SENSING
CIRCUIT
DIVIDER
TIMING DIVIDER
(12 BIT)
DIVIDER
TEST LD
SENSING
CIRCUIT
DIVIDER
VDD GND
CONVERTER
CONVERTER
TC9203P/F
Ki==-R==l-=-t=_=_==-Rlelr=-=t=-=-=-==tt-l==== T69203P/ F
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VDD=5V, Ta=25°C)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Operating Supply - h
Voltage VDD 4.5 5.0 5.5 V
. X'tal=8MHz
Operating Supply IDD 1 * - 5.0 12.0 mA
Current CPIN=CPOUT
XT fXT 2 * 1.0 ._. 8.0
Operating MHz
Frequency CPIN fcp 3 Square wave * 0.05 - 4.0
Range V =0.5V -
FGIN fFC - IN p p * - ~ 10 kHz
Sin wave
. f =1 1
ingut Operating FGIN VIN F0 4 FC, Oklz * 0.5 .- VDD‘0-5 Vp-p
O Cage Sine wave
Ladder
Resistor RL 6 3O 50 75 kn
", = N - +
Deviation VDD 4.5 5.5V *2.5 t6.5 LSB
AFC, APC
D/A Resolution - - VDD/256 - ll
Converter T m rat re
"YY) u -.. t1 - LSB
Pullup Resistor RIN - N1,N2,20/27,R/S * 10 30 50 k0
Input "H" Level VIH - N1,N2,20/27,R/S * VDDx0.8 - VDD ll
Voltage "L" Level VIL CPIN 0 ~ VDDXO.2
Input Leak Current IIH/IIL - CPIN * - - 11.0 uA
Output "H" Level IOH - RV, LD iloH---41r -0.5 -1.0 - mA
Current "L" Level 10L CPOUT 1loL=IV 0.5 1.0 -
Smgi1:;:r Feedback XT Rf 5 100 200 500 kit
te S FGIN 300 500 800
* .' Guaranteed within the range of VDD=4.5V~5.5V, Ta----ay-85''c.
TOSHIBA CORPORATION
T09203P/ F -tr=-===_=-=tlt2-=-=-=-=-=ggt=tttg
FUNCTIONAL EXPLANTION OF EACH TERMINAL
PIN No. SYMBOL TERMINAL NAME FUNCTIONAL & OPERATION EXPLANATION REMARKS
l6 VDD Power supply voltage terminal and
1 GND grunding terminal.
2 XT Crystal with a built-in
Oscillation Crystal oscillator is connected. feedback
3 XT Terminal resistor.
4 N1 Reference Switching of divided frequency with a built-in
Divided Frequencyfrom the crystal reference ull-u resistor
Switching frequency divider into l/5,l/6 and p p .
5 N2 Terminal 1/12 is possible.
FG Pulse Input . with a built-in
6 FGIN Terminal Frequency generator input. amplifier.
APC Output 8 bit DAC output terminal for
7 APC . .
Terminal phase-voltage conver51on.
AFC Output 8 bit DAC output terminal for
8 AFC . '
Terminal frequency-voltage conver31on.
9 RV Reverse Signal Terminal for motor reverse signal
Output Terminal Output.
10 20/27 égiiciigge Terminal for switching lock range. with a built-in
Terminalg H or NC=1/20, L=l/27. pull-up resistor
RUN/STOP Input Pto1.r RUN/STOP signal Input with a built-in
11 R/S . terminal. .
Terminal H or NC=STOP L=RUN pull-up resistor
12 LD Lock Detecting This terminal becomes H when the
Terminal motor speed is within the lock
range and otherwise L.
Reference Normally connected to CPOUT-
l4 CPIN Frequency Input For external fine adjustment input
Terminal from an external oscillator.
Reference Terminal for divided output from
15 CPOUT Frequency Output the crystal reference frequency
Terminal divider. Normally connected CPIN.
13 TEST Test Terminal Input terminal of internal test.
Generally ground.
TOSHIBA CORPORATION
“M T89203P/ F
OPERATION
1. Crystal oscillation terminals (XT, XE)
. The crystal oscillator is used by connecting as shown below.
TRIMMER . CL of 10~30pF is appropriate.
éECL t"
Crystal oscillation frequency is calculated by the following equation according
to number of FG pulses of a motor to be used.
fre E%'XFG' x128 x(20 or 27) xN (Hz)
(Note) (20 or 27) l 20 at 20/27="H" or Open.
27 at 20/27="L".
fx: Crystal oscillation frequency, FC': number of FC pulse generated per
revolution of motor, R: revolution of motor per minute,
N t Ratio of frequency division of the crystal reference frequency divider.
(Refer to Item 9.)
. Maximum operating frequency is above 8MHz and crystals up to 8MHz can be used.
2. Reference frequency input/output terminals (CPIN, CPOUT)
. Divided output '-l-i- from the crystal reference frequency divider is available
at CPOUT, which is normally connected CPIN.
. When an external oscillator (CR oscillator, etc.) is connected to CPIN, motor
speed can be finally adjusted.
TOSHIBA CORPORATION
T09203P/ F -l""=-=-===t=-mmsmmss==mtes==rsm=-=r--ss-
3. FG pulse input terminal (FGIN)
. This is the input terminal of FC pulse that shows the motor speed.
This FG pulse becomes comparision frequency.
. This terminal has built-in Amplifier and Schmitt circuit.
FG pulses are applied through capacitor coupling and small amplitude is enough
for proper operation.
4. Lock range switching terminal (20/27)
. This terminal is for switching rock range of motor, with a pull-up resistor and
chattering preventive circuit.
(TRUTH TABLE)
20/27 DIVIDED FREQUENCY LOCK RANGE
L 1/27 +3.4~-3.9Z of reference cycle
H or NC 1/20 +h.6--5.3)'(, of reference cycle
5. APC, AFC output terminal (APC, AFC)
. AFC (speed control output) is a F-V converter for FC frequency, and is consisting
of a 8 bit D/A converter.
. APC (phase control output) is a phase comparator (4-v converter) that compares
phase difference é between 1/2 FG and reference frequency FS', and is also
consisting of a 8 bit D/A converter.
Both APC and AFC perform the following 3 operations according to FGIN frequency.
a. When FGIN frequency is within the lock range:
Both APC and AFC perform the normal operation for FGIN.
b. When FGIN frequency is below the lock range (under speed):
APC and AFC outputs are both fixed at "H" level.
C. When FGIN frequency is above the lock range (over speed):
APC and AFC outputs are both fixed at "L" level.
. When a motor is in STOP state (P/S=H or NC), both AFC and APC are fixed "L" level.
TOSHIBA CORPORATION
m T69203P/ F
AFC Output change status for FGIN frequency APC Output change status for phase
difference é.
FIXED AT 'H' LEVEL
I I E D/A OUTPUT
I I E I
a I I D/A OUTPUT ' Mi I
g I 3%
o I S; I
O I O l
Q l g§ I
l FIXED AT 'L' <.:
L I / L I
PHASE DIFFERENCE é
UNDER SPEED LOCK RANGEl OVER SPEED
FGIN FREQUENCY
. AFC and APC timing chart within lock range.
a. 'AFC (SPEED CONTROL SYSTEM)
m 1 1 W
CLOCK ll ig ill
LOAD H H H
PULSE i I' V I
OUTPUT
b. APC (PHASE CONTROL SYSTEM)
REFERENCE
FREQUENCY
FS' PULSE
L______
%FG gf ff gf
O UTPUT -.-.-d
TOSHIBA CORPORATION
'N9203P/F "''-"-=rt-=-t=t-===-t-r-===-=x===s--
6. Lock detecting terminal (LD)
This terminal is the lock detecting output and is placed at "H" level when FGIN
frequency is within the lock range and otherwise, placed at "L" level.
7. RUN/STOP input terminal (R/S)
. RON/STOP signals of the motor are input to this terminal.
. This terminal has a pull-up resistor and a chattering proventive circuit.
. During RUN (R/S=L), AFC, APC and LD perform the above-mentioned operations for
FGIN frequency, and during STOP (R/S=H or NC), AFC, APC and LD are all fixed
at "L" level.
8. Reverse signal output terminal (RV)
. At the switching of lock range from 1/20 to l/27 or the operating from RON to
STOP, reverse signal for braking the motor is output through this terminal.
. Change of RV output status
I : RV OUTPUT CHANGE r;|;:>RV OUTPUT CHANGE
PREVIOUS STATUS TO "H" LEVEL , TO "L" LEVEL 1
During normal rotation When the lock range is When the motor speed is
(during lock) at 1/20. switched from 1/20 to locked at 1/27, or when
1/27. FGIN l/8FS, or when the
lock range is switched
from 1/27 to 1/20.
During normal rotation When the operation is When FGIN l/8FS or when
(during lock) at 1/20 switched from RUN to the operation is switched
or 1/27. STOP. from STOP to RUN.
In other cases than above, RV output is not changed and fixed at "L" level.
Further, if FG frequency rises up to 1.5 times of normal rotation at 1/20
(2 times of normal rotation at 1/27), RV output is reset
9. Reference divided frequency switching terminal (N1, N2)
. Divided frequency l/N of the crystal reference frequency divider can be
switched to 1/5, 1/6 or 1/12 by number of FG pulses or a crystal used.
TOSHIBA CORPORATION
-g=t-=---tgt=--l-l-t8tH T09203P/ F
. This terminal has a built-in pull-up resistor.
(TRUTH TABLE)
N1 N2 l/N 1/N: CRISTAL REFERENCE DIVIDED FREQUENCY
(Note) Don't use mode, Nl=N2="L", because this mode is test mode.
CAUTION IN APPLICATION
. APC and AFC terminals are for the 8-bit D/A converter outputs, which are directly
output from the R-2R ladder type resistor network as shown in the following diagram.
Impedance of these outputs becomes equal to the ladder resistor value RL.
Terefore, input impedance at the receiving side of these terminals shall be designed
accordingly.
j (ll PAPC/AFC OUTPUT
g bi Q3 1iL-----s0--'rski2(TrPs0 km
. A filter for an externally mounted differential amplifier on an application circuit
shall be selected to meet the response characteristic of a motor to be used.
TOSHIBA CORPORATION
T89203P/ F
CHARACTERISTI C TEST CIRCUIT
(1) Operating supply current IDD (2) XT Operating frequency range fMAX(fXT)
VDD=5V SYNCHBoSC0PE
VDD=4.5~5.5V & FREQUENCY COUNTER
d 1(2) s @@@@@
VIN=Q5Vp-p g
f=1kHz
J,. X'tal=8MHz 80 i
ii) vrN=1.ovp-p
(3) CPIN Operating frequency range fray(fcp) (4) FGIN Input sensitivity VINFG
PG VIN:0~’7XVDD VDD=4.5~ 55v MONITOR
MONITOR VIL=0.3>
(15;;14)13 12 itrio:
”(9(3)
VDD2445~55V 16
SYNCHROSCOPE
X'tal---1MHz “ISO
2560 VIN
(5) Amplifier feedback resistor (6) D/A Converter ladder resistor Tii]
VDD=5V VDD=5V
j,)))/)a,ri,myr,
Rf: f5; (fl)
TOSHIBA CORPORATION
a---------------"' TC9203P/ F
CHARACTERISTIC DATA
MAX. OPERATING FREQUENCY
MAX. OPERATING FREQUENCY
fMAx(XT) - VDD
Ta = 25°C
TEST CIRCUIT (a)
fMAx(xT) (MHz)
2 3 l 5 6 '7 8
OPERATING SUPPLY VOLTAGE VDD (v)
fMAx(CPIN> - VDD
Ta = 25°C
TEST CIRCUIT (3)
fMAX(CPIN) (MHz)
2 3 l 5 6 T 8
OPERATING SUPPLY VOLTAGE VDD (v)
IDD - VDD
Ta =25"C
TEST CIRCUIT (l)
IDD (mA)
OPERAT ING C URRENT
2 S 4 5 6 '7 8
OPERATING SUPPLY VOLTAGE VDD (V)
MAX. OPERAT ING FREQUENCY
MAX. OPERAT ING FREQUENCY
FGIN INPUT AMPLITUDE
fMAX(XT) - Ta
VDD = 5V
TEST CIRCUIT (2)
-40 -20 0 20 IO 60 80
AMBIENT'TEMPERATURE Ta CC)
fMAX(CPIN) - Ta
vDD=5v
TEST CIRCUIT(m
-40 -2o o 2 IO 60 80
AMBIENT TEMPERATURE Ta (C)
VIN(FGIN> - VDD
Ta=25°C
TEST CIRCUITM)
Ci: 100
2 3 l 5 6 7 a
OPERATING SUPPLY VOLTAGE VDD (v)
TOSHIBA CORPORATION
Tcezoap/F n,-,,,,,,--,,,-,-,-,,-,,-,-'-,-,--,-,
EXAMPLE APPLICATION CIRCUIT
lOllFX 3
THSl19x3
th 2302240
a (BL)or
if 133le
Example of crystal oscillation frequency calculation.
When FC' (number of FG pulse) =l80 pulses and R (revolution of motor) =200r.p.m.,
if the dividing frequency of reference divider and lock range is set at N=5 dividing
frequency and 20/27=20, the crystal oscillation frequency fy is as follows:
fy = -i/i--- x m x 128 x20 xN= -2-i-?,- x180 x128 x20 X5=7.680MHz
TOSHIBA CORPORATION
www.ic-phoenix.com
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