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TC7MH138FK
3-to-8 Line Decoder
TC7MH138FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MH138FK 3-to-8 Line Decoder
The TC7MH138FK is an advanced high speed CMOS 3-to-8
decoder fabricated with silicon gate C2 MOS technology.
It achieves the high speed operation similar to equivalent
bipolar schottky TTL while maintaining the CMOS low power
dissipation.
When the device is enabled, 3 binary select inputs (A, B and C)
determine which one of the outputs (Y0 - Y7) will go low.
When enable input G1 is held low or either G2A or G2B is held
high, decoding function is inhibited and all outputs go high.
G1, G2A, and G2B inputs are provided to ease cascade
connection and for use as an address decoder for memory
systems.
An input protection circuit ensures that 0 to 7 V can be applied
to the input pins without regard to the supply voltage. This
device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit
prevents device destruction due to mismatched supply and input voltages.
Features High speed: tpd = 5.7 ns (typ.) (VCC = 5 V) Low power dissipation: ICC = 4 µA (max) (Ta = 25°C) High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs. Balanced propagation delays: tpLH ≈ tpHL Wide operating voltage range: VCC (opr) = 2~5.5 V Pin and function compatible with 74ALS138
Weight: 0.02 g (typ.)
