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TC58NVG0S3AFT05
1 GBit CMOS NAND EPROM
TC58NVG0S3AFT05
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1 GBIT (128M × 8 BITS) CMOS NAND EEPROM
DESCRIPTION The TC58NVG0S3A is a single 3.3-V 1G-bit (1,107,296,256 bits) NAND Electrically Erasable and Programmable
Read-Only Memory (NAND EEPROM) organized as (2048 + 64) bytes × 64 pages × 1024 blocks. The device has a
2112-byte static registers which allow program and read data to be transferred between the register and the
memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes
+ 4 Kbytes: 2112 bytes × 64 pages).
The TC58NVG0S3A is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed
making the device most suitable for applications such as solid-state file storage, voice recording, image file
memory for still cameras and other systems which require high-density non-volatile memory data storage.
FEATURES Organization
Memory cell array 2112 × 64K × 8
Register 2112 × 8
Page size 2112 bytes
Block size (128K + 4K) bytes Modes
Read, Reset, Auto Page Program
Auto Block Erase, Status Read Mode control
Serial input/output
Command control
PIN ASSIGNMENT (TOP VIEW) PIN NAMES Powersupply VCC = 2.7 V to 3.6 V Program/Erase Cycles 1E5 Cycles (With ECC) Access time
Cell array to register 25 µs max
Serial Read Cycle 50 ns min Operating current
Read (50 ns cycle) 10 mA typ.
Program (avg.) 10 mA typ.
Erase (avg.) 10 mA typ.
Standby 50 µA max Package
TSOPI48-P-1220-0.50 (Weight: 0.53 g typ.)
NC NC NC NC I/O8 I/O7 I/O6 I/O5 NC NC NC VCC VSS NC NC NC I/O4 I/O3 I/O2 I/O1 NC NC NC NC
NC NC NC NC NC GND BY/RYRECENC NC VCC VSS NC NC CLE ALE WEWPNC NC NC NC NC