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TC962EPA , HIGH CURRENT CHARGE PUMP DC-TO-DC CONVERTER
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TC58FVM5B2AFT65-TC58FVM5T2AFT65
32MBIT (4M ?8 BITS/2M ?16 BITS) CMOS FLASH MEMORY
TC58FVM5(T/B)(2/3)A(FT/XB)65 Organization of ４Banks Mode control
Compatible with JEDEC standard commands Erase/Program cycles
105 cycles typ. Access Time (Random/Page) Power consumption
10 µA (Standby)
15 mA (Program/Erase operation)
55 mA (Random Read operation)
5 mA (Page Read operation)
11 mA (Address Increment Read operation) Package
TC58FVM5**AFT:
TSOPI48-P-1220-0.50 (weight: 0.51 g)
TC58FVM5**AXB:
P-TFBGA56-0710-0.80AZ (weight: 0.125 g) TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
32MBIT (4M × 8 BITS/2M × 16 BITS) CMOS FLASH MEMORY
DESCRIPTION The TC58FVM5T2A/B2A/T3A/B3A is a 33554432-bit, 3.0-V read-only electrically erasable and programmable
flash memory organized as 4194304 words × 8 bits or as 2097152 words × 16 bits. The TC58FVM5T2A/B2A/T3A/B3
A features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The
commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the
chip. The TC58FVM5T2A/B2A/T3A/B3A also features a Simultaneous Read/Write operation so that data can be
read during a Write or Erase operation.
FEATURES Power supply voltage
VDD = 2.3 V~3.6 V Operating temperature
Ta = −40°C~85°C Organization
4M × 8 bits/2M × 16 bits Functions
Simultaneous Read/Write
Page Read
Auto Program, Auto Page Program
Auto Block Erase, Auto Chip Erase
Fast Program Mode/Acceleration Mode
Program Suspend/Resume
Erase Suspend/Resume
data polling/Toggle bit
block protection, boot block protection
Automatic Sleep, support for hidden ROM area
common flash memory interface (CFI)
Byte/Word Modes Block erase architecture
8 × 8 Kbytes/63 × 64 Kbytes Boot block architecture
TC58FVM5T2A/3A: top boot block
TC58FVM5B2A/3A: bottom boot block
