TC58FVB160FT-12 ,16-MBIT (2Mx8 BITS/1Mx16 BITS) CMOS FLASH MEMORYTOSHIBA TC58FVT160/B1GOFT-85,-10,-1216-MBIT (2M M 8 BITS / 1M M 16 BITS) CMOS FLASH MEMORYThe TC58F ..
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TC58FVB321FT-70 ,32-MBIT (4Mx8 BITS/2Mx16 BITS) CMOS FLASH MEMORYFEATURES • Power supply voltage • Block erase architecture V = 2.7 V~3.6 V 8 × 8 Kbytes / 63 × 64 K ..
TC58FVB641FT-10 ,64-MBIT (8Mx8 BITS/4Mx16 BITS) CMOS FLASH MEMORYFEATURES • Power supply voltage • Block erase architecture 8 × 8 Kbytes / 127 × 64 Kbytes V = 2.7 V ..
TC58FVB641FT-70 ,64-MBIT (8Mx8 BITS/4Mx16 BITS) CMOS FLASH MEMORYTC58FVT641/B641FT/XB-70,-10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64-MBIT (8M ..
TC962EPA , HIGH CURRENT CHARGE PUMP DC-TO-DC CONVERTER
TC9WMA1FK ,1,024-Bit (128 ?8 Bit) Serial E2PROMBlock Diagram Chip selectTiming Control Power supply CSV Power supply CCgenerator circuit (booster ..
TC9WMB1AFU ,Serial EEPROM (TC9WM series)Features 2• 2-wire serial interface (I C BUS) • Single power supply Read: V = 1.8 to 3.6 V CC Wri ..
TC9WMB1FK ,1024-Bit (128 ?8 Bit) 2-Wire Serial E2PROMFeatures 2 TM 2-wire serial interface (I C BUS ) (Note 1) Single power supply Read: V = 1.8 to ..
TC9WMB2AFK ,Serial EEPROM (TC9WM series)Block Diagram Address inputs A0 A1 A2Serial clock input SCL Timing Control Power supply V Power su ..
TC9WMB2FK ,2048-Bit (256 ?8 Bit) 2-Wire Serial E2PROMBlock Diagram Serial clock inputTiming Control Power supply SCLV Power supplyCCgenerator circuit ..
TC58FVB160FT-10-TC58FVB160FT-12-TC58FVB160FT-85-TC58FVT160FT-10-TC58FVT160FT-85
16-MBIT (2Mx8 BITS/1Mx16 BITS) CMOS FLASH MEMORY
TOSHIBA TC58FVT160/B160FT-85,-10,-12
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
16-MBIT (2M X 8 BITS / IM M 16 BITS) CMOS FLASH MEMORY
DESCRIPTION
The TC58FVT160/B160 is a 16,777,216-bit, 3.0-V read-only electrically erasable and programmable
flash memor organized as 2,097,152 words M 8 bits or as 1,048,576 words X 16 bits. The
TC58FVT160 160 features commands for Read, Program and Erase operations to allow easy
interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and
Erase operations are automatically executed in the chip. The device has Chip, Block and Multi - Block
Erase ca ability.
The T 58FVT160/B160 is available in either a 48-pin TSOP package to suit a variety of design
applications.
FEATURES
tt Power Supply
VDD = 2.7V to 3.6V
It Organization
2M X 8bits / 1M X 16 bits
0 Modes
Auto Program, Auto Chip Erase
Auto Block Erase, Auto Multiple Block Erase
Erase Suspend/Resume, Block Protection
Data Polling/ Toggle Bit
0 Block Erase Architecture
1 X 16 Kbytes / 2 X 8Kbytes /
1 M 32 Kbytes / 31 X 64 Kbytes
0 Boot Block Architecture
TC58FVT160FT - Top Boot Block
TC58FVB160FT - Bottom Boot Block
PIN ASSIGNMENT (TOP VIEW)
A15 1: 1 O 48 Cl A16
A14 : 2 47 Cl BYTE
A13 1: 3 46 Cl Vss
A12 : 4 45 Cl DQ15/A-1
A11 c: 5 44 Cl DQ7
A10 E 6 43 Cl 0014
A9 E 7 42 Cl DQ6
A8 E 8 41 :I 0013
A19 c: 9 40 :1 DQ5
N_C c 10 39 Cl DQ12
WE E 11 38 : DQ4
RESET E 12 37 Cl VDD
NC c 13 36 a DQ11
NC I: 14 35 Cl 003
RDY/BSY I: 15 M Cl DQ10
A18 c: 16 33 Cl DQ2
A17 c 17 32 Cl DQ9
A7 c 18 31 Cl DQ1
A6 I: 19 30 CI DQ8
A5 : 20 29 Cl mo
A4 I: 21 28 Cl OE
A3 E 22 27 a £5
A2 : 23 26 Cl CE
A1 I: 24 25 : A0
TC58FVT160FT/B16OFT (TSOP)
0 Mode Control
Compatible with JEDEC standard commands
0 Erase/Program Cycles
105 Cycles typ.
0 Access Time
85 ns (VDD = 3.0 V to 3.6 V)
100 ns/ 120 ns (VDD = 2.7 V to 3.6 V)
0 Power Dissipation
250 pA (Standby TTL level)
5 ,uA (Standby CMOS level)
30 mA (Read operation)
40 mA (Program/ Erase Operations)
0 Package
TC58FVT160FT/B160FT '. TSOP I 48 - P - 1220 - 0.50
(Weight: 0.53 g typ.)
PIN NAMES
A0 to A19 Address Input
DOC to DQ14 Data Input/Output
DQ15/A-1 Output (Input) IAddress Input
E Chip Enable Input
E Output Enable Input
W Word/Byte Select Input
W Write Enable Input
RDY/W Ready/Busy Output
W Hardware Reset Input
NC No Connection
VDD Power Supply
Vss Ground
000707EBA2
Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
o The TOSHIBA products listed in this document are intended for usage in
equipment, measuring1 equipment, industrial robotics, domestic appliances,
usage in equipment t
bodily injury CUnintended Usage"). Unintended Usage include atomic ene
instruments, traffic signal instruments, combustion control instruments, me
CORPORATION for any infringements of intellectual property or other rights
O T e information contained herein is subject to change without notice.
O TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction
or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing
products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a mal u
failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent
TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor
at requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life. or
2Y, control instruments, airplane or spaceship instruments, transportation
TOSHIBA products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade laws.
0 The information contained herein is presented only as a guide for the ap lications of our products. No responsibility is assumed by TOSHIBA
implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
TOSHIBA
nction or
general electronics applications (computer, personal equipment, office
etc.). These TOSHIBA products are neither intended nor warranted for
mal instruments, all types of safety devices, etc.. Unintended Usage of
o the third parties which may result from its use. No license is granted
2001-07-20 1/30
TOSHIBA
BLOCK DIAGRAM
TC58FVT160/B160FT-85,-10,-12
RDY/BSY
VDD °—> RDY/BSY DQO DQ15
I/ss © , Buffer T .................... T
= l/O Buffer
m c centre/ Auto let""".?
Circuit Control Circuit
BYTE c
W 6 Command
Register Program Erase
Circuit Circuit Data Latch
T W, E
Control
E Circuit
Column Decoder & Sense Amp
A0 o:- A A
d _ d R
s , 2 Memory Cell Array
s g a d
A19 o- f - ct f
A-1 o-
Erase Block Decoder
2001-07-20 2/30
TOSHIBA
MODE SELECTION
TC58FVT160/B160FT-85,-10,-12
Notes: *: " or "
1) DQ8 to DQ15 are High-Z in Byte mode
2) BA: Block Address
3) 0001H - Protected Block
0000H - Unprotected Block
Address are A19:A0 in word mode (BYTE = VlH),A19:A-1 in byte mode (BYTE =VIL)
BYTE MODE WORD MODE
MODE E E W A9 A6 A1 A0 W DOC to D071) DQO to DQ15
Read L L H A9 A6 A1 A0 H Dout Dout
ID Read (Manufacturer Code) L L H Vo L L L H Code Code
ID Read (Device Code) L L H Vo L L H H Code Code
Standby H * * * * * * H High-Z High-Z
Output Disable * H H * * * * * High-Z High-Z
Write L H L A9 A6 A1 A0 H Din Din
Block Protect L Vo L Vo L H L H * *
Verify Block Protect L L H Vo L H L H Code Code
Temporary Block Unprotect * * * * * * * Vo * *
Hardware Reset/Standby * * * * * * * L High-Z High-Z
Notes: *: " or "
1) DQ8 to DQ15 are High-Z in Byte mode.
ID CODE TABLE
CODE TYPE A19 to A12 A6 A1 A0 CODE (HEX) 1)
Manufacturer Code * " " " 0098H
Device TC58FVT160 * " " " 00C2H
Code TC58FVB160 * " " " 0043H
Verfy Block Protect BA 2) " " " Data 3)
2001-07-20 3/30
TOSHIBA
TC58FVT160/B160FT-85,-10,-12
COMMAND DEFINITIONS
COMMAND Jlfh FIRST BUS SECOND BUS THIRD BUS FOURTH BUS FIFTH BUS SIXTH BUS
SEQUENCE CYCLES WRITE CYCLE WRITE CYCLE WRITE CYCLE READ/WRITE CYCLE WRITE CYCLE WRITE CYCLE
REQ'D Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
Read/Reset 1 XXXXH FOH
Read/Reset Word 3 555H AAH 2AAH 55H SSSH FOH RA 1) RD 2)
Byte AAAH 555H AAAH
ID Read/ Word 3 555H AAH 2AAH 55H 555H 90H IA” ID'')
Verify Block
Protect Byte AAAH 555H AAAH
Auto Word 4 555H AAH 2AAH 55H SSSH AOH PAS) PDS)
Program
Byte AAAH 555H AAAH
Auto Word 6 555H AAH 2AAH 55H SSSH 80H 555H AAH 2AAH 55H 555H 10H
Chi Erase
p Byte AAAH 555H AAAH AAAH 555H AAAH
Auto Word 6 555H AAH 2AAH 55H 555H 80H 555H AAH 2AAH 55H BA” 30H
Block Erase
Byte AAAH 555H AAAH AAAH 555H
Block Word 6 555H AAH 2AAH 55H 555H 9AH 555H AAH 2AAH 55H 555H 9AH
Protect
Byte AAAH 555H AAAH AAAH 555H AAAH
Block Erase Suspend Addr: " or VIL, Data: BOH
Block Erase Resume Addr: " or VIL, Data: 30H
Notes: The system should generate the following address patterns: 4) ID : ID Data
Word mode: 555H or 2AAH to addresses A10 to A0 0098H - Manufacturer Code
Byte mode: AAAH or 555H to addresses A10 to A-1 OOCZH - Device Code(TC58FVT160)
DQ8 to DQ15 are ignored in Word mode. 0043H - Device Code(TC58FVB160)
0001H - Protected Block
1) RA : Read Address 0000H - Unprotected Block
2) RD : Read Data 5) PA : Program Address
3) IA : ID Address(A6, A1, A0) 6) PD : Program Data
00H = Manufacturer Code 7) BA : Block Address
01H = Device Code
02H =Verify Block Protect (A19to A12 = Block Address)
HARDWARE STATUS FLAGS
STATUS D07 D06 D05 003 RDY/Biy
Auto Programming W Toggle 0 0 0
In Progress Auto Erase(Erase Hold Time) 0 Toggle 0 0 0
Auto Erase 0 Toggle 0 1 0
Time Limits Auto Programming W Toggle 1 1 0
Exceeded Auto Erase 0 Toggle 1 1 0
Notes: l. DQ outputs cell data and RDY/BtiY outputs 1 when the operation has completed.
2. DQ0, D01 and D02 pins are reserved for future use.
3. DQ8 to DQ15 Output 0 or 1 in Word mode.
4. DOC to DQ2 and DQ4 2 Output 0.
2001-07-20 4/30
TOSHIBA
TC58FVT160/B160FT-85,-10,-12
BLOCK ERASE ADDRESS TABLES
TC58FVT160(Top Boot Block)
BLOCK A19 A18 A17 A16 A15 A14 A13 A12 BYTE MODE WORD MODE
' ADDRESS RANGE SIZE ADDRESS RANGE SIZE
BAO L L L L L * * * OOOOOOH - OOFFFFH 64 K bytes OOOOOH - O7FFFH 32 K words
BA1 L L L L H * * * 010000H - 01FFFFH 64 K bytes 08000H - OFFFFH 32 K words
BA2 L L L H L * * * 020000H - 02FFFFH 64 K bytes 10000H -17FFFH 32 K words
BA3 L L L H H * * * 030000H - 03FFFFH 64 K bytes 18000H - 1FFFFH 32 K words
BA4 L L H L L * * * 040000H - 04FFFFH 64 K bytes 20000H - 27FFFH 32 K words
BAS L L H L H * * * 050000H - OSFFFFH 64 K bytes 28000H - 2FFFFH 32 K words
BA6 L L H H L * * * 060000H - 06FFFFH 64 K bytes 30000H - 37FFFH 32 K words
BA7 L L H H H * * * 070000H - 07FFFFH 64 K bytes 38000H - 3FFFFH 32 K words
BA8 L H L L L * * * 080000H - 08FFFFH 64 K bytes 40000H - 47FFFH 32 K words
BA9 L H L L H * * * 090000H - 09FFFFH 64 K bytes 48000H - 4FFFFH 32 K words
BA1O L H L H L * * * OAOOOOH - OAFFFFH 64 K bytes 50000H - 57FFFH 32 K words
BA11 L H L H H * * * OBOOOOH - OBFFFFH 64 K bytes 58000H - 5FFFFH 32 K words
BA12 L H H L L * * * OCOOOOH - OCFFFFH 64 K bytes 60000H - 67FFFH 32 K words
BA13 L H H L H * * * ODOOOOH - ODFFFFH 64 K bytes 68000H - 6FFFFH 32 K words
BA14 L H H H L * * * OEOOOOH-OEFFFFH 64Kbytes 70000H-77FFFH 32 Kwords
BA15 L H H H H * * * 0F0000H - OFFFFFH 64 K bytes 78000H - 7FFFFH 32 K words
BA16 H L L L L * * * 100000H -10FFFFH 64 K bytes 80000H - 87FFFH 32 K words
BA17 H L L L H * * * 110000H-11FFFFH 64Kbytes 88000H-8FFFFH 32 Kwords
BA18 H L L H L * * * 120000H -12FFFFH 64 K bytes 90000H - 97FFFH 32 K words
BA19 H L L H H * * * 130000H -13FFFFH 64 K bytes 98000H - 9FFFFH 32 K words
BA20 H L H L L * * * 140000H -14FFFFH 64 K bytes AOOOOH - A7FFFH 32 K words
BA21 H L H L H * * * 150000H -15FFFFH 64 K bytes A8000H - AFFFFH 32 K words
BA22 H L H H L * * * 160000H -16FFFFH 64 K bytes BOOOOH - B7FFFH 32 K words
BA23 H L H H H * * * 170000H -17FFFFH 64 K bytes B8000H - BFFFFH 32 K words
BA24 H H L L L * * * 180000H - 18FFFFH 64 K bytes C0000H - C7FFFH 32 K words
BA25 H H L L H * * * 190000H -19FFFFH 64 K bytes C8000H - CFFFFH 32 K words
BA26 H H L H L * * * 1A0000H -1AFFFFH 64 K bytes D0000H - D7FFFH 32 K words
BA27 H H L H H * * * 1BOOOOH -1BFFFFH 64 K bytes D8000H - DFFFFH 32 K words
BA28 H H H L L * * * 1C0000H -1CFFFFH 64 K bytes EOOOOH - E7FFFH 32 K words
BA29 H H H L H * * * 1DOOOOH -1DFFFFH 64 K bytes E8000H - EFFFFH 32 K words
BA30 H H H H L * * * 1E0000H -1EFFFFH 64 K bytes FOOOOH - F7FFFH 32 K words
BA31 H H H H H L * * 1F0000H -1F7FFFH 32 K bytes F8000H - FBFFFH 16 K words
BA32 H H H H H H L L 1F8000H -1F9FFFH 8 K bytes FCOOOH - FCFFFH 4 K words
BA33 H H H H H H L H 1FA000H -1FBFFFH 8 K bytes FDOOOH - FDFFFH 4 K words
BA34 H H H H H H H * 1FC000H -1FFFFFH 16 K bytes FE000H - FFFFFH 8 K words
2001-07-20 5/30
TOSHIBA
TC58FVT160/B160FT-85,-10,-12
TC58FVB160(Bottom Boot Block)
BLOCK A19 A18 A17 A16 A15 A14 A13 A12 BYTE MODE WORD MODE
' ADDRESS RANGE SIZE ADDRESS RANGE SIZE
BAO L L L L L L L * 000000H - 003FFFH 16 K bytes 00000H - 01 FFFH 8 Kwords
BA1 L L L L L L H L 004000H - 005FFFH 8 K bytes 02000H - 02FFFH 4 K words
BA2 L L L L L L H H 006000H - 007FFFH 8 K bytes 03000H - 03FFFH 4 Kwords
BA3 L L L L L H * * 008000H - OOFFFFH 32 K bytes 04000H - 07FFFH 16 K words
BA4 L L L L H * * * 010000H - 01FFFFH 64 K bytes 08000H - OFFFFH 32 K words
BA5 L L L H L * * * 020000H - 02FFFFH 64 K bytes 10000H -17FFFH 32 K words
BA6 L L L H H * * * 030000H - 03FFFFH 64 K bytes 18000H - 1FFFFH 32 K words
BA7 L L H L L * * * 040000H - 04FFFFH 64 K bytes 20000H - 27FFFH 32 K words
BA8 L L H L H * * * 050000H - 05FFFFH 64 K bytes 28000H - 2FFFFH 32 K words
BA9 L L H H L * * * 060000H - 06FFFFH 64 K bytes 30000H - 37FFFH 32 K words
BA10 L L H H H * * * O70000H - 07FFFFH 64 K bytes 38000H - 3FFFFH 32 K words
BA11 L H L L L * * * 080000H - 08FFFFH 64 K bytes 40000H - 47FFFH 32 K words
BA12 L H L L H * * * 090000H - 09FFFFH 64 K bytes 48000H - 4FFFFH 32 K words
BA13 L H L H L * * * 0A0000H - OAFFFFH 64 K bytes 50000H - 57FFFH 32 K words
BA14 L H L H H * * * OBOOOOH - OBFFFFH 64 K bytes 58000H - 5FFFFH 32 K words
BA15 L H H L L * * * OCOOOOH - OCFFFFH 64 K bytes 60000H - 67FFFH 32 K words
BA16 L H H L H * * * ODOOOOH - ODFFFFH 64 K bytes 68000H - 6FFFFH 32 K words
BA17 L H H H L * * * OEOOOOH - OEFFFFH 64 K bytes 70000H - 77FFFH 32 K words
BA18 L H H H H * * * OFOOOOH-OFFFFFH 64Kbytes 78000H-7FFFFH 32 Kwords
BA19 H L L L L * * * 100000H -10FFFFH 64 K bytes 80000H - 87FFFH 32 K words
BA20 H L L L H * * * 110000H -11FFFFH 64 K bytes 88000H - 8FFFFH 32 K words
BA21 H L L H L * * * 120000H -12FFFFH 64 K bytes 90000 - 97FFFH 32 K words
BA22 H L L H H * * * 130000H -13FFFFH 64 K bytes 98000H - 9FFFFH 32 K words
BA23 H L H L L * * * 140000H -14FFFFH 64 K bytes A0000H - A7FFFH 32 K words
BA24 H L H L H * * * 150000H -15FFFFH 64 K bytes A8000H - AFFFFH 32 K words
BA25 H L H H L * * * 160000H-16FFFFH 64Kbytes BOOOOH-B7FFFH 32 Kwords
BA26 H L H H H * * * 170000H -17FFFFH 64 K bytes B8000H - BFFFFH 32 K words
BA27 H H L L L * * * 180000H - 18FFFFH 64 K bytes C0000H - C7FFFH 32 K words
BA28 H H L L H * * * 190000H -19FFFFH 64 K bytes C8000H - CFFFFH 32 K words
BA29 H H L H L * * * 1A0000H -1AFFFFH 64 K bytes DOOOOH - D7FFFH 32 K words
BA30 H H L H H * * * 1B0000H -1BFFFFH 64 K bytes D8000H - DFFFFH 32 K words
BA31 H H H L L * * * 1C0000H -ICFFFFH 64 K bytes EOOOOH - E7FFFH 32 K words
BA32 H H H L H * * * 1D0000H -1DFFFFH 64 K bytes E8000H - EFFFFH 32 K words
BA33 H H H H L * * * 1E0000H -1EFFFFH 64 K bytes FOOOOH - F7FFFH 32 K words
BA34 H H H H H * * * 1F0000H - 1FFFFFH 64 K bytes F8000H - FFFFFH 32 K words
The address range is A19 : A-1 in if Byte Mode (W: VIL)
The address range is A19 : A0 in ifWord Mode (W: VIH)
2001-07-20 6/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
ABSOLUTE MAXIMUM RATINGS
SYMBOL PARAMETER RANGE UNIT
VDD VDD Supply Voltage -0.6 to 4.6 V
VIN Input Voltage -0.6 to VDD + 0.5(E4.6) V
VDQ Input/Output Voltage -th6 to VDD + 0.5(E4.6) V
PD Power Dissipation 0.6 W
TSOLDER Soldering Temperature (10s) 260 "C
TSTG Storage Temperature -55 to 150 °C
TOPR Operating Temperature -40 to 85 °C
NEW Erase/Program Cycling Capability 100,000 Cycles
VIDH Maximum Input Voltage 13.0 V
IOSHORT Output Short Circuit Current 1) 100 mA
1) Outputs should be shorted for no more than one second.
No more than one output should be shorted at a time.
CAPACITANCE (Ta = 25°C, f =1 MHZ)
SYMBOL PARAMETER CONDITION TYP. MAX UNIT
Cm Input Pin Capacitance " = 0V 4 8 "
Cour Output Pin Capacitance VOUT = ov 10 12 "
CINZ Control Pin Capacitance " = 0V 8 10 "
This parameter is periodically sampled and is not tested for every device.
RECOMMENDED DC OPERATING CONDITIONS (Ta---40 to 85°C)
SYMBOL PARAMETER MIN MAX UNIT
VDD VDD Supply Voltage 2.7 3.6
VlH Input High Level Voltage 0.7VDD VDD + 0.5 V
VlL Input Low Level Voltage -0.3 1) 0.8
Vo Voltage for ID Read and Block Protect 11.4 12.6
1) -2V (pulse width of 20 ns Max)
2001-07-20 7/30
TOSHIBA
TC58FVT160/B160FT-85,-10,-12
DC CHARACTERISTICS (Ta = -40 to 85°C, VDD = 2.7 to 3.6V)
SYMBOL PARAMETER CONDITION MIN MAX UNIT
L Input Leakage Current 0V s VIN s VDD - url
'Lo Output Leakage Current 0V s VOUT s VDD - Il
VOH1 Output High Voltage(TTL) IOH = -0.4 mA 2.4 -
IOH = -0.1 mA VDD -0.4 -
VOHZ Output High Voltage(CMOS) V
IOH = -2.5 mA 0.85 X VDD -
VOL Output Low Voltage IOL = 4.0 mA - 0.4
bool VDD Average Read Current VIN = " / VIL'. IOUT = 0 mA - 30
CYCLE = tRc (min)
IDDOZ Yoo Average Program Current VIN = " / VI, IOUT = 0 mA - 40 mA
|DDO3 Yoo Average Erase Current " = " / VI, IOUT = 0 mA - 40
|DDS1 Yoo Standby Current (TTL) E = RESET = " or RESET = " - 250
Ions, VDD Standby Current (CMOS) CE = RESET = VDD i 0.2V - 5 tzA
or RESET = I/ss , 0.2v
lo High Voltage Input Current 11.4V s Vo s 12.6 - 200
VLKO Low VDD Lock-out Voltage - - 2.5 V
AC TEST CONDITIONS
PARAMETER CONDITION
Input Pulse Level 2.4V / 0.4V
Input Pulse Rise and Fall Time(10% to 90%) 5ns
Timing Measurement Reference Level (Input) 1.5V/ 1.5V
Timing Measurement Reference Level (Output) 1.5V / 1.5V
Output Load CL (100 pF) + 1 TTL Gate
2001-07-20 8/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
AC CHARACTERISTICS AND OPERATING CONDITIONS
-85 -10 -12
SYMBOL PARAMETER Ta = -40 to 85 C UNIT
VDD=3.0tO 3.6V VDD = 2.7 to 3.6V
MIN MAX MIN MAX MIN MAX
tRc Read Cycle Time 85 - 100 - 120 - ns
tAcc Address Access Time - 85 - 100 - 120 ns
tCE E Access Time - 85 - 100 - 120 ns
toe E Access Time - 35 - 40 - 50 ns
tCEE E to Output Low-Z 0 - 0 - 0 - ns
toes E to Output Low-Z 0 - 0 - 0 - ns
tOEH OE Hold Time(Read) 0 - 0 - 0 - ns
tOH Output Data Hold Time 0 - 0 - 0 - ns
tom E to Output High-Z - 30 - 30 30 ns
tDF2 E to Output High-Z - 30 - 30 - 30 ns
tCMD Command Write Cycle Time 85 - 100 - 120 - ns
tas Address Setup Time 0 - 0 - 0 - ns
tAH Address Hold Time 45 - 50 - 50 - ns
tDs Data Setup Time 45 - 50 - 60 - ns
tDH Data Hold Time 0 - 0 - 0 - ns
tWELH W Low Level Hold Time (W Control) 45 - 50 - 50 - ns
tWEHH m High Level Hold Time (m Control) 20 - 20 - 20 - ns
tcss CE Setup Time to WE Active (WE Control) 0 - 0 - 0 - ns
tCEH E Hold Time from W High Level (W Control) 0 - 0 - 0 - ns
tCELH E Low Level Hold Time (E Control) 45 - 50 - 50 - ns
tCEHH E High Level Hold Time (E Control) 20 - 20 - 20 - ns
tWES m Setup Time to E Active (E Control) 0 - O - 0 - ns
tWEH W Hold Time from High Level (E Control) 0 - 0 - 0 - ns
tOES E Setup to W Active 0 - 0 - 0 - ns
tOEHp E Hold Time (Toggle/Data Polling) 10 - 10 - 10 - ns
t0EHT OE High Level Hold Time (Toggle) 20 - 20 - 20 - ns
tppw Auto Program Time 16 * 3600 16 * 3600 16 * 3600 p5
tpCEW Auto Chip Erase Time 50 * - 50 * - 50 * - s
thEW Auto Block Erase Time 1.5 * 15 1.5* 15 1.5 * 15 s
tvos VDD Setup Time 500 - 500 - 500 - td;
tBUSY Program/Erase Valid to RDY/BSY Delay 35 - 40 - 50 - ns
tm, REiiiT Low Level Hold Time 500 - 500 - 500 - ns
tREADY REiET Low Level to Read Mode - 20 - 20 - 20 td;
tRB RDY/BSY Recovery Time 0 - 0 - 0 - ns
tRH RESET Recovery Time 500 - 500 - 500 - ns
tCEBTs E Setup time W Transition 5 - 5 - 5 - ns
tBTD BYTE to Output High-Z - 30 - 30 - 30 ns
tva Vo Transition Time 4 - 4 - 4 - pd;
tVPS Vo Setup Time 4 - 4 - 4 - M;
thH OE Hold Time (Block Protect) 8 - 8 - 8 - td;
tppLH m Low Level Hold Time (Block Protect) 100 - 100 - 100 - pd;
tpAs Protect Address Setup Time 0 - 0 - 0 - ns
tpAH Protect Address Hold Time 0 - 0 - 0 - ns
tcESP E Setup Time (Block Protect) 4 - 4 - 4 - gs
tCEHp CE Hold Time (Block Protect) 8 8 - 8 td;
tsus Suspend Command to Suspend Mode - 15 - 15 - 15 pd;
tRES Resume Command to Erase Mode - 1 - 1 - 1 M;
* : Typ.
2001-07-20 9/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
OPERATING MODES
READ MODE
When the device is set to Read mode, it acts as an asynchronous ROM with an access time of
85/100/120 ns. The device is set to Read mode at power-on or when an Auto - Program/ Erase operation
completes. A software or hardware reset is necessary to return the device to Read mode when an Auto
Program/ Erase operation fails.
STANDBY MODE
There are two methods of entering Standby mode: the first involves using both CE and tTETth7 and
the second using only 'tTtTfft"fl"r.
The first method involves using tTIT and "t1Ti''f''Ct1'l''I'? for mode control. If VDD , 0.2 V (CMOS 1eve1)is
applied to CE and Riel) when the device is operating in Read mode, the current is reduced below 5
/dk. Similarly, if Vm (TTL level) is applied to CE and RiET, the current is reduced below 250 ,uA.
When using CtE for control, make sure that the device is operating in Read mode; otherwise, it is not
possible to enter Standby mode.
The second method involves using only REiET for mode control. IF Vssi0.2 V (CMOS level) is
applied to -rITrffhT(r when the device is operating in Read mode, the current is reduced below 5 PA.
Similarly, if VIL (TTL level) is applied to RESET, the current is reduced below 250 PA. The difference
the control method using CE- described above, is that if VIL is applied to ITtT9TtTtl" when the device is
operating in any mode other than Read mode, it enters Standby mode after stopping the operating
which is currently being executed. This is a hardware reset and is described later.
In standby mode, DQ is put in high-impedance state.
COMMAND WRITE
The TC58FVT160/B160 utilizes the JEDEC command control standard for a single power supply
E2PROM. A command is executed by inputting an address and data into the Command register. The
command is entered by a W Control Write (W pulse with CE = Vu, and CyE = VIH) or a CE Control
Write (CE pulse with W = VII, and CyE = VIH). The address is latched on the falling edge of either
W or CE. The data is latched on the rising edge of either W or CE. DQO to 7 are valid for data
input and DQ8 to 15 are ignored.
A command is when the Reset command is input. The device then enters Read Mode. When an
undefined command is input, the Command register is reset and the device enters Read mode.
RESET {Software Reset}
The device does not enter Read mode automatically when a command such as Auto Program/ Erase or
ID Read is not correctly executed (for example, if Program or Erase fails). The Reset or Read
Command is necessary to return the device to Read mode. The Reset and Read commands must also
be used to reset the Command register.
RESET {Hardware Reset}
A hardware reset is used for aborting Auto mode operations such as Auto Program/Erase and for
resetting the operation mode. The device enters Read mode 20 ps after a 500-ns Low level input pulse
to the RESET pin. Data may be corrupted if the device is reset during an Auto mode operation.
2001-07-20 10/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
After a hardware reset the device enters Read mode when RESET = VIH and Standby mode when
RESET = VIL. The DQ pins are High-Impedance when RESET = VIL. The Read operation sequence
and input of any command are allowed after the device enters Read mode.
ID READ MODE
The ID Read mode is used to establish the device type. The ID Read mode is set either from the
Command mode by inputting a 90H command or from the EPROM mode by applying V11) to the A9
When A0, A1 and A6 = VIL, the data that is read is the manufacturer code (0098H). When A0 =
VIH and A1 and A6 = VIL, the data that is read is the device code (TC58FVT160 '. OOCZH /
TC58FVB160 : 0043H). The access time for an ID Read is the same as that of a normal Read operation.
DQ8 to 15 are in High-hnpedanee state in Byte mode.
AUTO PROGRAM MODE
The TC58FVT160/B160 can be programmed in either byte or word units. The Auto Program mode is
set using the Program command. The program address is latched on the falling edge of the ThrE signal
and data is latched on the rising edge of the fourth bus cycle. Auto programming starts on the rising
edge of the W signal in the fourth bus cycle. The Program and Program Verify commands are
automatically executed by the chip. The device status during programming is determined from the
Hardware Sequence flag.
Programming of a protected block is ignored. The device enters Read mode 3 ps after the rising edge
of the 1Trtf signal in the fourth bus cycle.
The device allows the programming of memory cells from 1 to 0. The programming of Memory cells
from 0 to 1 will fail. A cell must be erased to turn it from 0 to 1.
If an Auto Program operation fails, the device remains in programming state and does not
automatically return to Read mode. The device status can be determined from the setting of the
Hardware Sequence flag. Either a Reset command or a hardware reset is necessary to return the
device to Read mode after a failure.
If a programming operation fails, please do not try to use the block which contains the address to
which data could not be programmed.
Auto Chig Erase Mode
The Auto Chip Erase mode is set using the Chip Erase command. The Auto Chip Erase operation
starts on the rising edge of W in the sixth bus cycle. All memory cells are automatically
preprogrammed to 0, erased and verified as erased by the chip. The device status is determined from
the Hardware Sequence flag.
Command inputs are ignored during an Auto Chip Erase. The hardware reset allows interruption
of an Auto Chip Erase operation. The Auto Chip Erase operation does not complete correctly when
interrupted. Hence a further Erase operation is necessary.
An attempt to erase a protected block is ignored. If all blocks are protected, the Auto Erase
operation will not be executed and the device will enter Read mode 100 ps after the rising edge of the
1TTif signal in the sixth bus cycle.
If an Auto Chip Erase operation fails, the device remains in, erasing state and does not return to
Read mode. The device status is determined from the Hardware Sequence flag. Either a Reset
command or a hardware reset is necessary to return the device to Read mode after a failure.
2001-07-20 11/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Auto Block/ Multi Block Erase Mode
The Auto Block and Multi Block Erase modes are set using the Block Erase command. The block
address is latched on the falling edge of the WE signal in the sixth bus cycle. The Block Erase starts
as soon as the hold time has elapsed after the rising edge of the WE signal. All memory cells in the
selected block are automatically programmed to o, erased and verified as erased by the chip. The
Multi Block Erase operation allows erasing of multiple blocks. Any additional block addresses or Multi
Block Erase commands must be input within the Erase Hold Time - that is, within 50 ps of any W-E-
signal rising edge. The device status can be determined from the setting of the Hardware Sequence
Commands (except Erase Suspend) are ignored during a Block/Multi Block Erase operation. The
operation can be aborted by a hardware reset. The Auto Erase operation does not complete correctly
when aborted, therefore, a further Erase operation is necessary.
An attempt to erase a protected block is ignored. If all the selected blocks are protected, the Auto
Erase operation is not executed and the device returns to Read mode 100 ps after the rising edge of
the W signal in the last bus cycle.
If an Auto Erase operation fails, the device remains in erasing state and does not return to Read
mode. The device status is determined from the Hardware Sequence flag. Either a Reset command or
a hardware reset is necessary to return the device to Read mode after a failure.
Erase Suspend / Resume Mode
The Erase Suspend mode is used to read data from a block not selected for erasing. The Erase
Suspend command is allowed during a Block Erase operation or during the Block Erase Hold Time; it
is ignored in other operation modes. A Block Erase operation is also suspended if the Suspend
command is input during the Block Erase Hold Time. The device is reset if any command other than
Suspend is input. The suspended device recognizes only Read and Resume commands.
The device enters Suspend mode 15 ps after the Erase Suspend command is input. The device then
enters a pseudo-Read Mode. Data can be read out from an unselected block but is invalid if the
address is set to a block selected for erasing. The device status can be determined from the Hardware
Sequence flag. DQ6 (the toggle bit) stops toggling and RDY/WY outputs 1 once the device is set to
pseudo-Read mode. The host processor must track the current device mode since there is no way of
telling whether the device is in pseudo-or ordinary Read mode. The device remains in pseudo-Read
mode even if a Suspend command is input.
The device restarts the Block Erase operation after receiving a Resume command. The device
returns to the status in which the Suspend command was input. The DQ6 output toggles and
RDY/rrfry outputs a 0.
2001-07-20 12/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
BLOCK PROTECT
The TC58FVT160/B160 has a block protection feature to prevent programing and erasing of protected
blocks. Block protection is enabled by either hardware protection (1) or a software command mode (2).
The initial device is shipped with all blocks unprotected.
(1) A blocks is protected when: A9 = UE- = VID, CE = VIL, A0/ A6 = VIL, A1 = VIH; the block
address is set using A12 to A19. The block protect data is programmed within tppLH of the 1Trlif
signal going Low.
(2) A block can also be protected using a software command. Block protection is executed by
setting the Ti7tf signal to Low for tppLH while CTif = VIL. After the command input in the sixth
bus cycle A12 to A19 = the block address. Block protection can be verified using the Verify
Block Protect command.
TEMPORARY BLOCK UNPROTECTION
The TC58FVT160/B160 has a temporary block unprotection feature which disables block protection
for all protected blocks. Unprotection is enabled by applying V11) to the -rtrtffftfitl" pin. In this state any
block can be programmed or erased. The device returns to the previous condition after V11) is removed
from the ItifET pin. That is, previously protected blocks are protected again.
VERIFY BLOCK PROTE CT
The Verify Block Protect command is used to check whether a block is protected or unprotected.
Verify Block Protect is enabled either through hardware (1) or by a software command (2). In Word
mode 0001H is output when the block is protected and OOOOH is output when it is unprotected. DQ8
to 15 are High-linpedance in Byte mode.
(1) Verify Block Protection is enabled when: A9 = VID, A0 and A6 = VIL and A1 = VIH.
A12 to A19 = the block address.
(2) Verify Block Protection can also be enabled using a software command.
2001-07-20 13/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
HARDWARE SEQUENCE FLAG
The TC58FVT160/B160 has a Hardware Sequence flag which allows the device status to be
determined during Auto operation. The output data is read out with the same timing as Read mode at
CTif = JE = VIL. RDY/W outputs either High or Low.
The device re-enters the Read mode automatically after Auto operation has completed successfully.
The device status is read out from the Hardware Sequence flag and the operation result is verified by
comparing the read-out data to the original data.
UL? {DATA Polling!
The device status can be determined using the data polling function during an Auto Program or
Auto Erase operation. I5TtTrh- polling begins on the rising edge of -Grrif in the last bus cycle. In an
Auto Program operation, DQ7 outputs inverted data during the programming operation and outputs
real data after programming has finished. In an Auto Erase operation, DQ7 outputs 0 during the
Erase operation and outputs 1 when the Erase operation has finished. If an Auto Program or Auto
Erase operation fails, DQ7 simply outputs the data.
The latched address is reset after an operation has finished. The polling data is asynchronous with
the CyE signal.
D 6 (To 1e Bit)
The device status can be determined by the Toggle Bit function during an Auto Program or Auto
Erase operation. The Toggle bit begins toggling on the rising edge of W in the last bus cycle. DQ6
alternately outputs a 0 or a 1 for each attempt (UE access) while CE = Vu, while the device is busy.
When the internal operation has been completed, toggling stops and valid memory cell data can be
read by subsequent reading. If the operation failed, the DQ6 output toggles.
DQ6 toggles for around 3 ps when an attempt is made to execute an Auto Program operation on a
protected block. It then stops toggling. DQ6 toggles for around 100 ps when an attempt is made to
execute an Auto Erase operation on a protected block. It then stops toggling. After toggling stops the
device returns to Read mode.
DQ5 {Internal Time-out)
DQ5 outputs a 1 when the Internal Timer has timed out during a Program or Erase operation. This
indicates that the operation has not completed within the allotted time.
An attempt to program 1 into a cell containing 0 will fail (see Auto Program mode). DQ5 outputs 1
in this case. Either a hardware reset or a software Reset command is required to put the device into
Read mode.
2001-07-20 14/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
DQ3 (Block Erase Timer)
The Block Erase operation starts 50 #s (Erase Hold Time) after the rising edge of W in the last
command cycle. DQ3 outputs a 0 during the Block Erase Hold Time and a 1 when the Erase
operation starts. Additional Block Erase commands can only be accepted during this Block Erase Hold
Time. Each Block Erase command received within this hold time resets the timer, allowing additional
blocks to be marked for erasing. DQ3 outputs a 1 if the Program or Erase operation fails.
RDY/BSY (READY/BUSY)
TC58FVT160/B160 has a RDY/FW signal to indicate the device status to the host processor. A 0
(Busy state) indicates that an Auto Program or Auto Erase operation is in progress. A 1 (Ready state)
indicates that the operation has finished and that the device can accept a new command. The
RDY/E9Y signal outputs a 0 when an operation has failed.
The RDY/FSY signal outputs a 0 after the rising edge of TVE- in the last command cycle.
During an Auto Block Erase operation, commands other than Erase Suspend are ignored. The
RDY/tTfrf signal outputs a 1 during an Erase Suspend operation. The output buffer for the RDY/ggy-
pin is an open drain type circuit, allowing a wired-OR connection. A pull-up resistor needs to be
inserted between VDD and the RDY/W pin.
DATA PROTECTION
The TC58FVT160/B160 utilizes a JEDEC standard command sequence which protects data against
accidental alteration due to noise.
VDD Lock-out Voltage
The device is reset when VDD is less than VLKO to protect memory cell data against VDD noise, and
during power-up and power-down. An Auto Program or Erase operation stops when VDD drops below
VLKO. An Erase Suspend operation is reset and an Erase operation stops if the device is in Suspend
mode. An operation will not complete correctly if it is interrupted by VDD Lock-out.
W Glitch Pulses
Glitches must be suppressed (to less than 5 ns) in order for operation to proceed smoothly.
Protection at Power-on
A command is not recognized on the rising edge of Wit" VDD rises from 0 V to the operating
voltage while INTiT = VILXE = VIL and tTE = VIH. In this case the device is reset and enters Read
2001-07-20 15/30
TOSHIBA
TIMING DIAGRAMS
Read/ID Read Operation
TC58FVT160/B160FT-85,-10,-12
Address )( )(
tAcc t0H
siih 2
4 tos tDF1
tCEE tore
WE A tOEH
High-Z High-Z
Dout DOUT Valid
ID Read Operation (Hardware)
A0 sh RF"
A1 Ai) A"
ss' tAcc
As a A"
12V H----------------- ,
3V ----- Eiiiiiiiigip/ tVPS
E si) A,'ih /
toe A"
High-Z
Notes: 0098H - Manufacturer Code
00C2H - Device Code (TC58FVT160)
0043H - Device Code (TC58FVB160)
..¥.- .3...
r O O O L' _ 0 o C 2 H / 2S?S?S?SN8
..... w :0000000
IMM 0043 H kikM8
HIBA TC58FVT160/B160FT-85,-10,-12
Auto Program Operation (UE Control)
Add ress ii4ifii)
ltr/E h _,,ii)i(ii-'--/--k_t1-)-C,, a)i'i)i-s5, 'j,',,',',','), /
c7 -L,,eiL,,,z/'"l /"1 /"'1-/"
Din __._ 55H (Atv-i), PD
tDs tDH
Notes: Word mode address shown PA: Program address
PD: Program data
Auto Chip Erase/Auto Block Erase Operation (UE' Control)
%2%%/%/%/%/
twes ’ tWEH
toes tCELH tCEHH
tDs tDH
tVDS 'E/ 'E-il (E/ (SE' 'rE/
Notes: Word mode address shown BA:Block address for Auto Block Erase operation
2001-07-20 17/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Auto Program Operation (WTff Control)
fi?gz%%%%/
tCEs ‘f tCEH
toss tWELH tWEHH
t tPPW
m _\U/ 'rc/ l / \ /
tDs tDH
Din __._ 55H (Atv-i), PD
Notes: Word mode address shown PA: Program address
PD: Program data
Auto Chip Erase/Auto Block Erase Operation (Till?" Control)
tces ’ tCEH
tDs tDH
tVDS 'E/ 'E-il (E/ (SE' 'rE/
Notes: Word mode address shown BA:Block address for Auto Block Erase operation
2001-07-20 18/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
DATA Polling during Program/Erase Operation
Command
Add ress
Add ress
PA/BA )tr"
E sA 2%% /,
tces _ =w- tCEH
E l ' X t
tOEHP on
U tPPw/ tPCEW/tPBEW
. Last
Din Command
DoutO to 6
Notes: PA: Program address
BA: Block address
Toggle Bit during Program/Erase Operation
)( PA/BA XF'"
CTE' sh ZWA /'"
tcss 4 _ tOEHT
Address Command
Address
. Last
Din -(ciEu)
Dout6 Toggle Toggle (vt)
* Dout6 stops toggling when the last command has completed.
Notes: PA: Program address
BA: Block address
2001-07-20 19/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Erase Suspend Operation
6th Command Cycle
E sih A" sA ( %g A'"
o" tCES ItWELH 12ch I, I
tos 1pe,
RDY/ BSY tsus p'
Block Erase
Command Input Sequence
- Erase mode --- Suspend mode - -
Notes: BA .' Block address
RA : Read address
Resume O eration
CTE 2% sil 2% sA sf'"
tCES tCEH
a l N /
_/ tOEs tWELH
raw-r.-- i / tRES
tDF2 DS b2slil,
Din 30H
RDY/Biy l
-- Suspend mode Erase mode
Notes: RA : Read address
BA : Block address
* Flag : Hardware sequence flag
2001-07-20 20/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
RDY/BSY during Auto Program/Erase Operation
c7 "s, /
Command input sequence
vr-a"sc//-'Nu//' ...... "sc/
RDY/Biy l
During operation
Hardware Reset Operation
RESET l
tREADY
RDYtBiY N /
Read after RESET
Address )( X
High-Z
Data valid
2001-07-20 21/30
TC58FVT160/B160FT-85,-10,-12
TOSHIBA
BYTE during Read Operation
« .«oi ,
‘iéocoonoofio;
Add ress Input
tCEBTS
DQO to DQ7
DQ8to DQ14
output
DQ15/A-1
BYTE during Write Operation
2001-07-20 22/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Block Protect Operation (Hardware)
I Block Protect I Verify Block Protect
A19to A12 a,ssiij( BA )(F"
E tVPH
tvps _ r
tcgsp c_.,/
High-Z
BA : Block address
* : 0001H indicates that block is protected.
2001-07-20 23/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Block Protect {Software}
Block Protect Setup I Block Protect Verify Block Protect
Address
Ad d ress
6th Command Cycle
a "cc)
tCESP tCEHP
n n /_¥E_/_
vo-z-lv/ w L/L/L/
Din 9AH AAH 90H
BA .' Block address
0001H indicates that block is protected.
2001-07-20 24/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
FLOWCHARTS
Auto Program
Auto Program Command Sequence
(see below)
DATA Polling or Toggle Bit
Last Address?
Increment Address
Auto Program Completed
Auto Program Command Sequence (Address/Command)
555H/AAH
555H/AOH
Program Address/Program Data
Note: Word mode command sequence is shown.
2001-07-20 25/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Auto Erase
Auto Erase Command Sequence
(see below)
DATA Polling or Toggle Bit
Auto Erase Completed
Auto Chip Erase Command Sequence Auto Block/Multiple Block
(Address/Command) Erase Command Sequence (Address/Command)
555H/AAH 555H/AAH
2AAH/55H 2AAH/55H
555H/80H 555H/80H
555H/AAH SSSH/AAH
2AAH/55H 2AAH/55H
555H/10H Block Address/30H
Block Address/30H
: Additional Block
T Erase commands
are optional
Block Address/3OH
Note: Word mode command sequence is shown.
2001-07-20 26/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Read Byte (DQO to DQ7)
Addr. = VA
DQ7 = Data?
DQ7 DATA Polling
Read Byte (DQO to DQ7)
Addr. = VA
DQ7 = Data?
Fail Pass
VA: Byte address for programming.
Any of the addresses within the block being erased during a Block Erase operation.
Don't care during a Chip Erase operation
Note: 1) DQ7 must be rechecked even if DOS: 1 because DQ7 may change at the same time as DQS.
Read Byte (DQO to DQ7)
Addr. = VA
DQ6 = Toggle?
'-Los:::zrrrCfiiis]--C1ECccc-rc-r-=,
Yes 1)
Read Byte (DOC to DQ7)
Addr. = VA
DQ6 = Toggle ?
Loaf Toggle Bit
Fail Pass
VA: Byte address for programming.
Any of the addresses within the block being erased during a Block Erase operation.
Don't care during a Chip Erase operation
Any address not within the current block during an Erase Suspend operation
Note: 1) DQ6 must be rechecked even if DQ5 = 1 because DQ6 may stop toggling at the same time that
DQ5 changes to l.
2001-07-20 27/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Set up Block Address
Addr. = BA
PLSCNT = 1
,Block Protect (Hardware)
Active W Pulse
Ti me-out 100 ps
- A9 :VID' I PLSCNT
E = VIHI CE = OE = " nCrement
Read from Block
Address = BA; A6, A1, A0 = 0, l, 0
Data = 01H? PLSCNT = 25?
Yes Yes
Protect Another Block? Device Failed
Remove Vo from A9
Block Protect Complete
BA: Block address
2001-07-20 28/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
Block Protect {Software}
PLSCNT = 1
Write Block Protect
Command Sequence
= VIH. E = VIH. W = VIH
Set up Block Address
Address = BA
Time-out 100 pd;
= VIH, o" = Vm, Increment PLSCNT
Time Out 4 M;
Write ID Read Command Sequence
l Write Reset Command Sequence
Read from Block
Address = BA; A6,A1,A0 = 0,1,0
Data = 01H ? @
Yes Yes
Write Reset Command Sequence
Protect Another Block?
Block Protect Complete
Device Fai led
BA: Block Address
2001-07-20 29/30
TOSHIBA TC58FVT160/B160FT-85,-10,-12
PACKAGE DIMENSIONS
0 Plastic TSOP
TSOP I 48 -P- 1220 -0.50
Unit: mm
9.22:0.08
12.4MAX
12 OiO 1
fifififififififif fififififififififififififififi
18.4dc0.1 25 E-
. . (LG 1.0:o.1 _ A 0.1:o.05
_ 20.0i0.2 c:; 1.2MAX" H
2001-07-20 30/30
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